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GKLEE

Guodong Li, Peng Li, Geof Sawaya, Ganesh Gopalakrishnan, Indradeep Ghosh, Sreeranga P. Rajan
2012 SIGPLAN notices  
Programs written for GPUs often contain correctness errors such as races, deadlocks, or may compute the wrong result.  ...  For these programs, GKLEE can also automatically generate tests that provide high coverage. These tests serve as concrete witnesses for every reported bug.  ...  Acknowledgements: We thank the authors of [4] for releasing KLEE well designed and documented. The Utah authors were supporte by NSF awards CNS-1035658 and CCF-0935858.  ... 
doi:10.1145/2370036.2145844 fatcat:2efpoqfqdjcpfcj3htfelxzdxa

GKLEE

Guodong Li, Peng Li, Geof Sawaya, Ganesh Gopalakrishnan, Indradeep Ghosh, Sreeranga P. Rajan
2012 Proceedings of the 17th ACM SIGPLAN symposium on Principles and Practice of Parallel Programming - PPoPP '12  
Programs written for GPUs often contain correctness errors such as races, deadlocks, or may compute the wrong result.  ...  For these programs, GKLEE can also automatically generate tests that provide high coverage. These tests serve as concrete witnesses for every reported bug.  ...  Acknowledgements: We thank the authors of [4] for releasing KLEE well designed and documented. The Utah authors were supporte by NSF awards CNS-1035658 and CCF-0935858.  ... 
doi:10.1145/2145816.2145844 dblp:conf/ppopp/LiLSGGR12 fatcat:dqcea4ws75cavme7x5lwvser7q

Concurrency debugging with differential schedule projections

Nuno Machado, Brandon Lucia, Luís Rodrigues
2015 Proceedings of the 36th ACM SIGPLAN Conference on Programming Language Design and Implementation - PLDI 2015  
To build a DSP, Symbiosis first generates a full, failing, multithreaded schedule via thread path profiling and symbolic constraint solving.  ...  Our evaluation on buggy real-world software and benchmarks shows that, in practical time, Symbiosis generates DSPs that both isolate the small fraction of event orders and dataflows responsible for the  ...  Acknowledgements We would like to thank the anonymous reviewers for their invaluable feedback.  ... 
doi:10.1145/2737924.2737973 dblp:conf/pldi/MachadoLR15 fatcat:khxih52pwzaczmoxygsp4ted7a

Concurrency debugging with differential schedule projections

Nuno Machado, Brandon Lucia, Luís Rodrigues
2015 SIGPLAN notices  
To build a DSP, Symbiosis first generates a full, failing, multithreaded schedule via thread path profiling and symbolic constraint solving.  ...  Our evaluation on buggy real-world software and benchmarks shows that, in practical time, Symbiosis generates DSPs that both isolate the small fraction of event orders and dataflows responsible for the  ...  Acknowledgements We would like to thank the anonymous reviewers for their invaluable feedback.  ... 
doi:10.1145/2813885.2737973 fatcat:mihkcwn43vckrbqd5kfc5oxqmy

Concurrency Debugging with Differential Schedule Projections

Nuno Machado, Daniel Quinta, Brandon Lucia, Luís Rodrigues
2016 ACM Transactions on Software Engineering and Methodology  
To build a DSP, Symbiosis first generates a full, failing, multithreaded schedule via thread path profiling and symbolic constraint solving.  ...  CCS Concepts: r Software and its engineering → Software testing and debugging; Additional Key Words and Phrases: Concurrency, bug localization, constraint solving, differential schedule projection ACM  ...  ACKNOWLEDGMENTS We thank both PLDI'15 and TOSEM anonymous reviewers for their valuable and constructive feedback. We also thank Baris Kasikci for kindly sharing the C version of pbzip2 with us.  ... 
doi:10.1145/2885495 fatcat:77lubcftobbknk2ac55urpsnm4

Effects of Improvements in Interval Timing on the Mathematics Achievement of Elementary School Students

Gordon E. Taub, Kevin S. McGrew, Timothy Z. Keith
2015 Journal of Research in Childhood Education  
The skills necessary for mathematical success in K-12 schools include number correspondence, addition, subtraction, problem solving, and fluency (Mullis et al.  ...  A total of 86 participants attending 1st through 4th grades completed pre-and posttest measures of mathematics achievement from the Woodcock-Johnson III Tests of Achievement.  ...  to allow for improvement in performance via the enhancement of selective or controlled attention.  ... 
doi:10.1080/02568543.2015.1040563 fatcat:3pbbgigpmvfntet6svof4i372a

Parameterized Verification of GPU Kernel Programs

Guodong Li, Ganesh Gopalakrishnan
2012 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum  
We present an automated symbolic verifier for checking the functional correctness of GPGPU kernels parametrically, for an arbitrary number of threads.  ...  Key features of our work include: (1) a symbolic method to encode a comparative assertion across two kernel versions, and (2) techniques to overcome SMT solver restrictions through overapproximations,  ...  Modeling such exchanges by an arbitrary number of threads is challenging; we rely on symbolic matching and SMT solving to address this problem in this paper.  ... 
doi:10.1109/ipdpsw.2012.302 dblp:conf/ipps/LiG12 fatcat:zufpz6lvvja7dkdbb3m3s5ed6e

Scalable SMT-based verification of GPU kernel functions

Guodong Li, Ganesh Gopalakrishnan
2010 Proceedings of the eighteenth ACM SIGSOFT international symposium on Foundations of software engineering - FSE '10  
We contribute the first comprehensive symbolic verifier for kernels written in CUDA C.  ...  PUG has analyzed over a hundred CUDA kernels from public distributions and in-house projects, finding bugs as well as subtle undocumented assumptions.  ...  There were three benign races and two fatal races in these (presumably tested) codes.  ... 
doi:10.1145/1882291.1882320 dblp:conf/sigsoft/LiG10 fatcat:cfhnwdmlhzaafjpzyygqohdsdi

Programmatically Interpretable Reinforcement Learning [article]

Abhinav Verma, Vijayaraghavan Murali, Rishabh Singh, Pushmeet Kohli, Swarat Chaudhuri
2019 arXiv   pre-print
We evaluate NDPS on the task of learning to drive a simulated car in the TORCS car-racing environment.  ...  We propose a new method, called Neurally Directed Program Search (NDPS), for solving the challenging nonsmooth optimization problem of finding a programmatic policy with maximal reward.  ...  We also use a second parameter search technique based on SMT (Satisfiability Modulo Theories) solving.  ... 
arXiv:1804.02477v3 fatcat:3hydz34zurb4xcr35v6hlkmuvi

Monitoring Partially Synchronous Distributed Systems Using SMT Solvers [chapter]

Vidhya Tekken Valapil, Sorrachai Yingchareonthawornchai, Sandeep Kulkarni, Eric Torng, Murat Demirbas
2017 Lecture Notes in Computer Science  
In this paper, we discuss the feasibility of monitoring partially synchronous distributed systems to detect latent bugs, i.e., errors caused by concurrency and race conditions among concurrent processes  ...  We present a monitoring framework where we model both system constraints and latent bugs as Satisfiability Modulo Theories (SMT) formulas, and we detect the presence of latent bugs using an SMT solver.  ...  One of the most challenging correctness issues of complex distributed systems is latent concurrency bugs that are caused by concurrency issues/race conditions.  ... 
doi:10.1007/978-3-319-67531-2_17 fatcat:fyns4c4ocbbxzlqvgdeuludhqe

Monitoring Partially Synchronous Distributed Systems using SMT Solvers [article]

Vidhya Tekken Valapil, Sorrachai Yingchareonthawornchai, Sandeep Kulkarni, Eric Torng, Murat Demirbas
2017 arXiv   pre-print
In this paper, we discuss the feasibility of monitoring partially synchronous distributed systems to detect latent bugs, i.e., errors caused by concurrency and race conditions among concurrent processes  ...  We present a monitoring framework where we model both system constraints and latent bugs as Satisfiability Modulo Theories (SMT) formulas, and we detect the presence of latent bugs using an SMT solver.  ...  One of the most challenging correctness issues of complex distributed systems is latent concurrency bugs that are caused by concurrency issues/race conditions.  ... 
arXiv:1707.07699v1 fatcat:d3xuwzb4t5g3npa5ldpivxtv3a

Constrained Dynamic Partial Order Reduction [chapter]

Elvira Albert, Miguel Gómez-Zamalloa, Miguel Isabel, Albert Rubio
2018 Lecture Notes in Computer Science  
ICs can be declared by the programmer, but importantly, we present a novel SMT-based approach to automatically synthesize ICs in a static pre-analysis.  ...  The cornerstone of dynamic partial order reduction (DPOR) is the notion of independence that is used to decide whether each pair of concurrent events p and t are in a race and thus both p · t and t · p  ...  QS is the only example that needs some seconds to be solved and this is due to the presence of several nested conditional statements combined with the use of built-in functions for lists, which makes the  ... 
doi:10.1007/978-3-319-96142-2_24 fatcat:dpjoby4zsbdi7b2oqdzbzx3sce

A Survey on Network Verification and Testing with Formal Methods: Approaches and Challenges

Yahui Li, Xia Yin, Zhiliang Wang, Jiangyuan Yao, Xingang Shi, Jianping Wu, Han Zhang, Qing Wang
2018 IEEE Communications Surveys and Tutorials  
Furthermore, techniques ranging from formal modeling to verification and testing have been applied to help operators build reliable systems in electronic design automation and software.  ...  We perform a comprehensive survey on well-developed methodologies and tools for data plane verification, control plane verification, data plane testing and control plane testing.  ...  ACKNOWLEDGMENT The authors thank the anonymous reviewers for their suggestions.  ... 
doi:10.1109/comst.2018.2868050 fatcat:h3op4heca5d75bpokfsbfevnwe

A Linux-based tool for hardware bring up, Linux development, and manufacturing

T. Venton, M. Miller, R. Kalla, A. Blanchard
2005 IBM Systems Journal  
The use of BML allows testing and validation of the POWER5-based system to be conducted in parallel with the standard path, which involves the bring up of a hypervisor, the partition firmware, and the  ...  BML, which has fast boot times and can be modified quickly, is used in fault detection during chip manufacturing, POWER5 chip verification, system-board verification, and benchmarking for performance.  ...  SCSI-probe race conditions During the development of the parallel probe feature in BML, we discovered a number of race conditions in the SCSI probe code. 28 In one test, 500 SCSI disks were probed in  ... 
doi:10.1147/sj.442.0319 fatcat:yqxlktdbqzasvf3w6klsksqvty

Query Rewriting Using Monolingual Statistical Machine Translation

Stefan Riezler, Yi Liu
2010 Computational Linguistics  
system.  ...  We train a state-of-the-art statistical machine translation (SMT) model on query-snippet pairs from user query logs, and extract expansion terms from the query rewrites produced by the monolingual translation  ...  same initial conditions.  ... 
doi:10.1162/coli_a_00010 fatcat:447yzyopjzduznezard2htxaqi
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