Filters








386 Hits in 3.0 sec

Temporal Planning with Clock-Based SMT Encodings

Jussi Rintanen
2017 Proceedings of the Twenty-Sixth International Joint Conference on Artificial Intelligence  
We propose more scalable encodings of temporal planning in SMT. The first contribution is practical clock-based encodings of resources and effect delays.  ...  Clocks improve this to linear. The second contribution is a new relaxed scheme for steps. Existing schemes require a step for every time point with discontinuous change.  ...  Conclusion We proposed new ways of using clocks in SMT encodings of temporal planning, decreasing the asymptotic size of some of the core constraints for temporal planning, and showed that the number of  ... 
doi:10.24963/ijcai.2017/103 dblp:conf/ijcai/Rintanen17 fatcat:5ywm42k67jatlai2qkyosbhhpi

How bit-vector logic can help improve the verification of LTL specifications over infinite domains

Luciano Baresi, Mohammad Mehdi Pourhashem Kallehbasti, Matteo Rossi
2016 Proceedings of the 31st Annual ACM Symposium on Applied Computing - SAC '16  
In this paper we adapt a previously-introduced bounded decision procedure for LTL based on Bit-Vector Logic to deal with the infinite domains that are typical of CLTL and CLTLoc.  ...  (SMT) solving techniques have been implemented for them.  ...  To improve with respect to the ae2zot plugin, we have separated the encoding of the temporal operators, which is now done through the bit-vector-based approach presented in Section 2.2, from the representation  ... 
doi:10.1145/2851613.2851833 dblp:conf/sac/BaresiKR16 fatcat:mzmncf2lvfep7eoj7jb7i7hyye

Verifying temporal specifications of Java programs

Francesco Spegni, Luca Spalazzi, Giovanni Liva, Martin Pinzger, Andreas Bollin
2020 Software quality journal  
In this work, we show how to exploit modern SMT solvers together with static analysis in order to produce a network of timed automata approximating the temporal behavior of a set of Java threads.  ...  Many Java programs encode temporal behaviors in their source code, typically mixing three features provided by the Java language: (1) pausing the execution for a limited amount of time, (2) waiting for  ...  MICKEY)))) (assert equals_1000) ; end encoding guard (check-sat) In the SMT problem, we encode the AbsString data-type, together with some constant (e.g., the interpretation of null and of MICKEY).  ... 
doi:10.1007/s11219-019-09488-9 fatcat:p5wc5hgfenb5fbtur2ik4qu3h4

Satisfiability Checking for Mission-Time LTL [chapter]

Jianwen Li, Moshe Y. Vardi, Kristin Y. Rozier
2019 Lecture Notes in Computer Science  
Our extensive experimental evaluation shows that the MLTL-to-SMT transition with the Z3 SMT solver offers the most scalable performance.  ...  Mission-time LTL (MLTL) is a bounded variant of MTL over naturals designed to generically specify requirements for mission-based system operation common to aircraft, spacecraft, vehicles, and robots.  ...  We also plan to explore lazy encodings from MLTL formulas to SMT models.  ... 
doi:10.1007/978-3-030-25543-5_1 fatcat:u7fjg6qfnja2rbunyiqyso5iia

Improvements in interval time tracking and effects on reading achievement

Gordon E. Taub, Kevin S. McGrew, Timothy Z. Keith
2007 Psychology in the schools (Print)  
completed a 4-week intervention designed to improve their timing/rhythmicity by reducing the latency in their response to a synchronized metronome beat, referred to as a synchronized metronome tapping (SMT  ...  This paper provides a brief overview of domain-general cognitive abilities believed effected by SMT interventions and provides a preliminary hypothesis to explain how this non-academic intervention can  ...  Master Internal Clock Based on Scalar Timing Theory To deal with time, organisms (animal and human) have developed multiple timing systems that are active in more than 10 orders of magnitude with various  ... 
doi:10.1002/pits.20270 fatcat:3bbjga2gxze2dj4qmzv6l3mlyi

Decidability and Complexity of Action-Based Temporal Planning over Dense Time

Nicola Gigante, Andrea Micheli, Angelo Montanari, Enrico Scala
2020 PROCEEDINGS OF THE THIRTIETH AAAI CONFERENCE ON ARTIFICIAL INTELLIGENCE AND THE TWENTY-EIGHTH INNOVATIVE APPLICATIONS OF ARTIFICIAL INTELLIGENCE CONFERENCE  
This paper studies the computational complexity of temporal planning, as represented by PDDL 2.1, interpreted over dense time.  ...  We prove the problem to be PSPACE-complete when self-overlap is forbidden, whereas, when allowed, it becomes EXPSPACE-complete with ϵ-separation and undecidable with non-zero separation.  ...  Furthermore, our proofs employ the first polynomial-sized encoding of temporal planning into timed automata.  ... 
doi:10.1609/aaai.v34i06.6539 fatcat:jw6ugso6kvcldajtt6zmav5eza

HyComp: An SMT-Based Model Checker for Hybrid Systems [chapter]

Alessandro Cimatti, Alberto Griggio, Sergio Mover, Stefano Tonetta
2015 Lecture Notes in Computer Science  
HYCOMP relies on the encoding of the network into an infinite-state transition system, which can be analyzed using SMT-based verification techniques (e.g. BMC, K-induction, IC3).  ...  HYCOMP is a model checker for hybrid systems based on Satisfiability Modulo Theories (SMT). HYCOMP takes as input networks of hybrid automata specified using the HyDI symbolic language.  ...  underlying SMT-based verification algorithms.  ... 
doi:10.1007/978-3-662-46681-0_4 fatcat:5dhashzxe5el5mwqljdcafkfqy

Timed Orchestration for Component-based Systems [article]

Chih-Hong Cheng, Lacramioara Astefanoaei, Harald Ruess, Souha Ben Rayana, Saddek Bensalem
2016 arXiv   pre-print
temporal requirements in an optimized and robust fashion.  ...  For safety properties, synthesis problems are solved by checking satisfiability of ∃∀SMT constraints.  ...  The verification procedure is based on two SMT solver instances, the so-called E-solver and F-solver.  ... 
arXiv:1504.05513v3 fatcat:nv6nvira5vegrln2ah4ixglumq

Distributed Runtime Verification of Metric Temporal Properties for Cross-Chain Protocols [article]

Ritam Ganguly, Yingjie Xuey, Aaron Jonckheere, Parker Ljungy, Benjamin Schornsteiny, Borzoo Bonakdarpour, Maurice Herlihy
2022 arXiv   pre-print
Second, we introduce a progression-based formula rewriting scheme for monitoring \MTL specifications which employ SMT solving techniques and report experimental results.  ...  First, we propose a generalized runtime verification technique for verifying partially synchronous distributed computations for the metric temporal logic (MTL) by exploiting bounded-skew clock synchronization  ...  CASE STUDY AND EVALUATION In this section, we analyze our SMT-based solution.  ... 
arXiv:2204.09796v1 fatcat:wyrt4phk6zhj5ci4ewht7fpvri

Synthesising Robust and Optimal Parameters for Cardiac Pacemakers Using Symbolic and Evolutionary Computation Techniques [chapter]

Marta Kwiatkowska, Alexandru Mereacre, Nicola Paoletti, Andrea Patanè
2015 Lecture Notes in Computer Science  
We develop an SMT-based method for solving the inner problem through a discrete encoding, and combine it with evolutionary algorithms and simulations to solve the outer optimisation task.  ...  Temporal Logic (CMTL) formulas.  ...  This is formulated as a bi-level optimisation problem, which we solve through a combination of symbolic, SMT-based, analysis of finite paths based on discrete encoding (for the inner problem), with evolutionary  ... 
doi:10.1007/978-3-319-26916-0_7 fatcat:ezdjzhvynrainpj72kz5wbznnm

SAT and SMT-Based Verification of Security Protocols Including Time Aspects

Sabina Szymoniak, Olga Siedlecka-Lamch, Agnieszka M Zbrzezny, Andrzej Zbrzezny, Miroslaw Kurkowski
2021 Sensors  
In this work, we propose and investigate the SAT-and SMT-based formal verification methods of SP used in communication between devices equipped with sensors.  ...  For many years various types of devices equipped with sensors have guaranteed proper work in a huge amount of machines and systems.  ...  However, we extended the encoding using actions and we also defined a SMT-based encoding. LetĈ(A) be a model.  ... 
doi:10.3390/s21093055 pmid:33925606 fatcat:aptlxmiv2ngivd6iifgzrplzru

Offline Trace Checking of Quantitative Properties of Service-Based Applications [article]

Domenico Bianculli, Carlo Ghezzi, Srdan Krstic, Pierluigi San Pietro
2014 arXiv   pre-print
, an SMT-based verification toolkit.  ...  SOLOIST is an extension of metric temporal logic with aggregate temporal modalities that can be used to write quantitative temporal properties.  ...  The authors wish to thank Marcello Bersani and Matteo Pradella for their precious help with ZOT.  ... 
arXiv:1409.4653v1 fatcat:s4mowa6qgrew3grkp5x2plp5xe

A Survey on Formal Verification Techniques for Safety-Critical Systems-on-Chip

Tomás Grimm, Djones Lettnin, Michael Hübner
2018 Electronics  
Such tools employ formal techniques based on mathematical methodologies, and with them, it is possible to guarantee that portions of an architecture are correct.  ...  Projects of any complexity can apply this method since it does not deal with states, but with formulas.  ...  Examples of SMT-Based Tools Four tools based on SMT are ESW-CBMC, MathSAT5, nuXmv, and STP. ESW-CBMC ESW-CBMC is an SMT-based formal verifier for embedded software written in ANSI-C.  ... 
doi:10.3390/electronics7060081 fatcat:qz4dai4xo5cabkyizvwfabub3u

Online verification in cyber-physical systems: Practical bounds for meaningful temporal costs

Marcello M. Bersani, Marisol García-Valls
2017 Journal of Software: Evolution and Process  
Some approaches such as [17] verify the temporal domain exclusively using simple utilization based schedulability analysis over distributed service based applications.  ...  We experiment with the usage of temporal logic in OLIVE to prove that the decision can be taken within the specified time. CPS require that such a time is determined a priori.  ...  SMT time) and the same test with k = 50 provides the same result, in almost 900 secs.  ... 
doi:10.1002/smr.1880 fatcat:syqmmvtn6zag7enno5f44qgvxi

Competition Report: CHC-COMP-21

Grigory Fedyukovich, Philipp Rümmer
2021 Electronic Proceedings in Theoretical Computer Science  
In the future, we, however, plan introducing other ADT-related tracks with benchmarks over ADT and linear arithmetic and/or arrays.  ...  PCSat is based on CounterExample-Guided Inductive Synthesis (CEGIS), with the support of multiple synthesis engines including template-based [21] , decision-tree-based [14] , and graphical-modelbased  ...  The ULTIMATE framework shares the libraries for handling SMT formulas with the SMTInterpol SMT solver.  ... 
doi:10.4204/eptcs.344.7 fatcat:k2xxu6scfza2hc4fw6qi6nadq4
« Previous Showing results 1 — 15 out of 386 results