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Temporal Logics on Words with Multiple Data Values [article]

Ahmet Kara, Thomas Schwentick, Thomas Zeume
2010 arXiv   pre-print
The paper proposes and studies temporal logics for attributed words, that is, data words with a (finite) set of (attribute,value)-pairs at each position.  ...  Whereas the basic logic only allows navigation to positions where a fixed data value occurs, extensions are studied that also allow navigation to positions with different data values.  ...  One of our aims in this paper was to find a decidable temporal logic on data words with past navigation that is more expressive than simple LTL ↓ 1 .  ... 
arXiv:1010.1139v1 fatcat:rea3c4nxdjga5euot2cr3mhbka

A multimodal alignment framework for spoken documents

Dalila Mekhaldi, Denis Lalanne, Rolf Ingold
2011 Multimedia tools and applications  
The main alignment strategies studied are based on thematic, quotation and reference relationships.  ...  They highlight also the utility of the multimodal alignment in advanced applications, e.g. multimedia document browsing, contentbased / temporal-based searching, etc. Keywords Multimodal document .  ...  The small difference between the recall values (0.65 in Fig. 9c and 0.62 in Fig. 8e) is explained by the fact that there are some utterances that are linked with more than one logical block in the multiple  ... 
doi:10.1007/s11042-011-0842-x fatcat:ajsquo2yefbxteagmv3aqokaie

EEG correlation during the solving of simple and complex logical–mathematical problems

Jahaziel Molina del Río, Miguel Angel Guevara, Marisela Hernández González, Rosa María Hidalgo Aguirre, Manuel Alejandro Cruz Aguilar
2019 Cognitive, Affective, & Behavioral Neuroscience  
In this study was evaluated the activation and electroencephalographic (EEG) correlation of the prefrontal, temporal, and parietal regions in young men while solving logical-mathematical word problems  ...  These abilities have been associated with activation of the parietal, temporal, and prefrontal cortices.  ...  multiplication retrieval compared with a rest condition.  ... 
doi:10.3758/s13415-019-00703-5 pmid:30790182 fatcat:ujnxwakhbrcdvp27wtnwfralxm

Monitoring Modulo Theories [chapter]

Normann Decker, Martin Leucker, Daniel Thoma
2014 Lecture Notes in Computer Science  
The monitoring procedure was implemented for linear-time temporal logic (LTL) based on the Z3 SMT solver and evaluated regarding runtime performance.  ...  It presents a general framework lifting the monitor synthesis for propositional temporal logics to a temporal logic over structures within some first-order theory.  ...  Our assumptions on the temporal logic must be that it is linear (defined on words) and that it only uses atomic propositions to "access" the word.  ... 
doi:10.1007/978-3-642-54862-8_23 fatcat:tqqr3a5efrbg5jviy5obssjjwa

Monitoring modulo theories

Normann Decker, Martin Leucker, Daniel Thoma
2015 International Journal on Software Tools for Technology Transfer (STTT)  
The monitoring procedure was implemented for linear-time temporal logic (LTL) based on the Z3 SMT solver and evaluated regarding runtime performance.  ...  It presents a general framework lifting the monitor synthesis for propositional temporal logics to a temporal logic over structures within some first-order theory.  ...  Our assumptions on the temporal logic must be that it is linear (defined on words) and that it only uses atomic propositions to "access" the word.  ... 
doi:10.1007/s10009-015-0380-3 fatcat:jx6zkqcowbfuvbt3snfrjhbz7u

Error detection and correction in an optoelectronic memory system

Robert Hofmann, Madhulima Pandey, Steven P. Levitan, Donald M. Chiarulli, Pericles A. Mitkas, Zameer U. Hasan
1998 Advanced Optical Memories and Interfaces to Computer Storage  
The decoder is implemented in reconfigurable logic, using a single Xilinx 4000-series FPGA per code word and is fully scalable using multiple FPGA's.  ...  The current implementation operates at 33Mhz, and processes two code words in parallel per clock cycle for an aggregate data rate of 4Gb/s.  ...  Simultaneously with loading the incoming optical data, the cache controller monitors the data stream and latches the requested word into an internal buffer.  ... 
doi:10.1117/12.330404 fatcat:w76ezwextzhurjdyqdjurncowa

Verifying linear temporal properties of data insensitive controllers using finite instantiations [chapter]

R. Hojati, D. L. Dill, R. K. Brayton
1997 Hardware Description Languages and their Applications  
We show that for this temporal logic, one can always use finite instantiations, although the number of required bits varies with the complexity of the property.  ...  In this paper, we generalize this notion and consider the problem of verifying properties of DICs in a linear temporal logic whose atomic propositions are finite variables and integer equalities.  ...  As a sanity check when doing a multiple word check, one might check that the last word of the load appears on the data bus.  ... 
doi:10.1007/978-0-387-35064-6_5 fatcat:y3xthmbq6rgs3preh6nuamz4by

DeepSTL – From English Requirements to Signal Temporal Logic [article]

Jie He, Ezio Bartocci, Dejan Ničković, Haris Isakovic, Radu Grosu
2022 arXiv   pre-print
In this paper we propose DeepSTL, a tool and technique for the translation of informal requirements, given as free English sentences, into Signal Temporal Logic (STL), a formal specification language for  ...  We first design a grammar-based generation technique of synthetic data, where each output is a random STL formula and its associated set of possible English translations.  ...  logic that extends LTL with operators to express temporal properties over dense-time real-valued signals.  ... 
arXiv:2109.10294v4 fatcat:zkxuasgqfzbdrgk5m4p6dglhuq

Efficient Offline Monitoring of Linear Temporal Logic with Bit Vectors [article]

Kun Xie, Sylvain Hallé
2020 arXiv   pre-print
In this paper, we describe a technique for the offline verification of arbitrary expressions of Linear Temporal Logic using bitmap manipulation.  ...  A bitmap is a data structure designed to compactly represent sets of integers; it provides very fast operations for querying and manipulating such sets, exploiting bit-level parallelism.  ...  , or temporal logics.  ... 
arXiv:2005.11737v1 fatcat:7mb7feocdvbangihnmedtpa5ba

Exploring the Effectiveness of Lexical Ontologies for Modeling Temporal Relations with Markov Logic

Eunyoung Ha, Alok Baikadi, Carlyle Licata, Bradford W. Mott, James C. Lester
2010 SIGDIAL Conferences  
This paper introduces a joint modeling framework and feature set for temporal analysis of events that utilizes Markov Logic. The feature set includes novel features derived from lexical ontologies.  ...  Temporal analysis of events is a central problem in computational models of discourse. However, correctly recognizing temporal aspects of events poses serious challenges.  ...  Jointly identifying temporal relations with Markov Logic.  ... 
dblp:conf/sigdial/HaBLML10 fatcat:tslffgcsmfetpl4gzl3pje7yqu

Assertion checking by combined word-level ATPG and modular arithmetic constraint-solving techniques

Chung-Yang Huang, Kwang-Ting Cheng
2000 Proceedings of the 37th conference on Design automation - DAC '00  
Our word-level ATPG and implication technique not only solves the constraints on the control logic, but also propagates the logic implications to the datapath.  ...  Third, our arithmetic constraint solver is based on modular instead of integral number system. It can thus avoid the false negative effect resulting from the bit-vector value modulation.  ...  Word-level Logic Implication We use different kinds of data structures to represent the legal values for different kinds of gates.  ... 
doi:10.1145/337292.337333 dblp:conf/dac/HuangC00 fatcat:akxf7bdfmnfvfiwhrw2rannlwi

OpinionSeer: Interactive Visualization of Hotel Customer Feedback

Yingcai Wu, Furu Wei, Shixia Liu, Norman Au, Weiwei Cui, Hong Zhou, Huamin Qu
2010 IEEE Transactions on Visualization and Computer Graphics  
To provide multiple-level exploration, we introduce subjective logic to handle and organize subjective opinions with degrees of uncertainty.  ...  Several case studies illustrate the effectiveness and usefulness of OpinionSeer on analyzing relationships among multiple data dimensions and comparing opinions of different groups.  ...  Rob Law in the School of Hotel & Tourism Management at the Hong Kong PolyTechnic University for his help with the system design.  ... 
doi:10.1109/tvcg.2010.183 pmid:20975149 fatcat:ibg6rfhvqnd33grbqfuvz4ebd4

NCSU: Modeling Temporal Relations with Markov Logic and Lexical Ontology

Eun Ha, Alok Baikadi, Carlyle Licata, James C. Lester
2010 International Workshop on Semantic Evaluation  
We take a supervised machine-learning technique using Markov Logic in combination with rich lexical relations beyond basic and syntactic features.  ...  One of our two submitted systems achieved the highest score for the Task F (66% precision), untied, and the second highest score (63% precision) for the Task C, which tied with three other systems.  ...  In the TempEval-2 data, an event always consists of a single word token, but time expressions often consist of multiple tokens. We treat each word in time expressions as a different feature.  ... 
dblp:conf/semeval/HaBLL10 fatcat:2dbhg4l3vfgbveeqmrh3bw75hy

Silent stores for free

Kevin M. Lepak, Mikko H. Lipasti
2000 Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture - MICRO 33  
Silent store instructions write values that exactly match the values that are already stored at the memory address that is being written.  ...  Finally, we show that silent store detection via these methods can result in a 11% harmonic mean performance improvement in a two-level store-through on-chip cache hierarchy that is based on a real microprocessor  ...  FIGURE 5 . 5 L1 data cache ECC-word generation on a sub-ECC-word store. FIGURE 6. L1 data cache ECC-word generation on a sub-ECC-word store with free silent store squashing.  ... 
doi:10.1145/360128.360133 fatcat:utacjxc3cvdijaq7ofooe4wdga

Computer code comprehension shares neural resources with formal logical inference in the fronto-parietal network

Yun-Fei Liu, Judy Kim, Colin Wilson, Marina Bedny
2020 eLife  
Alternatively, comprehension of code could depend on fronto-parietal networks shared with other culturally-invented symbol systems, such as formal logic and symbolic math such as algebra.  ...  In terms of the underlying neural basis, code comprehension overlapped extensively with formal logic and to a lesser degree math.  ...  We acquired the data in one code comprehension session (six runs) and one localizer session (2 runs of MSIT followed by 6 runs of language/math/logic), with the acquisition parameters being identical for  ... 
doi:10.7554/elife.59340 pmid:33319745 pmcid:PMC7738180 fatcat:d6luatls2rhmvait4w5ngpqv2i
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