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Tempest and typhoon
1994
SIGARCH Computer Architecture News
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This paper addresses this problem by defining an interface, Tempest, that exposes low-level communication and memory-system mechanisms so programmers and compilers can customize policies for a given application ...
We simulated Typhoon on the Wisconsin Wind Tunnel and found that Stache running on Typhoon performs comparably (±30%) to an all-hardware Dir N NB cache-coherence protocol for five shared-memory programs ...
We especially would like to thank Mark Hill for numerous discussions and suggestions and Alvy Lebeck for several key extensions to Fast-Cache. ...
doi:10.1145/192007.192062
fatcat:6yffl7imkzhaparrgqihwlzbfu
Tempest and typhoon
1998
25 years of the international symposia on Computer architecture (selected papers) - ISCA '98
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This paper addresses this problem by defining an interface, Tempest, that exposes low-level communication and memory-system mechanisms so programmers and compilers can customize policies for a given application ...
We simulated Typhoon on the Wisconsin Wind Tunnel and found that Stache running on Typhoon performs comparably (±30%) to an all-hardware Dir N NB cache-coherence protocol for five shared-memory programs ...
We especially would like to thank Mark Hill for numerous discussions and suggestions and Alvy Lebeck for several key extensions to Fast-Cache. ...
doi:10.1145/285930.286008
dblp:conf/isca/ReinhardtLW98a
fatcat:2ggsngclordifld3ksmlfcri3m
Application-specific protocols for user-level shared memory
1994
Supercomputing, Proceedings
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Recent distributed shared memoy (DSM) systems and proposed shared-memory machines have implemented some or all of their cache coherence protocols in sofiware. ...
It shows that application-specijic protocols substantially improved the performance of three application programs-appbt, em3d, and barnes-over carefully tuned transparent shared memo~implementations. ...
Acknowledgements The other members of the Wisconsin Wind Tunnel Project, especially Shubu Mukherjee, Brad Richards and Doug Burger, provided assistance and support for this work. ...
doi:10.1145/602770.602838
fatcat:x4zoy2z54ventlx3uymovyzqve
Tempest and Typhoon: user-level shared memory
Proceedings of 21 International Symposium on Computer Architecture
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The file type is application/pdf.
This paper addresses this problem by defining an interface, Tempest, that exposes low-level communication and memory-system mechanisms so programmers and compilers can customize policies for a given application ...
We simulated Typhoon on the Wisconsin Wind Tunnel and found that Stache running on Typhoon performs comparably (±30%) to an all-hardware Dir N NB cache-coherence protocol for five shared-memory programs ...
We especially would like to thank Mark Hill for numerous discussions and suggestions and Alvy Lebeck for several key extensions to Fast-Cache. ...
doi:10.1109/isca.1994.288138
dblp:conf/isca/ReinhardtLW94
fatcat:b5zfzj76zrhltkz4253xxxiz6i
Application-specific protocols for user-level shared memory
Proceedings of Supercomputing '94
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The file type is application/pdf.
Recent distributed shared memoy (DSM) systems and proposed shared-memory machines have implemented some or all of their cache coherence protocols in sofiware. ...
It shows that application-specijic protocols substantially improved the performance of three application programs-appbt, em3d, and barnes-over carefully tuned transparent shared memo~implementations. ...
Acknowledgements The other members of the Wisconsin Wind Tunnel Project, especially Shubu Mukherjee, Brad Richards and Doug Burger, provided assistance and support for this work. ...
doi:10.1109/superc.1994.344301
dblp:conf/sc/FalsafiLRSHLRW94
fatcat:bub2uw7vlfbgtlexguma3vycjy
Hardware support for flexible distributed shared memory
1998
IEEE transactions on computers
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Three of the designs support user-level software coherence protocols, enabling application-specific protocol optimizations. ...
Workstation-based parallel systems are attractive due to their low cost and competitive uniprocessor performance. ...
In contrast, other systems that seek to integrate message passing and shared memory treat user-level message passing as a complementary alternative to-rather than a fundamental building block for-shared-memory ...
doi:10.1109/12.729790
fatcat:ybyu26st3vbl5mbnytscnzzxlq
Decoupled hardware support for distributed shared memory
1996
Proceedings of the 23rd annual international symposium on Computer architecture - ISCA '96
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This paper investigates hardware support for fine-grain distributed shared memory (DSM) in networks of workstations. ...
Two benchmarks are hampered by high communication overheads, but selectively replacing shared-memory operations with message passing provides speedups of at least 16 on both decoupled systems. ...
Acknowledgments The Typhoon-0 implementation was made possible through the generosity of Andreas Nowatzyk and Sun Microsystems and by a donation from the Altera Corporation. ...
doi:10.1145/232973.232979
dblp:conf/isca/ReinhardtPW96
fatcat:3brtvx2ihjcczkrrqbw7qj6wra
Decoupled hardware support for distributed shared memory
1996
SIGARCH Computer Architecture News
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The file type is application/pdf.
This paper investigates hardware support for fine-grain distributed shared memory (DSM) in networks of workstations. ...
Two benchmarks are hampered by high communication overheads, but selectively replacing shared-memory operations with message passing provides speedups of at least 16 on both decoupled systems. ...
Acknowledgments The Typhoon-0 implementation was made possible through the generosity of Andreas Nowatzyk and Sun Microsystems and by a donation from the Altera Corporation. ...
doi:10.1145/232974.232979
fatcat:xlvt3pco3vakrhow3fr5taaefy
Fine-grain access control for distributed shared memory
1994
Proceedings of the sixth international conference on Architectural support for programming languages and operating systems - ASPLOS-VI
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This paper discusses implementations of fine-grain memory access control, which selectively restricts reads and writes to cache-block-sized memory regions. ...
These techniques permit efficient implementation of shared memory on a wide range of parallel systems, thereby providing shared-memory codes with a portability previously limited to message passing. of ...
A shared-
memory
program
is executed by compiling
it with
a standard
compiler
(e.g., gee), linking
it with the
Blizzard library
and a Tempest-compliant
user-level
protocol (e.g., Stache [32 ...
doi:10.1145/195473.195575
dblp:conf/asplos/SchoinasFLRLW94
fatcat:ccjsmuhcszey5bi3aydpy7xm7u
Fine-grain access control for distributed shared memory
1994
ACM SIGOPS Operating Systems Review
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
This paper discusses implementations of fine-grain memory access control, which selectively restricts reads and writes to cache-block-sized memory regions. ...
These techniques permit efficient implementation of shared memory on a wide range of parallel systems, thereby providing shared-memory codes with a portability previously limited to message passing. of ...
A shared-
memory
program
is executed by compiling
it with
a standard
compiler
(e.g., gee), linking
it with the
Blizzard library
and a Tempest-compliant
user-level
protocol (e.g., Stache [32 ...
doi:10.1145/381792.195575
fatcat:3aufv7x5bzg4vbih7h26s5qkne
Fine-grain access control for distributed shared memory
1994
SIGPLAN notices
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf.
This paper discusses implementations of fine-grain memory access control, which selectively restricts reads and writes to cache-block-sized memory regions. ...
These techniques permit efficient implementation of shared memory on a wide range of parallel systems, thereby providing shared-memory codes with a portability previously limited to message passing. of ...
A shared-
memory
program
is executed by compiling
it with
a standard
compiler
(e.g., gee), linking
it with the
Blizzard library
and a Tempest-compliant
user-level
protocol (e.g., Stache [32 ...
doi:10.1145/195470.195575
fatcat:rugug655nzaxthzxeyor3lg6g4
Page 632 of IEEE Transactions on Computers Vol. 52, Issue 5
[page]
2003
IEEE Transactions on Computers
Preserved Fulltext
The Internet Archive has digitized a microfilm copy of this work. It may be possible to borrow a copy for reading.
Wood, “Tempest and
Typhoon: User-Level Shared Memory,” Proc. 21st Int'l Symp Computer Architecture, pp. 325-337, Apr. 1994
\. Saulsbury, T. Wlikinson, J. Carder, and A. ...
Lee, and M Parkin, “The S3.mp Scalable Shared Memory Multiprocessor,” Proc. Int'l Conf. Parallel Processing, pp. 1-10, Aug. 1995
V.S. Pai, P. Ranganathan, and S.V. ...
The Wisconsin Wind Tunnel project
1994
SIGARCH Computer Architecture News
Preserved Fulltext
A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2006; you can also visit the original URL.
The file type is application/pdf.
This document lists contributors to the Wisconsin Wind Tunnel Project, gives a brief description of the project, and presents references and abstracts to its principal papers, including how to obtain them ...
Larus, and David A. Wood. Reflections on 'Tempest and Typhoon: User-level Shared Memory'. ...
Hill, James Larus, Anne Rogers, and David Wood. Application-Specific Protocols for User-Level Shared Memory. In Proceedings of Supercomputing '94, pages 380-389, November, 1994. ...
doi:10.1145/192537.192543
fatcat:rvtgkgeonnba3cdbociaiglrdq
A programming interface for NUMA shared-memory clusters
[chapter]
1997
Lecture Notes in Computer Science
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We developed SMI, the Shared Memory Interface, and implemented it as a library on an SCI-coupled cluster of workstations. ...
We describe a programming interface for parallel computing on NUMA (Non-Uniform Memory Access) shared memory machines. ...
This is not true for SCI-clustered workstations or PCs wherein an independent copy of the operating system runs on each (SMP-) node, making use of the shared memory only at user-level. ...
doi:10.1007/bfb0031641
fatcat:m7d2sgfn3zdchmjfqajblmvrv4
Processor Mechanisms for Software Shard Memory
[chapter]
2000
Lecture Notes in Computer Science
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The file type is application/pdf.
These mechanisms have been integrated into the M-Machine's MAP processor, and accelerate tasks which are common to many shared-memory protocols, including detection of remote memory references, invocation ...
This thesis describes and evaluates the effectiveness of four hardware mechanisms for software shared memory: block status bits, a global translation lookaside buffer, a fast, non-blocking, event system ...
First and foremost, I would like to thank the friends who kept me sane and reminded me that there's more to life than my job. ...
doi:10.1007/3-540-39999-2_11
fatcat:lwtvrocponcudl4zuxkyw3mpsi
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