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Temperature-Aware Integrated DVFS and Power Gating for Executing Tasks With Runtime Distribution

Kyungsu Kang, Jungsoo Kim, Sungjoo Yoo, Chong-Min Kyung
2010 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
Index Terms-Dynamic voltage and frequency scaling (DVFS), energy minimization, hard real time, power gating (PG), runtime distribution.  ...  In this paper, we propose a method for delivering lower energy consumption by integrating the cooling and running in a temperature-aware manner without incurring performance penalty.  ...  Conclusion In this paper, we proposed a method of integrating DVFS and power gating in a temperature/runtime distribution-aware manner.  ... 
doi:10.1109/tcad.2010.2059290 fatcat:ygcedpa4ovdj7fez26zhdxzn6e

Hybrid dynamic energy and thermal management in heterogeneous embedded multiprocessor SoCs

Shervin Sharifi, Ayse Kivilcim Coskun, Tajana Simunic Rosing
2010 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)  
On the other hand, inherent imbalance in power densities across MPSoCs leads to non-uniform temperature distributions, which affect performance and reliability adversely.  ...  In comparison to performance-aware policies such as load balancing, our technique simultaneously reduces the thermal hot spots, temperature gradients, and energy consumption significantly.  ...  Acknowledgements This work has been funded by NSF Project GreenLight grant 0821155, NSF SHF grant 0916127, GSRC grant 2003-DT-660, UC Micro grant 08-039, Texas Instruments, Sun Microsystems, and Cisco.  ... 
doi:10.1109/aspdac.2010.5419681 dblp:conf/aspdac/SharifiCR10 fatcat:i7x5mb7fcnh5toztpwcsn73jau

Runtime energy management for many-core systems

Andre L. M. Martins, Anderson C. Sant'Ana, Fernando G. Moraes
2016 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)  
Designs have to adopt power techniques as power-gating and/or DVFS for respecting the restricted power budget.  ...  This work proposes a Runtime Energy Management (REM) for many-core systems using finegrain DVFS as the primary power control policy.  ...  ACKNOWLEDGMENTS The Author Fernando Moraes is supported by CNPq -projects 472126/2013-0 and 302625/2012-7, and FAPERGS -project 2242-2551/14-8.  ... 
doi:10.1109/icecs.2016.7841212 dblp:conf/icecsys/MartinsSM16 fatcat:gpvqjm2vczbvvbludafpdk2a6i

Temperature-aware runtime power management for chip-multiprocessors with 3-D stacked cache

Kyungsu Kang, Giovanni De Micheli, Seunghan Lee, Chong-Min Kyung
2014 Fifteenth International Symposium on Quality Electronic Design  
The proposed method combines runtime cache tuning (e.g., cache-way partitioning, cache-way power-gating, cache data placement) with per-core dynamic voltage/frequency scaling (DVFS) in a temperature-aware  ...  Experimental results show that the integrated method offers 23% performance improvement on average in terms of instructions per second (IPS) compared with temperature-aware runtime cache tuning only.  ...  ACKNOWLEDGMENT This work is supported by the NanoSys project (ERCAdG-246810) and by the Center for Integrated Smart Sensors funded by the Ministry of Science, ICT & Future Planning as Global Frontier Project  ... 
doi:10.1109/isqed.2014.6783320 dblp:conf/isqed/KangMLK14 fatcat:refnwfkizva6dluaxrahtahqci

Dynamic thermal management in 3D multicore architectures

A.K. Coskun, J.L. Ayala, D. Atienza, T.S. Rosing, Y. Leblebici
2009 2009 Design, Automation & Test in Europe Conference & Exhibition  
Our approach can also be integrated with power management policies to reduce energy consumption while avoiding the thermal hot spots and large temperature variations.  ...  We then propose a dynamic thermally-aware job scheduling technique for 3D systems to reduce the thermal problems at very low performance cost.  ...  Dynamic Management Infrastructure We have integrated the job scheduler and power manager with the thermal simulator to be able to control the system at runtime and measure the thermal behavior.  ... 
doi:10.1109/date.2009.5090885 dblp:conf/date/CoskunAARL09 fatcat:zgjy6b6glnbhdgayxjkbkkzaim

Dynamic thermal management in 3D multi-core architecture through run-time adaptation

F Hameed, M A A Faruque, J Henkel
2011 2011 Design, Automation & Test in Europe  
3D multi-core architectures are seen to provide increased transistor density, reduced power consumption, and improved performance through wire length reduction.  ...  The proposed thermal management technique synergistically combines the benefits of the architectural adaptation supported by our 3D multi-core architecture with dynamic voltage and frequency scaling.  ...  SBA and DVFS are implemented using the proportional integral (PI) controller with the SBA having a high invocation interval (I SBA > I DVFS ) and a low temperature threshold (T SBA < T DVFS ).  ... 
doi:10.1109/date.2011.5763053 dblp:conf/date/HameedFH11 fatcat:b2vvu3ullfa3hnmf2vixenaoou

A lightweight software-based runtime temperature monitoring model for multiprocessor embedded systems

Guilherme Castilhos, Fernando Gehm Moraes, Luciano Ost
2016 2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI)  
Existing thermal management techniques rely on physical sensors to provide them with temperature figures to regulate the system's operating temperature and thermal variation at runtime.  ...  High-thermal variation and temperature operation can have a noteworthy impact on system performance, power consumption and reliability, which is a major and increasingly critical design metric in emerging  ...  (DVFS), task scheduling, mapping, and migration.  ... 
doi:10.1109/sbcci.2016.7724040 dblp:conf/sbcci/CastilhosMO16 fatcat:ir54bo6jfzfz5kwjnh6jn3w774

Energy-efficient Algorithms for Ultrascale Systems

2015 Supercomputing Frontiers and Innovations  
first direction is concerned with power-aware and thermal-aware hardware design, including low-power techniques on all levels, i.e. the circuit and logic level, the processor, the memory and the interconnects  ...  Accordingly, because of physical constraints and environmental issues, power and energy consumption are considered to be one of the largest challenges for Exascale systems.  ...  [75] introduces PGCapping, a system that integrates power gating with DVFS for chip multiprocessors.  ... 
doi:10.14529/jsfi150205 fatcat:hceabokapvgozc4tsgikcjyq3u

Topologically homogeneous power-performance heterogeneous multicore systems

K Chakraborty, S Roy
2011 2011 Design, Automation & Test in Europe  
Dynamic Voltage and Frequency Scaling (DVFS), a widely adopted technique to ensure safe thermal characteristics while delivering superior energy efficiency, is rapidly becoming inefficient with technology  ...  scaling due to two critical factors: (a) inability to scale the supply voltage due to reliability concerns; and (b) dynamic adaptations through DVFS cannot alter underlying power hungry circuit characteristics  ...  Multicore power dissipation data is then fed to HotSpot 4.2 [21] , which is integrated with our architectural simulator to obtain transient temperatures.  ... 
doi:10.1109/date.2011.5763030 dblp:conf/date/ChakrabortyR11 fatcat:sberfoybozcsvbjviuftb5pnpq

Reflecting on Self-Aware Systems-on-Chip [chapter]

Bryan Donyanavard, Tiago Mück, Kasra Moazzemi, Biswadip Maity, Caio Batista de Melo, Kenneth Stewart, Saehanseul Yi, Amir M. Rahmani, Nikil Dutt
2020 A Journey of Embedded and Cyber-Physical Systems  
Acknowledgments The authors would like to acknowledge Santanu Sarma, Chen-Ying Hsieh, JurnGyu Park, Majid Shoushtari, and Hossein Tajik for their research contributions.  ...  We acknowledge financial support by NSF grant CCF-1704859, and the Marie Curie Actions of the European Union's H2020 Program.  ...  scaling (DVFS), power gating, idle cycle injection.  ... 
doi:10.1007/978-3-030-47487-4_6 fatcat:vz4pxkkmrjgf5la3sn2nkbl3we

Consistent runtime thermal prediction and control through workload phase detection

Ryan Cochran, Sherief Reda
2010 Proceedings of the 47th Design Automation Conference on - DAC '10  
Elevated temperatures impact the performance, power consumption, and reliability of processors, which rely on integrated thermal sensors to measure runtime thermal behavior.  ...  We incorporate these thermal models into a dynamic voltage and frequency scaling (DVFS) technique that limits the maximum temperature during runtime.  ...  With the PCA coefficients and the phase cluster locations calculated for representative workloads during offline analysis, runtime thermal prediction and control are relatively lightweight tasks.  ... 
doi:10.1145/1837274.1837292 dblp:conf/dac/CochranR10 fatcat:nw56o3szgbapvmadt6vya2syhq

High-Performance Energy-Efficient Multicore Embedded Computing

A. Munir, S. Ranka, A. Gordon-Ross
2012 IEEE Transactions on Parallel and Distributed Systems  
Finally, we present design challenges and future research directions for HPEEC system development.  ...  With Moore's law supplying billions of transistors on-chip, embedded systems are undergoing a transition from single-core to multicore to exploit this high-transistor density for high performance.  ...  ACKNOWLEDGMENTS This work was supported by the Natural Sciences and Engineering Research Council of Canada (NSERC) and the US National Science Foundation (NSF) (CNS-0953447 and CNS-0905308).  ... 
doi:10.1109/tpds.2011.214 fatcat:vagqmojdsjevvc2u2ewqrcjjpq

A Primarily Survey on Energy Efficiency in Cloud and Distributed Computing Systems [article]

Nikzad Babaii Rizvandi, Albert Y. Zomaya
2012 arXiv   pre-print
The idea is that instead of execution of a task with only one frequency, the task is executed with a linear combination of all frequencies in the DVFS-enabled processor.  ...  Also, to avoid hotspot in data centers due to high-loaded nodes, services can be moved from nodes with high-load and high temperature to nodes with smaller load and lower temperature.  ... 
arXiv:1210.4690v2 fatcat:lw3g75tmtfforo3shuid4cbp3q

Survey of Energy-Cognizant Scheduling Techniques

Sergey Zhuravlev, Juan Carlos Saez, Sergey Blagodurov, Alexandra Fedorova, Manuel Prieto
2013 IEEE Transactions on Parallel and Distributed Systems  
Hardware designers, well aware of these trends, include capabilities like DVFS (to throttle core frequency) into almost all modern systems.  ...  However, hardware capabilities on their own are insufficient and must be paired with other logic to decide if, when, and by how much to apply energy-minimizing techniques while still meeting performance  ...  In [21] , Lee and Zomaya exploit DVFS to devise energy conscious task scheduling algorithms for heterogeneous distributed systems (multiprocessor and multicomputer systems).  ... 
doi:10.1109/tpds.2012.20 fatcat:jmqqacuxzba47dpatf475ksoti

Thermal Aware Processor Operation Point Management

Naga Pavan Kumar Gorti, Arun K. Somani
2012 2012 IEEE Fifth International Conference on Utility and Cloud Computing  
Our scheme leverages application awareness and runtime monitoring for improving the lifetime of the chip, while achieving considerable energy savings.  ...  Existing schemes for dynamic voltage and frequency scaling (DVFS) do not account for the intertask thermal cycles.  ...  Schemes proposed in [14, 16, 12, 13, 6] concentrate on reducing dynamic power while the works in [1, 5, 10, 2, 21, 3, 4] integrate the reduction of static power along with the dynamic power.  ... 
doi:10.1109/ucc.2012.47 dblp:conf/ucc/GortiS12 fatcat:vr6ppcu5q5fmtpuz3ynutilpuy
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