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Resistive equivalents in CMOS

T.S. Lande, E. Olsen, C. Toumazou
2003 Electronics Letters  
For example, in Fig. 1 K = 4 was used.  ...  The value of AN in (7) must be replaced by the average value of the last few eigenvalues for best results.  ...  As pointed out in [9], short-channel effects degrade the device to a linear function of V~S , which may be explored for extended linear behaviour also when the device is saturated.  ... 
doi:10.1049/el:20030820 fatcat:iaaw5t5w6ze4jm6x2wog23mite

Design of Cryogenic Fully Differential Gain Boosting-OTA by the g_m/I_d methodology used for a 14 bit Pipelined-SAR ADC [article]

Mingjie Wen, Chao Luo, BoLun Zeng, Guoping Guo
2022 arXiv   pre-print
at 4.2K as the readout circuit for semiconductor-based quantum computing system.Using g_m/I_d methodology to get pre-computed lookup tables based on the cryogenic 110nm BSIM4 model.The proposed OTA achieves  ...  Quantum computing (QC) requires cryogenic electronic circuits as control and readout sub-systems of quantum chips to meet the qubit scale-up challenges.At this temperature,MOSFETs transistors exhibition  ...  length L, for a short channel we get the high f T ,and for a long channel,we get high intrinsic gain g m /g ds .Then pick the g m /I d value,for a large value,we can save the power and the V OV will be  ... 
arXiv:2204.09393v1 fatcat:wqfcywcghrewbjbdb6sdebz5q4

Design of Polymer-Based Trigate Nanoscale FinFET for the Implementation of Two-Stage Operational Amplifier

Jami Venkata Suman, Kusma Kumari Cheepurupalli, Haiter Lenin Allasi, JT Winowlin Jappes
2022 International Journal of Polymer Science  
This work is aimed at improving the semiconductor design structure by adjusting device parameters, analyzing the results, establishing the best FinFET device preferences, and selecting an application for  ...  For different circuit configurations, it also examines the DC and AC characteristics of the FinFET structure. A differential amplifier is built for RF application based on the device specifications.  ...  The SPICE file has a lookup table-based model of the TCAD device.  ... 
doi:10.1155/2022/3963188 fatcat:6eawmkfp6vf7jmqbffrw375bza

Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETs [chapter]

Ian O'Connor, Ilham Hassoune, David Navarro
2010 IFIP Advances in Information and Communication Technology  
This work presents a new style of gate-level reconfigurable cells based on the double-gate (DG) MOSFET device.  ...  The proposed dynamic-and static-logic cells demonstrate significant gate area reductions compared to conventional CMOS lookup table (LUT) techniques (between 80-95%) while configuration memory requirements  ...  to Atlas simulations over all regions of operation and for both long and short channel devices.  ... 
doi:10.1007/978-3-642-12267-5_6 fatcat:7jlk34n42zex7amq7fj67wbc5a

Fast Electro-thermal Simulation Strategy for SiC MOSFETs Based on Power Loss Mapping

Lorenzo Ceccarelli, Ramchandra Kotecha, Francesco Iannuzzo, Alan Mantooth
2018 2018 IEEE International Power Electronics and Application Conference and Exposition (PEAC)  
A fast electro-thermal simulation strategy for SiC power MOSFETs is presented in this paper.  ...  This approach features the detailed mapping of the device power losses under a wide range of operating conditions by using a compact electrical model and its experimental validation for a 1.2 kV/ 36 A  ...  The current source Ids represents the channel current and the diode D represents the body-diode. The internal device capacitances are C GS , C GD , and C DS .  ... 
doi:10.1109/peac.2018.8590288 fatcat:dc46tnd4unbbzgy7ta57rc2zf4

Technology assessment of Si and III-V FinFETs and III-V tunnel FETs from soft error rate perspective

Huichu Liu, Matthew Cotter, Suman Datta, Vijay Narayanan
2012 2012 International Electron Devices Meeting  
Based on the critical charge extraction for each emerging device-based circuit, the electrical and latching window masking effects have been studied.  ...  Transient error generation and transient current profiles in these devices have been evaluated using device simulation.  ...  A lookup table based Verilog-A model and transient current library generated from Sentaurus [4] are used to perform Spectre [10] circuit analysis for SRAM cell bit-flip study, as well as for combinational  ... 
doi:10.1109/iedm.2012.6479103 fatcat:wroso6zjnfbpxdngb5fwwurzzq

Graphene nanoribbon FETs: Technology exploration and CAD

Kartik Mohanram, Jing Guo
2008 2008 IEEE/ACM International Conference on Computer-Aided Design  
This paper summarizes (i) current understanding and prospects for GNRFETs as ultimately scaled, ideal ballistic transistors, (ii) physics-based modeling of GNRFETs to support circuit design and CAD, and  ...  Graphene nanoribbon FETs (GNRFETs) have emerged as a promising candidate for nanoelectronics applications.  ...  The drain current ID(VG, VD) and channel charge Q(VG, VD) computed for the intrinsic GNRFET can be used with data-driven table lookup simulators to simulate extrinsic GNRFETs.  ... 
doi:10.1109/iccad.2008.4681607 dblp:conf/iccad/MohanramG08 fatcat:h476u4sxjvddlbyro6pbqp5fva

MOSFET modeling for analog circuit CAD: problems and prospects

Y.P. Tsividis, K. Suyama
1994 IEEE Journal of Solid-State Circuits  
A set of benchmark tests that can be easily performed by the reader are given, and it is argued that most CAD models today cannot pass all the tests, even for simple, long-channel devices at room temperature  ...  The requirements for good MOSFET modeling are discussed, as they apply to usage in analog and mixed analogiligitsl design.  ...  The problems mentioned as a rule get worse for devices with short and/or narrow channels, and for implanted (i.e., real!) devices.  ... 
doi:10.1109/4.278342 fatcat:jigfeaw5brfd7gufa2iizl6eee

A novel co-design and evaluation methodology for ESD protection in RFIC

Li Li, Hongxia Liu, Zhaonian Yang, Linlin Chen
2012 Microelectronics and reliability  
In this methodology, the ESD protection is incorporated into RFIC core circuit design by extracting S parameters and constructing table-lookup model of the ESD matching network.  ...  ESD design of RFIC is a great issue due to the lack of ESD device models and the interactions between ESD protection and core circuits of RFIC.  ...  and S-parameter table-lookup model construction.  ... 
doi:10.1016/j.microrel.2012.06.003 fatcat:4r7v5kfs5beidjikjka2naqnc4

Analog IC Design Using Precomputed Lookup Tables: Challenges and Solutions

Abdelrahman A. Youssef, Boris Murmann, Hesham Omran
2020 IEEE Access  
The MOSFET characteristics also depend on the device sizing, i.e., the channel width (W ) and length (L).  ...  LUTS STRUCTURE The lookup tables (LUTs) are tables that store the device characteristics across its different DOFs.  ... 
doi:10.1109/access.2020.3010875 fatcat:klofi5dvr5cmpfxriknjflj5kq

Modeling and Optimization of Fringe Capacitance of Nanoscale DGMOS Devices

A. Bansal, B.C. Paul, K. Roy
2005 IEEE Transactions on Electron Devices  
CONCLUSION In this paper, we proposed an analytical fringe capacitance model for nanoscale MOSFETs.  ...  We develop the delay and power models for different types of gates with different drive strengths, as described in Section II-B. We have used a lookup-table-based characterization approach [10] .  ...  Dr His research interest includes modeling and estimation of process variation in deep submicrometer devices and circuits.  ... 
doi:10.1109/ted.2004.842713 fatcat:ki5vlrqvczegnnbc6kuszrxzky

Approaches to nanoscale MOSFET compact modeling using surface potential based models

M. Jagadesh Kumar, Himanshu Batwani, Mayank Gaur
2007 2007 International Workshop on Physics of Semiconductor Devices  
The surface potential based models not only lead to a more clear understanding of MOSFET device physics but also provide a better platform to develop an advanced model for circuit simulation.  ...  MOSFET technology has been at the forefront of the digital and analog circuits for very large scale integration. As a result, development of accurate and efficient MOSFET models becomes critical.  ...  One way to overcome this difficulty is the use of lookup tables and spline functions as proposed in [17] . A.  ... 
doi:10.1109/iwpsd.2007.4472455 fatcat:m4rxv3rgdnbgdmb5gguhmlbhxi

Key characterization factors of accurate power modeling for FinFET circuits

KaiSheng Ma, XiaoXin Cui, Kai Liao, Nan Liao, Di Wu, DunShan Yu
2014 Science China Information Sciences  
Due to its excellent device features, manufacture process compatibility and diversity of the circuit structures, The FinFET is considered appropriate candidate for the conventional bulk-MOSFET in sub-22nm  ...  Three key factors for FinFET power model are: the dimension of the look-up-tables, that to find out the most significant factors that influence FinFET power and to make them as indexes for the look-up-tables  ...  Due to this multi-gate structure, FinFET devices lesson the Short Channel Effects (SCEs) and offer higher on-state current, lower off-state current and high switching speed [8] .  ... 
doi:10.1007/s11432-014-5169-6 fatcat:oqhjxpsovjarjehcotujwcsfpa

Computational Efficiency Analysis of SiC MOSFET Models in SPICE: Static Behavior

Blake W. Nelson, Andrew Lemmon, Brian Taylor Deboi, Maksudul Hossain, Alan EiC Homer Mantooth, Chris New, Jared Helton
2020 IEEE Open Journal of Power Electronics  
Additionally, it reviews recently published SiC MOSFET models and presents a trade study on several candidate models likely to fare well in complex application simulations.  ...  This research develops a methodology to quantify the computational cost of model features and competitively benchmark models against each other.  ...  The modified Curtice model uses parameter lookup tables defined at discrete operating conditions in order to capture device behavior.  ... 
doi:10.1109/ojpel.2020.3036034 fatcat:v4ro3pioknhthc545kdlzgtjfi

A Medium-Voltage Medium-Frequency Isolated DC–DC Converter Based on 15-kV SiC MOSFETs

Li Wang, Qianlai Zhu, Wensong Yu, Alex Q. Huang
2017 IEEE Journal of Emerging and Selected Topics in Power Electronics  
Newly developed 15 kV silicon carbide (SiC) power MOSFETs with fast switching capability enable the reduction of size, weight, and complexity of MV MF power converters.  ...  Medium voltage (MV) medium frequency (MF) isolated DC-DC converter is essentially a device in future DC power distribution systems. It is also a key stage in a MV AC-AC solid state transformer.  ...  Output capacitance model for SiC MOSFETs and output capacitance of Wolfspeed 1.7 kV (CPM2-1700-0045B), 15 kV SiC MOSFETs.  ... 
doi:10.1109/jestpe.2016.2639381 fatcat:bppwuqhx3beqrggtaqofu6hbgm
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