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Systematic development of analog circuit structural macromodels through behavioral model decoupling

Ying Wei, Alex Doboli
2005 Proceedings of the 42nd annual conference on Design automation - DAC '05  
This paper presents a systematic methodology to create customized structural macromodels for a specific analog circuit.  ...  The novel contributions of the method include definition of the building block behavioral concept and two original algorithms to generate structural models.  ...  In this paper, customized structural macromodels are developed systematically for a circuit.  ... 
doi:10.1145/1065579.1065599 dblp:conf/dac/WeiD05 fatcat:6txcscpjjnhzpglclwidlsxyqy

Systematic development of analog circuit structural macromodels through behavioral model decoupling

Ying Wei, A. Doboli
2005 Proceedings. 42nd Design Automation Conference, 2005.  
This paper presents a systematic methodology to create customized structural macromodels for a specific analog circuit.  ...  The novel contributions of the method include definition of the building block behavioral concept and two original algorithms to generate structural models.  ...  In this paper, customized structural macromodels are developed systematically for a circuit.  ... 
doi:10.1109/dac.2005.193773 fatcat:mqqgvcqyqvexjhkl63olqz656i

Systematic development of nonlinear analog circuit macromodels through successive operator composition and nonlinear model decoupling

Ying Wei, Alex Doboli
2006 Proceedings of the 43rd annual conference on Design automation - DAC '06  
This paper presents a systematic methodology for developing structural nonlinear macromodels for analog circuits.  ...  The methodology also uses a novel description of circuit nonlinearities as a successive composition of three operators.  ...  Modeling of the nonlinear behavior of analog circuits is largely an unsolved problem.  ... 
doi:10.1145/1146909.1147167 dblp:conf/dac/WeiD06 fatcat:lsrj7si4cvcipl5q3x7atfieae

Systematic development of nonlinear analog circuit macromodels through successive operator composition and nonlinear model decoupling

Ying Wei, A. Doboli
2006 Proceedings - Design Automation Conference  
This paper presents a systematic methodology for developing structural nonlinear macromodels for analog circuits.  ...  The methodology also uses a novel description of circuit nonlinearities as a successive composition of three operators.  ...  Modeling of the nonlinear behavior of analog circuits is largely an unsolved problem.  ... 
doi:10.1109/dac.2006.229431 fatcat:koxa56yijjgjzou3fvogal7gqi

Model-Order Reduction of Finite-Element Approximations of Passive Electromagnetic Devices Including Lumped Electrical-Circuit Models

H. Wu, A.C. Cangellaris
2004 IEEE transactions on microwave theory and techniques  
The proposed methodology is demonstrated and validated through its application for the generation of reduced-order macromodels for a coaxial cable circuit and a microstrip directional coupler circuit.  ...  A methodology is presented for the development of reduced-order macromodels for multiport passive electromagnetic devices that include embedded lumped elements.  ...  Zhu, Cadence Corporation, San Jose, CA, for helpful discussions pertinent to the finite-element modeling methodology used and the implementation of the model-order reduction algorithm.  ... 
doi:10.1109/tmtt.2004.834582 fatcat:bvknqpqbkrgc3oae2kjjypd6ze

Overview of Signal Integrity and EMC Design Technologies on PCB: Fundamentals and Latest Progress

Tzong-Lin Wu, Frits Buesink, Flavio Canavero
2013 IEEE transactions on electromagnetic compatibility (Print)  
This paper reviews the fundamentals and latest progress of modeling, analysis, and design technologies for signal integrity and electromagnetic compatibility on PCB and package in the past decades.  ...  Finally, the necessity of practical training of designers is mentioned, and an experience relying on realistic PCB demonstrators is illustrated.  ...  Another way is developing equivalent circuit models, which can be linked directly with SPICE or other similar circuit simulators.  ... 
doi:10.1109/temc.2013.2257796 fatcat:zgv4k5njczes3i5lze7dejus2i

Challenges for signal integrity prediction in the next decade

Xavier Aragones, Antonio Rubio
2003 Materials Science in Semiconductor Processing  
Noise caused by the activity of integrated circuits is a limiting factor for the development of future VLSI circuits.  ...  Taking into account the effect of noise during the circuit design requires a fine electrical modeling of the substrate and noise generation.  ...  Acknowledgements This work has been partially supported by the Spanish Ministry of Science and Technology and the Regional European Development Funds (FEDER) from the European Union through Project TIC2001  ... 
doi:10.1016/s1369-8001(03)00077-5 fatcat:d4vha5zylvgjja3bnbike5t3je

Harmony: static noise analysis of deep submicron digital integrated circuits

K.L. Shepard, V. Narayanan, R. Rose
1999 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
The global level involves a careful combination of static noise analysis, static timing analysis, and detailed interconnect macromodels based on reduced-order modeling techniques.  ...  At the macro level, simplified interconnect models and timing assumptions guide efficient analysis.  ...  ACKNOWLEDGMENT The authors would like to acknowledge the significant contributions of P. C. Elmendorf and G. Zheng to the development of Global Harmony.  ... 
doi:10.1109/43.775633 fatcat:nldan4e2ezaxna2s6vy46bw4ja

Harmony: Static Noise Analysis of Deep Submicron Digital Integrated Circuits [chapter]

2009 Signal Integrity Effects in Custom IC and ASIC Designs  
The global level involves a careful combination of static noise analysis, static timing analysis, and detailed interconnect macromodels based on reduced-order modeling techniques.  ...  At the macro level, simplified interconnect models and timing assumptions guide efficient analysis.  ...  ACKNOWLEDGMENT The authors would like to acknowledge the significant contributions of P. C. Elmendorf and G. Zheng to the development of Global Harmony.  ... 
doi:10.1109/9780470546413.ch1 fatcat:kvkwrffn5vggfe4gy2ejff4aqq

Variability and Statistical Design

Sachin S. Sapatnekar
2008 IPSJ Transactions on System LSI Design Methodology  
With each technology generation, the effects of on-chip variations are seen to more profoundly affect digital circuit behavior.  ...  voltage or temperature) after the circuit is manufactured, which impact the performance of the design.  ...  Structural correlations arise from the structural properties of the circuit, and can be introduced through an example. Consider the reconvergent fanout structure shown in Fig. 2 .  ... 
doi:10.2197/ipsjtsldm.1.18 fatcat:oaz6jskes5e6zczgajfwr3v2xq

Table of contents

2013 2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo)  
An equivalent circuit modelling of the components in LF range is combined with measurement-based macromodelling in HF range. The developed models show high accuracy up to 1 GHz.  ...  Through block-box type deductions and measurements, BBIR model can be built. After the model is built, the cEMI behavior of a new testing board (or module) with the same IJC are estimated.  ...  Through time-and frequency-domain simulation results, we verified that the proposed structure can successfully detect TSV defects, while overcoming the limitations of the conventional direct probing methods  ... 
doi:10.1109/emccompo.2013.6735161 fatcat:he2rnqeezzbjfdymv2jd5ytpym

RECENT ADVANCES IN MODELING AND SIMULATION OF HIGH-SPEED INTERCONNECTS [chapter]

Michel Nakhla, Ram Achar
2005 Computational Methods in Large Scale Simulation  
The rapid increase in operating speeds, density and complexity of modern integrated circuits has made interconnect analysis a requirement for all state-of-the-art circuit simulators.  ...  As the frequency of operations increases, the interconnect lengths become a significant fraction of the operating wavelength, and conventional lumped models become inadequate in describing the interconnect  ...  circuits could be modelled using lumped RC or RLC circuit models.  ... 
doi:10.1142/9789812701084_0007 fatcat:eyjksrr5r5h75bthtmz66miv5y

Overcoming Variations in Nanometer-Scale Technologies

Sachin S. Sapatnekar
2011 IEEE Journal on Emerging and Selected Topics in Circuits and Systems  
Nanometer-scale circuits are fundamentally different from those built in their predecessor technologies in that they are subject to a wide range of new effects that induce on-chip variations.  ...  The impact of such variations on key circuit performance metrics is quite significant, resulting in parametric variations in the timing and power, and potentially catastrophic failure due to reliability  ...  In addition to spatial correlations, circuits may show structural correlations that affect their timing behavior.  ... 
doi:10.1109/jetcas.2011.2138250 fatcat:fo5udiv7mzc2po2uwspuj2ebzy

A comprehensive review of FET‐based pH sensors: materials, fabrication technologies, and modeling

Soumendu Sinha, Tapas Pal
2021 Electrochemical Science Advances  
This paper aims to review the fabrication technologies, device structures, sensing film materials, and modeling techniques utilized for FETbased pH sensors.  ...  The demand for miniaturized point-of-care chemical/biochemical sensors has driven the development of field-effect transistors (FETs) based pH sensors over the last 50 years.  ...  The developed macromodel is suitable for performing circuit simulations and studying nonideal behaviors of the sensor.  ... 
doi:10.1002/elsa.202100147 fatcat:5ehkneldvfh23iy4t2kxdco5au

On the Confidence in Bit-Alias Measurement of Physical Unclonable Functions

Florian Wilde, Michael Pehl
2019 2019 17th IEEE International New Circuits and Systems Conference (NEWCAS)  
The results prove the need for a high number of samples when the unpredictability of PUFs is tested.  ...  The expectation for the probability of 1 at some position in the response, the Bit-Alias, is a state-of-the-art metric in this regard.  ...  The developed characterization clearly shows that non-ideal effects influence the PLL's dynamic behavior like pull-out range, gain crossover frequency and phase noise behavior.  ... 
doi:10.1109/newcas44328.2019.8961298 dblp:conf/newcas/WildeP19 fatcat:wv67uzuqlvcmhma3nahzdrr2ta
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