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Design And Implementation of Combined Pipelining and Parallel Processing Architecture for FIR and IIR Filters Using VHDL

Jacinta Potsangbam, Manoj Kumar
2019 International Journal of VLSI Design & Communication Systems  
This paper aims at designing and implementing a combined pipelining and parallel processing architecture for FIR and IIR filter using VHDL (Very High Speed Integrated Circuit Hardware Descriptive Language  ...  The implementation is done by using VHDL codes. FIR and IIR filters structures are implemented at 1200 KHz clock frequency.  ...  Manoj Kumar, Assistant Professor in the dept. of ECE, NIT Manipur for his endless support and valuable guidance throughout the research work.  ... 
doi:10.5121/vlsic.2019.10401 fatcat:gamc5lea55f4rmscauymg3ans4

Development trends and distinctive features of online insurance

Gulnora Akramova, Bakhodir Sadritdinov
2022 Научные исследования и инновации в индустрии 4.0.  
processes.  ...  In the conditions of intensive informatization processes, modern society requires an active implementation of information technologies in the insurance industry.  ...  The work is aimed at improving the quality of services, reducing their cost through the introduction of modern information systems and software products for accounting and rational use of material and  ... 
doi:10.47689/4.v1i1.3555 fatcat:m6i73egrrvesfirvk2nrte2vja

Parallel Processing Implementation on Weather Monitoring System for Agriculture

Dwi Susanto, Kudang Boro Seminar, Heru Sukoco, Liyantono Liyantono
2017 Indonesian Journal of Electrical Engineering and Computer Science  
The purpose of this research to develop a real-time weather monitoring system using a parallel computation approach and analyze the computational performance (i.e., speed up and efficiency) using the ARIMA  ...  The developed system wireless has been implemented on sensor networks (WSN) platform using Arduino and Raspberry Pi devices and web-based platform for weather visualization and monitoring.  ...  Implementation of Weather Monitoring System At this stage, the testing of prototype and implemented of system design.  ... 
doi:10.11591/ijeecs.v6.i3.pp682-687 fatcat:ech3fswi65ef7dlztmqgzr33ym

Design and Implementation of a Scalable General High Performance Remote Sensing Satellite Ground Processing System on Performance and Function [chapter]

Jingshan Li, Dingsheng Liu
2009 Lecture Notes in Computer Science  
This paper discusses design and implementation of a scalable high performance remote sensing satellite ground processing system using a variety of advanced hardware and software application technology  ...  These advanced technologies include the network, parallel file system, parallel programming, job schedule, workflow management, design patterns,etc, which make performance and function of remote sensing  ...  The optimized method of three dimensions is showed in Figure 2 .This layer shields the complexity of using of parallel software, and users can design and implement their data processing application without  ... 
doi:10.1007/978-3-642-01973-9_41 fatcat:ffcm7gs56be4pj5cay576fveki

The Modeling of the ERP Systems within Parallel Calculus

Loredana MOCEAN
2011 Informatică economică  
Because this, is obviously a parallel approach to design and implement them within parallel algorithms, parallel calculus and distributed databases.  ...  systems and flexible configuration.  ...  When we think to design a parallel ERP system, we must take in mind several important issues related to parallel processing: • Construction of efficient parallel computers; • Design of efficient parallel  ... 
doaj:737dffc723ec4e7c84f5ee482f30d917 fatcat:54sboyadcvethjka77ztu3slqa

An integrated course on parallel and distributed processing

José C. Cunha, João Lourenço
1998 Proceedings of the twenty-ninth SIGCSE technical symposium on Computer science education - SIGCSE '98  
, concurrent programming models, data and control distribution, concurrency control and recovery in transactional systems, and parallel processing models; the practical component illustrates the design  ...  and implementation issues involved in selected topics such as a data and control distribution problem, a distributed transaction-based support system and a parallel algorithm.  ...  control and recovery in transactional systems, and parallel processing models.  ... 
doi:10.1145/273133.274300 dblp:conf/sigcse/CunhaL98 fatcat:g7tbbyr6tbf5heo27a5zaouesa


H. Nikolov, M. Thompson, T. Stefanov, A. Pimentel, S. Polstra, R. Bose, C. Zissulescu, E. Deprettere
2008 Proceedings of the 45th annual conference on Design automation - DAC '08  
It offers a fully integrated tool-flow in which design space exploration (DSE), system-level synthesis, application mapping, and system prototyping of MP-SoCs are highly automated.  ...  Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems.  ...  Therefore, with 288KB of memory, we were able to implement systems with up to 8 MicroBlazes and 8 DCT IPs (16 cores, processing 8 tiles in parallel).  ... 
doi:10.1145/1391469.1391615 dblp:conf/dac/NikolovTSPPBZD08 fatcat:4t4q4kv5xfdyhoqgbe46g2yway

Implementation of Transport Protocols Using Parallelism and VLSI Components

T. Braun, J.H. Schiller, M. Zitterbart
1994 Journal of Communication and Information Systems  
This paper discusses experiments with parallel protocol implementations and introduces a protocol especia!ly designed to support parallelism.  ...  Well-suited protocols and efficient protocol implementation tech niques form the core of such systems.  ...  Parallel Protocol Implementation and Design Implementation of Standard Protocols The use of parallelism at the point of bottleneck generally is a suitable approach to improve the performance of computing  ... 
doi:10.14209/jcis.1994.4 fatcat:wixtqql7fzgedpctkmsc5hoggq

Parallel embedded processor architecture for FPGA-based image processing using parallel software skeletons

Hanen Chenini, Jean Pierre Dérutin, Romuald Aufrère, Roland Chapuis
2013 EURASIP Journal on Advances in Signal Processing  
Additionally, the implementation of image processing applications on MPSoC system will need to exploit the parallelism and the pipelining in algorithms with the hope of delivering significant reduction  ...  Today, the problem of designing suitable multiprocessor architecture tailored for a target application field raises the need for a fast and efficient multiprocessor system-on-chip (MPSoC) design environment  ...  Acknowledgements This work was funded by the French National Research Agency, the European Commission (Feder funds), Auvergne Region in the framework of the LabEx IMobS 3 and the European Project SEAMOVES  ... 
doi:10.1186/1687-6180-2013-153 fatcat:hx27il6bx5bsplgjffgqqj6xlu

Comparative Analysis and Efficient VLSI Implementation of FIR Filter

2014 International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering  
Using combination of pipeline and parallel processing power consumption can further reduced.  ...  Considering above parameters different architectures are implemented such as transpose-form, pipelined filter and parallel processing.  ...  System Generator block (red colour symbol) generates HDL netlist and create test bench for FPGA design implementation. For each method there are different models designed and implemented. Figure1.  ... 
doi:10.15662/ijareeie.2014.0307030 fatcat:6p5yp5nxlrhxjn72jou72eazsa

Signal Processing on Platforms with Multiple Cores: Part 2-Applications and Design [From the Guest Editors

Yen-Kuang Chen, Chaitali Chakrabarti, Shuvra Bhattacharyya, Bruno Bougard
2010 IEEE Signal Processing Magazine  
Signal processing systems of tomorrow will be and must be implemented on platforms with multiple cores.  ...  The articles provided coverage of key trends and emerging directions in architectures, design methods, software tools, and application development for the design and implementation of multicore signal-processing  ...  Signal processing systems of tomorrow will be and must be implemented on platforms with multiple cores.  ... 
doi:10.1109/msp.2009.935527 fatcat:tx3s7ur7azbwnmuaa7fjixyrea

A methodology for parallel implementation of the basic operations of digital signal processing

O. V. Klimova
2019 MECHANICS, RESOURCE AND DIAGNOSTICS OF MATERIALS AND STRUCTURES (MRDMS-2019): Proceedings of the 13th International Conference on Mechanics, Resource and Diagnostics of Materials and Structures  
A methodology for parallel implementation of the basic operations of digital signal processing is considered.  ...  The methodology provides a set of formal transformations that allow you to transform a sequential computing system into a parallel adaptive processing mode.  ...  At the present state of the art in parallel computing, this research stage is an integral part [1] [2] [3] of the process of designing advanced computation systems.  ... 
doi:10.1063/1.5135131 fatcat:biynzfiyand6zeg4e4jn2feqjy

Guest Editors' Introduction to Special Issue on Advances in DSP System Design

J. Takala, W. J. Gross, W. Sung
2013 Journal of Signal Processing Systems  
This special issue contains a selection of recent papers on design and implementation of signal processing systems ranging from circuit level architectures to scheduling methods and from application-specific  ...  These challenges are present in signal processing systems implying the need to improve design methods and find more efficient algorithm-architecture optimizations.  ...  His research interests are in the design and implementation of signal processing systems and custom computer architectures. Dr.  ... 
doi:10.1007/s11265-013-0731-9 fatcat:gzwdsy47ibcwjawy5oo5v55ka4

FPGA-based many-core System-on-Chip design

M. Baklouti, Ph. Marquet, J.L. Dekeyser, M. Abid
2015 Microprocessors and microsystems  
In particular, Single Instruction Multiple Data (SIMD) many-core architectures have been adopted for multimedia and signal processing applications with massive amounts of data parallelism where both performance  ...  Moreover, the increasing gap between design productivity and chip complexity requires new design methods.  ...  The data from the video decoder is stored in an SDRAM memory and then processed using the FPGA-based massively parallel system.  ... 
doi:10.1016/j.micpro.2015.03.007 fatcat:op2c27orafgczak62q5n665tzu

An extensible, maintainable and elegant approach to hardware source code generation in Reconfig-P

Van Nguyen, David Kearney, Gianpaolo Gioiosa
2010 The Journal of Logic and Algebraic Programming  
Currently there are two alternative designs for the implementation of P systems in Reconfig-P: the rule-oriented design and the region-oriented design.  ...  new implementation strategies and implementations of additional types of P systems.  ...  Linking and synchronisation in a parallel processing unit In the implementation of a parallel processing unit (e.g., the system processing unit), it is necessary to link and synchronise the embedded processing  ... 
doi:10.1016/j.jlap.2010.03.013 fatcat:mufxwl3ulvacxn2xr2bttahlhe
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