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A holistic design approach for systems on chip

Franz Dielacher, Christian Vogel, Peter Singerl, Stefan Mendel, Andreas Wiesbauer
2009 2009 IEEE International SOC Conference (SOCC)  
We exemplify the possibilities of a holistic design approach for systems on chip.  ...  After recapitulating basic observations for next generation systems, we outline the advantages and challenges of a holistic design approach. The discussion is supported by real world examples.  ...  In contrast to fractional-N PLLs, ADPLLs replace the voltage-controlled oscillator (VCO) by a digitally controlled oscillator (DCO), the analog loop filter by a digital loop filter, and the phase-frequency  ... 
doi:10.1109/soccon.2009.5398035 dblp:conf/socc/DielacherVSMW09 fatcat:on6bizgss5gkneibijupgzcqda

FPGA signal processing using sigma-delta modulation

C. Dick, F. Harris
2000 IEEE Signal Processing Magazine  
In any fixed-point datapath, careful consideration must be given to the DC aspects of the design.  ...  As the frequency band of interest occupies a smaller fractional bandwidth, the order of the required filter increases.  ... 
doi:10.1109/79.814644 fatcat:lrpqlcfls5aobemocwpckgyovq

Hexagonal Sigma-Delta modulation

G. Luckjiff, I. Dobson
2003 IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications  
The switching rate of the modulator is important for power electronic design and formulas for the average switching rate are derived for constant and slowly varying sinusoidal inputs.  ...  This paper analytically derives the output spectrum of the hexagonal sigmadelta modulator with a constant input using ergodic theory and Fourier series on the hexagon.  ...  To simplify our analysis of this highly nonlinear system, we make two assumptions. The first assumption is that the modulator input is constant.  ... 
doi:10.1109/tcsi.2003.815190 fatcat:rniho2q2zfa4zbcuok3dpshtci

National Conference on Recent Advances in Communication Engineering and Information Technology

2020 International journal for innovative engineering and management research  
Our philosophy is not only to educate engineers, but also to prepare them for future leadership roles in industry– indeed, many of our alumni are now Directors of Industry, leading their organizations  ...  We invest much effort to enhance our student's learning experience through the application of ECE technology.  ...  This proposed design has a 166.19 % fractional bandwidth with a 7.1 GHz center frequency in the simulation, and a decent match has been observed in the measurement through the values of 170.10 % bandwidth  ... 
doi:10.48047/ijiemr/v08/spe/02 fatcat:woay334irjgebf5bixuc4ng6em

Digital Deep-Submicron CMOS Frequency Synthesis for RF Wireless Appllications [article]

Robert Bogdan Staszewski
2002 unpublished
Fractional-N Architecture In fractional-N synthesizers, the output frequency can increment by fractions of the reference frequency, allowing the latter to be much greater than the required channel spacing  ...  Frequency Synthesizer as an Integral Part of an RF Transceiver RF synthesizers, specifically, remain one of the most challenging tasks in mobile RF systems because they must meet very stringent requirements  ... 
doi:10.13140/rg.2.1.1975.4326 fatcat:3rrnnvkihnh3hmuv7u4aurjrnm

An 11-bit, 12.5-MHz, Low-Power, Low-Voltage, Continuous-Time Sigma-Delta Modulator in 0.13 µm CMOS Technology

Eugenio Di Gioia, Technische Universität Berlin, Technische Universität Berlin, Heinrich Klar
2011
In order to reduce the equipment cost the integration of the ADC on the same chip containing the digital circuits is highly desirable.  ...  The trend of the last years in the industry of integrated circuits has shifted more and more from the analog toward the digital world.  ...  Mixed Design of Integrated Circuits and System, IEEE, MIXDES 2010 • Eugenio Di Gioia, Christoph Schwoerer and Heinrich Klar.  ... 
doi:10.14279/depositonce-2715 fatcat:wp5d33w5fnftxfgcgxjxobzc24

A Low-Power Silicon-Photomultiplier Readout ASIC for the CALICE Analog Hadronic Calorimeter

Zhenxiong Yuan
2020
This thesis presents the design of such an application-specific integrated circuit (ASIC) for the charge and timing readout of the SiPMs.  ...  The analog hadron calorimeter based on the SiPM-on-tile technology is one of the highly granular candidates of the imaging calorimeters.  ...  The natural frequency ω n , usually smaller than one fifteenth of the reference frequency, is directly related to the system bandwidth.  ... 
doi:10.11588/heidok.00028659 fatcat:2t4xijsz45clzeffdaocclygdi

fMRI artifact correction in EEG and EMG data

Johann Glaser
2012 unpublished
These are highly irregular and last for several seconds which means a frequency considerably below 1 Hz.  ...  The recording used a sigmadelta analog-to-digital converter (ADC) with a sampling rate of 2048 Hz.  ...  The rapidly changing magnetic fields of the fMRI gradient system induce voltages in the EEG leads which are several orders of magnitude above the EEG signal itself.  ... 
doi:10.25365/thesis.21952 fatcat:gjbcbl65lfdojj4uiui2k4w3cm

High-resolution mismatch-shaping digital-to-analog converters

J. Steensgaard
ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196)  
signal in low frequency bands, in this dynamic-mismatch sensor design, the same 5 th -order continuous-time sigmadelta ADC with an integrated bandgap as in [67, 68] is used to digitize the output of  ...  In this design, after power-area-performance trade-off, the simulated integrated input-referred noise (V n ) of the OTA is 7.7µV rms in a frequency band of [10Hz, 200kHz].  ...  (DEM), DMM does not increase the noise floor because the mismatch effect is reduced instead of randomized.  ... 
doi:10.1109/iscas.2001.921906 dblp:conf/iscas/Steensgaard01 fatcat:eqdim22dhjgbdgppzstrncxrim

A multilevel converter structure for grid-connected PV plants

Darko <1976> Ostojic, Gabriele Grandi
2010
For the simulation, the Simulink tool of Matlab has been adopted, whereas the experiments have been carried out by a full-scale low-voltage prototype of the whole PV generation system.  ...  All the research work was done at the Lab of the Department of Electrical Engineering, University of Bologna.  ...  This required the introduction of a per-unit system where the system quantities are expressed as fractions of a defined base unit quantity, grouped in Tab. 1.  ... 
doi:10.6092/unibo/amsdottorato/2316 fatcat:nqee3umygrfxnou4ig4al3t7zy