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Synchronization primitives for a multiprocessor: a formal specification

A. Birrell, J. Guttag, J. Horning, R. Levin
1987 Proceedings of the eleventh ACM Symposium on Operating systems principles - SOSP '87  
The implementation of the synchronization primitives has two l a y ers.  ...  For example, the atomicity of the Threads synchronization primitives is ensured by the atomicity of the underlying hardware's test-and-set instruction.  ... 
doi:10.1145/41457.37509 dblp:conf/sosp/BirrellGHL87 fatcat:rgx6riotwjfq7nywdhjyeyi5nm

Synchronization primitives for a multiprocessor: a formal specification

A. Birrell, J. Guttag, J. Horning, R. Levin
1987 ACM SIGOPS Operating Systems Review  
We start with an informal description, present a way to formally specify interfaces in concurrent systems, give a formal specification of the synchronization primitives, briefly discuss the implementation  ...  , and conclude with a discussion of what we have learned from using the specification for more than a year.  ...  Acknowledgements Leslie Lamport and Jeannette Wing were both involved in the discussions leading to this specification, and helped us to understand the issues involved.  ... 
doi:10.1145/37499.37509 fatcat:sigk26l6hnbz3lz6vl2cpnqc2q

Multiprocessor simulation using communicating sequential processes

Pranav S. Vaidya, Jaehwan John Lee
2010 International Journal of Computer Aided Engineering and Technology  
Furthermore, we show how this formal description of a multiprocessor system can be mapped to the primitives provided by the Kent C++CSP multithreading library to create a multithreaded multiprocessor simulator  ...  Here, we show how a multiprocessor system can be described using the primitives of CSP.  ...  Furthermore, they showed how the OSM specification can be used to synthesize cycle-accurate simulators for Multiprocessor System-on-a-chip (MPSoC).  ... 
doi:10.1504/ijcaet.2010.029599 fatcat:5wcz3aynzzdtjibtw5blxtxod4

A Unified Formal Specification and Analysis of the New Java Memory Models [chapter]

Varsha Awhad, Charles Wallace
2003 Lecture Notes in Computer Science  
Since the original descriptions of the models are so different, in devising a unified formalization we run the risk of what Börger calls the "formal system straitjacket" [4] : by forcing the specifications  ...  Because of the formal basis of ASM, it is also a very useful tool for verification.  ... 
doi:10.1007/3-540-36498-6_9 fatcat:fhqxszcjsrbpxfv4zbgkrsxy5a

A multiprocessor using protocol-based programming primitives

Erik P. DeBenedictis
1987 International journal of parallel programming  
The synchronization necessary to separate timesteps is less general that provided by MS; specifically, no data needs to flow for this synchronization.  ...  A later section uses trees for broadcasting and synchronization.  ... 
doi:10.1007/bf01408174 fatcat:pfkixlpoanbxtakpwrfpddef4e

Eclipse: heterogeneous multiprocessor architecture for flexible media processing

M.J. Rutten, J.T.J. van Eijndhoven, E.D. Pol Egbert, G.T. Jaspers, P. van der Wolf, O.P. Gangwal, A. Timmer
2002 Proceedings 16th International Parallel and Distributed Processing Symposium  
Eclipse defines a heterogeneous multiprocessor architecture template for data-dependent stream processing.  ...  Intended as a scalable and flexible subsystem of forthcoming media-processing systems-on-a-chip, Eclipse combines application configuration flexibility with the efficiency of function-specific hardware  ...  The Eclipse architecture has been explored in a first instantiation for simultaneous MPEG-2 encoding and decoding of multiple streams at various resolutions.  ... 
doi:10.1109/ipdps.2002.1016517 dblp:conf/ipps/RuttenEPJWGT02 fatcat:h66rcwhjv5e4pm5jyggrjqaxva

Efficient synchronization of multiprocessors with shared memory

Clyde P. Kruskal, Larry Rudolph, Marc Snir
1988 ACM Transactions on Programming Languages and Systems  
A new formalism is given for read-modify-write (RMW) synchronization operations.  ...  This includes memory updates of the form mem-val := mem-val op val, where op need not be associative, and a variety of synchronization primitives.  ...  For example, the synchronization primitives defined by Zhu and Yew [29] for the Cedar machine at the University of Illinois and by Pier and Gajski [7] use full word tags.  ... 
doi:10.1145/48022.48024 fatcat:nsh4a45ezna5jca3kv66yxsl2u

A heterogeneous multiprocessor architecture for flexible media processing

M.J. Rutten, J.T.J. van Eijndhoven, E.G.T. Jaspers, P. van der Wolf, O.P. Gangwal, A. Timmer, E.-J.D. Pol
2002 IEEE Design & Test of Computers  
Therefore, although the generic platform with its interconnect structure can be reused over various generations, a change in application requirements necessitates a redesign of the application-specific  ...  Currently, these subsystems are dedicated to a single application, and the hardware cannot be reused for other applications within the same domain.  ...  Kahn formally proved that such a system has a well-defined, unique behavior.  ... 
doi:10.1109/mdt.2002.1018132 fatcat:u6rnagzo6jew7kyptdc76voh2a

An Operational Model for Multiprocessors with Caches [chapter]

Salil Joshi, Sanjiva Prasad
2010 IFIP Advances in Information and Communication Technology  
The programming model consists of a simple imperative language extended with common synchronization primitives such as locks or barrier instructions.  ...  The main results show that by precluding certain data races or by placing certain synchronization constraints, sequentially consistent behavior can be obtained for multiprocessor execution even in the  ...  We also plan to investigate other synchronization primitives in a similar manner, in particular atomic compareand-swap instructions for synchronization which are preferred over locks in many processors  ... 
doi:10.1007/978-3-642-15240-5_27 fatcat:pgv2kq4wtjgpfb4q4qqiau3mje

Scheduling DAG's for asynchronous multiprocessor execution

B.A. Malloy, E.L. Lloyd, M.L. Soffa
1994 IEEE Transactions on Parallel and Distributed Systems  
A new approach is given for scheduling a sequential instruction stream for execution '4n parallel" on asynchronous multiprocessors.  ...  Together, our results establish that fine grained parallelism can be exploited in a substantial manner when scheduling a sequential instruction stream for execution "ln parallel" on asynchronous multiprocessors  ...  Madison for their insights into the Data General multiprocessor.  ... 
doi:10.1109/71.282560 fatcat:axgziqquvbgdzj3o65ojocubry

Verifying large-scale multiprocessors using an abstract verification environment

Dennis Abts, Mike Roberts
1999 Proceedings of the 36th ACM/IEEE conference on Design automation conference - DAC '99  
We introduce new data types and a diagnostic programming interface (DPI) that provide the basis for Raven.  ...  Finally, we show results from an interconnect router ASIC used in a large-scale multiprocessor.  ...  A special thanks to Tom Court, Abdulla Bataineh, Steve Scott, Greg Faanes, Michael Woodacre, Paul Frank, Scott Schroeder, and Galen Flunker for their insightful comments and support of the project.  ... 
doi:10.1145/309847.309907 dblp:conf/dac/AbtsR99 fatcat:5nwr7mktqzhfpnwxku5rhsjrpu

Modeling Multiprocessor Cache Protocol Impact on MPI Performance

Ghassan Chehaibar, Meriem Zidouni, Radu Mateescu
2009 2009 International Conference on Advanced Information Networking and Applications Workshops  
Our Ping-Pong model allows comparison of different primitive implementations in the context of different cache coherence protocols.  ...  It is based on formal modeling where functional aspects and performance aspects are integrated by composition and can be refined independently.  ...  Acknowledgment We are grateful to Holger Hermanns and Hubert Garavel for useful discussions. This research was supported by the MULTIVAL project of the MINALOGIC "Pôle de compétitivité". M.  ... 
doi:10.1109/waina.2009.117 dblp:conf/aina/ChehaibarZM09 fatcat:6sj2w4jx4vh3rfmkv3bj77quo4

A formal specification and verification framework for Time Warp-based parallel simulation

P. Frey, R. Radhakrishnan, H.W. Carter, P.A. Wilsey, P. Alexander
2002 IEEE Transactions on Software Engineering  
The intent is to provide a common formal base from which domain specific simulators can be modeled, verified, and developed. PVS constructs are developed to represent basic Time Warp constructs.  ...  AbstractÐThis paper describes a formal framework developed using the Prototype Verification System (PVS) to model and verify distributed simulation kernels based on the Time Warp paradigm.  ...  This encompasses three tasks: 1) formal specification of the basic time warp protocol, 2) formal verification of the time warp specification, and 3) generation of a reusable specification framework for  ... 
doi:10.1109/32.979989 fatcat:nmspntfysndebjwy6stw6mt2xm

Computation and communication refinement for multiprocessor SoC design

Radu Marculescu, Umit Y. Ogras, Nicholas H. Zamora
2006 ACM Transactions on Design Automation of Electronic Systems  
Consequently, formal and disciplined system-level design methodologies are in great demand for future multiprocessor design.  ...  In addition, a communication refinement step is critical for optimizing the communication infrastructure in this multiprocessor setup.  ...  Application Mapping for Multiprocessor Platforms.  ... 
doi:10.1145/1142980.1142983 fatcat:mqdulmqw5ngmljor6imi5c3z5i

Shared Memory Multiprocessor Support for SAC [chapter]

Clemens Grelck
1999 Lecture Notes in Computer Science  
Array operations in Sac are based on elementwise specifications using so-called With-loops. These language constructs are also well-suited for concurrent execution on multiprocessor systems.  ...  Besides the basic compilation scheme, a brief overview of the runtime system is given.  ...  Programs have to be designed specifically for the execution in multiprocessor environments and, depending on the level of abstraction, possibly even for particular architectures or concrete machine configurations  ... 
doi:10.1007/3-540-48515-5_3 fatcat:4vyvbyc7djflxh27lrkc4rq3qq
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