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Symmetric Circuits and Model-Theoretic Logics

Gregory Barnard Wilsenach, Apollo-University Of Cambridge Repository, Apollo-University Of Cambridge Repository, Anuj Dawar
2019
We develop a broad range of new techniques and approaches in order to study these more general symmetric circuit models.  ...  We also show that in order to define a symmetric circuit model that goes beyond FPC we need to consider circuits with gates that are allowed to compute non-symmetric functions.  ...  We have explored methods of extending the symmetric circuit model by allowing for richer bases.  ... 
doi:10.17863/cam.44848 fatcat:wtk3g47ecvbihn4cvfihrcfkv4

Page 2809 of Mathematical Reviews Vol. , Issue 93e [page]

1993 Mathematical Reviews  
Heinrich Seidel (Dresden) 93e:68024 68Q20 Beame, Paul (1-WA-CE); Brisson, Erik (1-WA-CE); Ladner, Richard (1-WA-CE) The complexity of computing symmetric functions using threshold circuits. Theoret.  ...  As a consequence, there is a thresh- old circuit for any n-input symmetric function which has size O(n) and depth bounded by O(loglogn).  ... 

Page 506 of Mathematical Reviews Vol. , Issue 2004a [page]

2004 Mathematical Reviews  
Summary: “We introduce a new model for computing polynomi- als: a depth-2 circuit with a symmetric gate at the top and plus gates at the bottom; i.e., the circuit computes a symmetric function in linear  ...  ,/mn) (where S4 is the dth elemen- tary symmetric polynomial in m variables, and the /;’s are linear functions). We refer to this model as the symmetric model.  ... 

Page 1190 of Mathematical Reviews Vol. 46, Issue 4 [page]

1973 Mathematical Reviews  
ternary logic circuits.  ...  Maps and tabular simplification procedures are described. Transistor circuits implementing j-functions are given as well as basic ternary logic circuits.  ... 

Page 3736 of Mathematical Reviews Vol. , Issue 90F [page]

1990 Mathematical Reviews  
The circuits are fully modular and have all the advantages of symmetric circuits. Kiilmiz Cevik (TR-ISTNT-E) 90f:94058 94C05 Ushida, A. (J-TOKSUE); Chua, L.  ...  A relaxation method is used to transform each nonlinear element into an associated relaxation model. The models are composed of linear time-invariant elements and independent sources.  ... 

Page 3399 of Mathematical Reviews Vol. , Issue 87f [page]

1987 Mathematical Reviews  
The conditions are determined from the circuit topol- ogy and the circuit-theoretic properties for both tree and cotree resistors.” 94D Fuzzy sets and logic See also 03068, 03160.  ...  The universality of the elements AND- NOT with minimum number of inputs in this class of asynchronous logic circuits is shown.”  ... 

Neural computation of arithmetic functions

K.-Y. Siu, J. Bruck
1990 Proceedings of the IEEE  
It has been known that neural networks can be much more powerful than traditional logic circuits, assuming that each threshold element can be built at a cost comparable to that of AND, OR, Nor logic elements  ...  Whereas any logic circuit of polynomial size (in n) that computes the product of two n-bit numbers requires unbounded delay, such computations can be done in a neural network with "constant" delay.  ...  Thomas Kailath for his guidance, constant encouragement, and financial support.  ... 
doi:10.1109/5.58350 fatcat:5rtgnm2cnbch7lnm6ocludhrca

Logic circuits based on carbon nanotubes

A Bachtold, P Hadley, T Nakanishi, C Dekker
2003 Physica. E, Low-Dimensional systems and nanostructures  
Indeed, we demonstrate 1-, 2-, and 3-transistor circuits that exhibit a wide range of digital logic operations such as an inverter, a logic NOR, and an AC ring oscillator. ?  ...  We demonstrate logic circuits with ÿeld-e ect transistors based on single carbon nanotubes.  ...  While this model provides a reasonable starting point for modeling our devices, a full theoretical description will need to consider the one-dimensional nature and semi-ballistic transport of semiconducting  ... 
doi:10.1016/s1386-9477(02)00580-5 fatcat:q2xzgdtyfzh5fe7jbtkgjzs3qy

Benchmarking the quantum cryptanalysis of symmetric, public-key and hash-based cryptographic schemes [article]

Vlad Gheorghiu, Michele Mosca
2019 arXiv   pre-print
, circuit compilation and quantum fault-tolerance theory.  ...  Quantum algorithms can break factoring and discrete logarithm based cryptography and weaken symmetric cryptography and hash functions.  ...  Run Grover's algorithm Generate and optimize reversible circuits Classical query model Logical layer Embed reversible circuits into error correcting codes; estimate resources.  ... 
arXiv:1902.02332v2 fatcat:u5h2qcpbkbbmjozhx63wlujz6y

Subject index

William Pierce
1965 IEEE Transactions on Electronic Computers  
and of the securities market.  ...  ., vol 7 puting equipment were in bookkeeping, acmajor one-time projects and evaluating and pp 95-98; Jul 1964. counting, confirmation of sales and purchases improving various continuing elements The organizational  ...  Synthesis of Minimal NOR/NAND Logic Direct Coupled Logic Circuits 3571 Translators, Linguistic Basis for Logic De-STornage: Cryogenic3572of Linear Algebraic Equations, Alterna-Truck Route Scheduling,  ... 
doi:10.1109/pgec.1965.264070 fatcat:7v5i5owjlfhxnff64ucyckjpbu

Study of Timing Characteristics of NOT Gate Transistor Level Circuit Implemented Using Nano-MOSFET by Analyzing Sub-Band Potential Energy Profile and Current-Voltage Characteristic of Quasi-Ballistic Transport

Chek Yee Ooi, Soo King Lim
2016 World Journal of Nano Science and Engineering  
Theoretical and simulated value of rise time, fall time, propagation delay and maximum signal frequency of logical NOT transistor level circuit is closely matched.  ...  This paper presents the quasi-ballistic electron transport of a symmetric double-gate (DG) nano-MOSFET with 10 nm gate length and implementation of logical NOT transistor circuit using this nano-MOSFET  ...  Low output voltage V OL of NOT transistor level circuit in Figure 2 is given by From theoretical modeling and also WinSpice simulation, V OH = 0.4 V.  ... 
doi:10.4236/wjnse.2016.64016 fatcat:feycfs6jxbh5pnqa3i53vagade

LOGIC THRESHOLD FOR MICRORING RESONATOR-BASED BDD CIRCUITS: PHYSICAL AND OPERATIONAL ANALYSES

Ozan Yakar, İlke Ercan
2019 Turkish Journal of Engineering (TUJE)  
optimization of the microring resonator-based BDD logic circuits.  ...  However, the physical limitations imposed on their logic implementation has not been studied in depth to enable design of efficient circuits.  ...  Blanca Ameiro Mateos for extensive support with technical drawing of the BDD circuit schematic and Mr. Gökberk Elmas for comments on the manuscript.  ... 
doi:10.31127/tuje.537871 fatcat:xgyi7nclwjcr7nunk6jo4ffo7q

Page 3294 of Mathematical Reviews Vol. , Issue 2004d [page]

2004 Mathematical Reviews  
Summary: “Symbolic data structures for multi-valued logics are useful in a number of applications, from model-checking to circuit design and switch-level circuit verification.  ...  In the example in this paper, we show how imperative and functional specification languages can be composed with a target language to implement a temporal logic model checker as an algebraic compiler and  ... 

Page 652 of Mathematical Reviews Vol. , Issue 88b [page]

1988 Mathematical Reviews  
The present author re-establishes this result by different, but also elementary, techniques that have “a model theoretic flavour”.  ...  A function n+ K(n) C {0,1,..., n} is circuit-definable if there exists a sequence C,, of d-p(n) symmetric circuits of n inputs (n € N) for some fixed polynomial p and a constant d, such that the cor- responding  ... 

Experimentally modeling stochastic processes with less memory by the use of a quantum processor

Matthew S. Palsson, Mile Gu, Joseph Ho, Howard M. Wiseman, Geoff J. Pryde
2017 Science Advances  
Recent theoretical work shows quantum theory can reduce this memory requirement beyond ultimate classical limits (as measured by a process' statistical complexity, C).  ...  For increasingly complex systems, simulation becomes increasingly difficult and is ultimately constrained by resources such as computer memory.  ...  Figure 1 (D and E) shows classical and quantum logical circuits, respectively, that implement these models.  ... 
doi:10.1126/sciadv.1601302 pmid:28168218 pmcid:PMC5291701 fatcat:nkn6gfoownh33lxk67b77hzmmm
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