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Software-Based Self-Test of Processors under Power Constraints

Jun Zhou, H.-J. Wunderlich
2006 Proceedings of the Design Automation & Test in Europe Conference  
In the end, the test set is mapped into instruction sequences using a template-based test program synthesis.  ...  The new code is later referred as Reordered; 6) Specify DCs of the code in step 5. The new code is termed as X-filling. 7) In the absence of program synthesis algorithms e.g.  ... 
doi:10.1109/date.2006.243798 dblp:conf/date/ZhouW06 fatcat:s5ct3bf5ezei3cciuiz6s6tvvq

Threads and input/output in the synthesis kernal

H. Massalin, C. Pu
1989 Proceedings of the twelfth ACM symposium on Operating systems principles - SOSP '89  
Kernel code synthesis reduces the execution path for frequently used kernel calls. Optimistic synchronization increases concurrency within the kernel.  ...  The Synthesis operating system kernel combines several techniques to provide high performa.nce, incl1iding kernel code synthesis, fine-gra.in scheduling. and optimistic sylicllroliiza,tioii.  ...  Finally, very specid tha,nks go to John Ousterhout.. our "shepherd" SOSP program comrnittetr member, who helpecl shape both the style and the content of this paper.  ... 
doi:10.1145/74850.74869 dblp:conf/sosp/MassalinP89 fatcat:knf4smdtvfdqlhok62j3np2o2a

Threads and input/output in the synthesis kernal

H. Massalin, C. Pu
1989 ACM SIGOPS Operating Systems Review  
Kernel code synthesis reduces the execution path for frequently used kernel calls. Optimistic synchronization increases concurrency within the kernel.  ...  The Synthesis operating system kernel combines several techniques to provide high performa.nce, incl1iding kernel code synthesis, fine-gra.in scheduling. and optimistic sylicllroliiza,tioii.  ...  Finally, very specid tha,nks go to John Ousterhout.. our "shepherd" SOSP program comrnittetr member, who helpecl shape both the style and the content of this paper.  ... 
doi:10.1145/74851.74869 fatcat:pyo57fm7sjfbvkn7izprvhwizq

Testing Compilers for Programmable Switches Through Switch Hardware Simulation [article]

Michael D. Wong, Aatish Kishan Varma, Anirudh Sivaraman
2020 arXiv   pre-print
Using a program-synthesis-based compiler as a case study, we demonstrate how Druzhba has been successful in testing compiler-generated machine code for our simulated switch pipeline instruction set.  ...  Generated machine code programs are fed into Druzhba and tested using a fuzzing-based approach that allows compiler developers to test the correctness of their compilers.  ...  Druzhba has been useful in the testing of a program-synthesis-based compiler by simulating generated machine code programs.  ... 
arXiv:2005.02310v3 fatcat:2bkozmmm6vf25hdtayxr4jdhrm

Modular and generic programming with interpreterlib

Philip Weaver, Garrin Kimmell, Nicolas Frisby, Perry Alexander
2007 Proceedings of the twenty-second IEEE/ACM international conference on Automated software engineering - ASE '07  
In addition to modular analyses composition, InterpreterLib provides algebra combinators, explicit algebra semantics, preprocessors for boilerplate generation and generic programming techniques adapted  ...  The key benefits of these features are reliability, increased code reuse via modularity and the ability to rapidly retarget component analyses.  ...  When using the features of AlgC that generate the Inter-preterLib boilerplate from recursive Haskell datatype declarations, the code expansion becomes even more significant, due to the generation of code  ... 
doi:10.1145/1321631.1321712 dblp:conf/kbse/WeaverKFA07 fatcat:5whklitdencqhnrly5ijwqakda

The Synthesis Kernel

Calton Pu, Henry Massalin, John Ioannidis
1988 Computing Systems  
The key concept is the use ofa code synthesizer in the kernel to generate specialized (thus short and fast) kernel routines for specifrc situations.  ...  We have three methods of synthesizing code: Factoring Invariants to bypass redundant computations; Collapsing Layers to eliminate unnecessary procedure calls and context switches; and Executable Data Structures  ...  code generation.  ... 
dblp:journals/csys/PuMI88 fatcat:n5sdlforxretnobeg3zzjr24wi

Targeting different abstraction layers by model-based design methods for embedded systems: A case study

Omair Rafique, Manuel Gesell, Klaus Schneider
2013 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications  
This paper focuses thereby mainly on the use of the Averest toolkit to generate code at different levels of abstraction.  ...  To this end, we use a model-driven development tool called Averest that is based on a synchronous programming language.  ...  For example, there are code generators for software synthesis (producing C, Java and SystemC) or hardware synthesis (producing SystemC, VHDL and Verilog files).  ... 
doi:10.1109/rtcsa.2013.6732235 dblp:conf/rtcsa/RafiqueGS13 fatcat:xqvzj44xsfh4baatitqu5c4dpm

High-quality ISA synthesis for low-power cache designs in embedded microprocessors

A. C. Cheng, G. S. Tyson
2006 IBM Journal of Research and Development  
This work introduces framework-based instruction set architecture (ISA) synthesis, which reduces code size and energy consumption by tailoring the instruction set to the requirement of a targeted application  ...  low energy consumption, and smaller code size while maintaining the fabrication advantages of a mass-produced single-chip solution.  ...  Figure 4 compares the program code density achieved by different code generations: ARM, THUMB, and FITS.  ... 
doi:10.1147/rd.502.0299 fatcat:tgvzkjoiovhlrd4lem6gfvyvpu

PowerFITS: Reduce Dynamic and Static I-Cache Power Using Application Specific Instruction Set Synthesis

A.C. Cheng, G.S. Tyson, T.N. Mudge
2005 IEEE International Symposium on Performance Analysis of Systems and Software, 2005. ISPASS 2005.  
In previous work [1], we introduced the concept of framework-based instruction-set tuning synthesis (FITS), which is a new instruction synthesis paradigm that falls between a general-purpose embedded processor  ...  A FITS processor improves code density by tailoring the instruction set to the requirement of a target application to reduce the code size.  ...  Figure 5 compares the program code density achieved by different code generations, namely, ARM, THUMB, and FITS. The FITS bars represent the program code size after the ARM-to-FITS translation.  ... 
doi:10.1109/ispass.2005.1430557 dblp:conf/ispass/ChengTM05 fatcat:ty7f2esrzjfj5olhr757xzj2im

Extended quasi-static scheduling for formal synthesis and code generation of embedded software

Feng-Shi Su, Pao-Ann Hsiung
2002 Proceedings of the tenth international symposium on Hardware/software codesign - CODES '02  
generator that can produce multi-threaded embedded software programs.  ...  Enhancing recent advances in this research, we propose an Extended Quasi-Static Scheduling (EQSS) method for formally synthesizing and automatically generating code for embedded software, using the Complex-Choice  ...  Finally, a code generator automatically produces embedded software code in the C programming language.  ... 
doi:10.1145/774827.774832 fatcat:ak5dcjyoufg45gkffroo7733gm

Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components [chapter]

Rajesh K. Gupta, Claudionor Nunes Coelho, Giovanni De Micheli
2002 Readings in Hardware/Software Co-Design  
Synthesis of systems containing application-specific as well as reprogrammable components, such as off-the-shelf microprocessors, provides a promising approach to realization of complex systems using a  ...  In particular, we describe a program, Poseidon, that performs concurrent eventdriven simulation of multiple functional modules implemented either as a program or as behavioral or structural hardware models  ...  A gate-level description of the hardware component of system design is generated using structural synthesis techniques in program Hebe and simulated using program Mercury.  ... 
doi:10.1016/b978-155860702-6/50049-1 fatcat:bji2ucsntjbbrlztwlnzp6ql5i

Extended quasi-static scheduling for formal synthesis and code generation of embedded software

Feng-Shi Su, Pao-Ann Hsiung
2002 Proceedings of the tenth international symposium on Hardware/software codesign - CODES '02  
generator that can produce multi-threaded embedded software programs.  ...  Enhancing recent advances in this research, we propose an Extended Quasi-Static Scheduling (EQSS) method for formally synthesizing and automatically generating code for embedded software, using the Complex-Choice  ...  Finally, a code generator automatically produces embedded software code in the C programming language.  ... 
doi:10.1145/774789.774832 dblp:conf/codes/SuH02 fatcat:pkfng2ujjrcrdo5ifc7dgt5ooi

Synbit: synthesizing bidirectional programs using unidirectional sketches

Masaomi Yamaguchi, Kazutaka Matsuda, Cristina David, Meng Wang
2021 Proceedings of the ACM on Programming Languages (PACMPL)  
To evaluate our approach, we implemented it in a tool called Synbit and used it to generate bidirectional programs for intricate microbenchmarks, as well as for a few larger, more realistic problems.  ...  We propose a technique for synthesizing bidirectional programs from the corresponding unidirectional code plus a few input/output examples.  ...  This work was partially supported by JSPS KAKENHI Grant Numbers 15H02681, 19K11892 and 20H04161, JSPS Bilateral Program, Grant Number JPJSBP120199913, the Kayamori Foundation of Informational Science Advancement  ... 
doi:10.1145/3485482 fatcat:dyu4kbccfbehjfpdm3nwky63ci

Mostly-strongly-timed programming

Hiroki Nishino
2012 Proceedings of the 3rd annual conference on Systems, programming, and applications: software for humanity - SPLASH '12  
In this paper, we propose mostly-strongly-timed programming, which extends strongly-timed programming with the explicit switch between synchronous context and asynchronous context.  ...  Due to its synchronous behaviour, a strongly-timed program can suffer from the temporary suspension of realtime DSP in the presence of a time-consuming task.  ...  Their motivations are in communicative reactive processes or in the optimization of the generated code, whereas mostly-strongly-timed programming targets interactive systems, with a significant focus on  ... 
doi:10.1145/2384716.2384754 dblp:conf/oopsla/Nishino12a fatcat:qgjlewovzbhbdh3nvk2qb5vhni

A HETEROGENEOUS MULTIPROCESSOR SYSTEM-ON-CHIP ARCHITECTURE INCORPORATING MEMORY ALLOCATION

T.Thillaikkarasi, A. Jagadeesan, K.Duraiswamy
2010 ICTACT Journal on Communication Technology  
Our approach allows automatic generation of an architecture-level specification of the application.  ...  The main contribution of our work is an MILP based approach which can be used to map the KPN of streaming applications with data dependent behavior and interleaved computation and communication.  ...  The first consists in extracting parameters from the application code. The second carries out the memory allocation using an integer linear program (generated automatically).  ... 
doaj:b8211922f0a64f35b745d94ebd811555 fatcat:klc3lpzgszcs5j253a7abmdrzy
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