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Stochastic modeling and performance analysis of multimedia SoCs

Balaji Raman, Ayoub Nouri, Deepak Gangadharan, Marius Bozga, Ananda Basu, Mayur Maheshwari, Axel Legay, Saddek Bensalem, Samarjit Chakraborty
2013 2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)  
Quality of video and audio output is a design-time constraint for portable multimedia devices.  ...  We compare our approach with a framework comprising both simulation and statistical model checking, built to simulate large embedded systems in detail.  ...  ANALYSIS WITH STATISTICAL MODEL CHECKING This section describes the model of the multimedia SoC built using the BIP framework as well as the performance analysis results obtained on it using statistical  ... 
doi:10.1109/samos.2013.6621117 dblp:conf/samos/RamanNGBBMLBC13 fatcat:wvbf63dsebhyzgzubpd5nmucs4

A Generic Multi-Phase On-Chip Traffic Generation Environment

Antoine Scherrer, Antoine Fraboulet, Tanguy Risset
2006 IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06)  
We present hereafter a framework for on-chip traffic generation and networks-on-chip performance evaluation.  ...  interconnect systems, and the capacity to produce stochastic traffic with advanced statistical properties.  ...  to model traffic generated by embedded multimedia applications.  ... 
doi:10.1109/asap.2006.5 dblp:conf/asap/ScherrerFR06 fatcat:lbnd3zfz5rdsbliojj5d3othkq

On buffering with stochastic guarantees in resource-constrained media players

Balaji Raman, Guillaume Quintin, Wei Tsang Ooi, Deepak Gangadharan, Jerome Milan, Samarjit Chakraborty
2011 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '11  
Playout delay or buffering are commonly used in the case of streaming multimedia to ensure smooth playout. A large delay, however, is required for promising a high quality in display.  ...  Perhaps more importantly, unlike existing analytical models, our framework allows to specify loss and provides guarantees that the desired display quality is achieved with the chosen delay.  ...  Our work is inspired from the research developments in the computer networks area towards stochastic network calculus [5] for performance analysis.  ... 
doi:10.1145/2039370.2039398 dblp:conf/codes/RamanQOGMC11 fatcat:wf72tsttkvewrg4lcpefohsggu

Traffic analysis for on-chip networks design of multimedia applications

Girish Varatkar, Radu Marculescu
2002 Proceedings - Design Automation Conference  
Statistical tests performed on relevant traces extracted from common video clips establish unequivocally the existence of self-similarity in video traffic.  ...  We believe that our findings open up new directions of research with deep implications on some fundamental issues in on-chip network design for multimedia applications.  ...  Second, we analyze the traffic of a multimedia application which targets a novel packet-based SoC implementation and illustrate the impact of our analysis on on-chip network design.  ... 
doi:10.1145/513918.514116 dblp:conf/dac/VaratkarM02 fatcat:hetqxprebfcvbfvukv7ivzbehi

Traffic analysis for on-chip networks design of multimedia applications

G. Varatkar, R. Marculescu
2002 Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324)  
Statistical tests performed on relevant traces extracted from common video clips establish unequivocally the existence of self-similarity in video traffic.  ...  We believe that our findings open up new directions of research with deep implications on some fundamental issues in on-chip network design for multimedia applications.  ...  Second, we analyze the traffic of a multimedia application which targets a novel packet-based SoC implementation and illustrate the impact of our analysis on on-chip network design.  ... 
doi:10.1109/dac.2002.1012731 fatcat:tzg4hjzztjbi7ovx2yfxcbdb5a

Traffic analysis for on-chip networks design of multimedia applications

Girish Varatkar, Radu Marculescu
2002 Proceedings - Design Automation Conference  
Statistical tests performed on relevant traces extracted from common video clips establish unequivocally the existence of self-similarity in video traffic.  ...  We believe that our findings open up new directions of research with deep implications on some fundamental issues in on-chip network design for multimedia applications.  ...  Second, we analyze the traffic of a multimedia application which targets a novel packet-based SoC implementation and illustrate the impact of our analysis on on-chip network design.  ... 
doi:10.1145/514112.514116 fatcat:3b2y7dwrgrbzniv6n5ywuzxfpq

Long-range dependence and on-chip processor traffic

Antoine Scherrer, Antoine Fraboulet, Tanguy Risset
2009 Microprocessors and microsystems  
Long-range dependence is a property of stochastic processes that has an important impact on network performance, especially on the buffer usage in routers.  ...  We also study the impact of long-range dependence on a real network-on-chip using the SocLib simulation environment and traffic generators of our own.  ...  Stochastic modeling of the traffic must be used and it has been shown [1] that this modeling must take into account second order stochastic properties (covariance in addition to marginal law).  ... 
doi:10.1016/j.micpro.2008.08.010 fatcat:4zq2eijorrefro2auvl2v5gwai

Computation and communication refinement for multiprocessor SoC design

Radu Marculescu, Umit Y. Ogras, Nicholas H. Zamora
2006 ACM Transactions on Design Automation of Electronic Systems  
These application models must be scalable and flexible enough for quick analysis.  ...  The methodology we advocate consists of developing abstract application and platform models, followed by application mapping onto the target platform, and then optimizing the overall system via performance  ...  Discussions with Professor Alberto Sangiovanni Vincentelli of UC Berkeley and the members in the component/communication-based design and heterogeneous systems teams in GSRC are also greatly acknowledged  ... 
doi:10.1145/1142980.1142983 fatcat:mqdulmqw5ngmljor6imi5c3z5i

Scenario-Aware Bus Functional Modeling for Architecture-Level Performance Analysis

E.-Y. CHUNG, H.-J. LEE, S. W. CHUNG
2007 IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences  
On the other hand, our method thoroughly considers such effects and increases the analysis accuracy by adopting control signal modeling and hierarchical stochastic modeling.  ...  The experimental results show that the accuracy of our method is over 90% of RTL simulation in a multimedia SoC (System-on-Chip) design.  ...  Bus Functional Modeling (BFM) simply models the traffic pattern of each IP component in transaction-level and connects them to communication architectures for several types of performance analysis [4]  ... 
doi:10.1093/ietfec/e90-a.4.875 fatcat:nw2gqiwlrbf2vcmev6fmp3qncu

Automatic phase detection for stochastic on-chip traffic generation

Antoine Scherrer, Antoine Fraboulet, Tanguy Risset
2006 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis - CODES+ISSS '06  
Integrated in our NoC prototyping environment, this feature permits to have a completely automatic toolchain for the generation of stochastic traffic generators.  ...  Simulations are performed in a SystemC-based simulation environment with a mesh network-on-chip (DSPIN) and a processor running MP3 decoding applications.  ...  INTRODUCTION Systems on chip (SoC) are now commonly used in embedded systems for multimedia and telecommunication applications.  ... 
doi:10.1145/1176254.1176277 dblp:conf/codes/ScherrerFR06 fatcat:yyrrdrhofbd3ni4ybr4xmmiooq

Page 3611 of Mathematical Reviews Vol. , Issue 99e [page]

1999 Mathematical Reviews  
l’étude des performances de serveurs multimédias multidisques [Analytic approach for studying the performance of multidisk servers] (227-251); C.  ...  Re- blewski and J.-M. Vincent, Performance evaluation of high speed network protocols by emulation on a versatile architec- ture (253-270); S. Bulteau and M.  ... 

Error Tolerant Multimedia Stream Processing: There's Plenty of Room at the Top (of the System Stack)

Yiannis Andreopoulos
2013 IEEE transactions on multimedia  
Unlike conventional processing that aims for worst-case performance and accuracy guarantees, error-tolerant MSP attempts to provide guarantees for the expected performance and accuracy.  ...  Commercial stakeholders of multimedia stream processing (MSP) applications, such as information retrieval, stream mining systems, and high-throughput image and video processing systems already feel the  ...  [29] , [32] . 2) Rate-Distortion-Complexity Modeling of Multimedia Analysis and Coding Systems: Beyond the interplay between the quantization and the transform decomposition and its impact in the rate-distortion-complexity  ... 
doi:10.1109/tmm.2012.2232649 fatcat:x6p5wvaxyvgopc435hqyoprhri

Editorial

Kiyoharu Aizawa, Thomas Huang, Stefanos Kollias, Petros Maragos, Ralf Schäfer
2004 EURASIP Journal on Advances in Signal Processing  
of the original image generating both stochastic and structural texture image components.  ...  Recent progress and prospects in multimedia, humancomputer interaction, visual communications, semantic web, and cognitive vision call for and can benefit from applications of advanced image and video  ...  of the original image generating both stochastic and structural texture image components.  ... 
doi:10.1155/s1110865704002707 fatcat:5mlv5hij4zgs3lpx77tzleil7u

Towards on-chip fault-tolerant communication

Tudor Dumitraş, Sam Kerner, Radu Mărculescu
2003 Proceedings of the 2003 conference on Asia South Pacific design automation - ASPDAC  
In this paper, we introduce a high-level model of DSM failure patterns and propose a new communication paradigm for SoCs, namely stochastic communication.  ...  This new technique is easy and cheap to implement in SoCs that integrate a large number of communicating IP cores.  ...  PRACTICAL CONSIDERATIONS AND RESULTS Stochastic communication can have a wide range of applicability, ranging from parallel SAT solvers and multimedia applications, to periodic data acquisition from non-critical  ... 
doi:10.1145/1119772.1119817 dblp:conf/aspdac/DumitrasKM03 fatcat:xbubvpezzrbtpli4je4two4xdi

Evaluating generalized semi Markov process model of SoC bus architectures using HCFG

Ulhas Deshmukh, Vineet Sahula
2009 TENCON 2009 - 2009 IEEE Region 10 Conference  
Our modeling approach provides early estimation of performance parameters viz. memory bandwidth, processor utilization, average queue length and average waiting time.  ...  The HCFG approach is not only time efficient but also provides much detailed evaluation of stochastic properties of performance parameters as compared to SystemC simulation.  ...  Ever increasing demand for more functions and higher performance of the systems in diverse and emerging applications like telecommunications and multimedia makes SoC design quite complex.  ... 
doi:10.1109/tencon.2009.5395938 fatcat:2zovdjptenbghbt5kviik3fmbi
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