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Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing

Edward Ashford Lee, David G. Messerschmitt
1987 IEEE transactions on computers  
I Index Terms-Block diagram, computation graphs, data flow digital signal processing, hard real-time systems, multiprocessing, Petri nets, static scheduling, synchronous data flow.  ...  hrge grain data flow (LGDF) programming is natural and convenient for describing digital signal processing (DSP) systems, but its runtime overhead is costly in real time or cost-sensitive applications.  ...  Programs are described as block diagrams where  ... 
doi:10.1109/tc.1987.5009446 fatcat:tcegc7ssb5ck7nzxlu2jczxxqu

Pipeline interleaved programmable DSP's: Synchronous data flow programming

E. Lee, D. Messerschmitt
1987 IEEE Transactions on Acoustics Speech and Signal Processing  
Because of its close connection with block diagrams, data flow programming is natural and convenient for describing digital signal processing (DSP) systems.  ...  In the companion paper [l], a programmable architecture for digital signal processing is proposed that requires the partitioning of a signal processing task into multiple programs that execute concurrently  ...  Because of its close connection with block diagrams, data flow programming is natural and convenient for describing digital signal processing (DSP) systems.  ... 
doi:10.1109/tassp.1987.1165275 fatcat:rw3mvo3bq5dmnm5r6bpophd7ya

Synchronous data flow

E.A. Lee, D.G. Messerschmitt
1987 Proceedings of the IEEE  
Data flow programs for signal processing are directed graphs where each node represents a function and each arc represents a signal path.  ...  Synchronous data flow (SDF) is a special case of data flow (either atomic or large grain) in which the number of data samples produced or consumed by each node on each invocation is specified a priori.  ...  CONCLUSION W e have outlined a paradigm called synchronous data flow for the description of digital signal processing algorithms.  ... 
doi:10.1109/proc.1987.13876 fatcat:v7odxjladzgmvglp5etemuh7i4

Design and implementation of an ordered memory access architecture

S. Sriram, E.A. Lee
1993 IEEE International Conference on Acoustics Speech and Signal Processing  
This paper describes a multiprocessor machine for realtime Digital Signal Processing that uses commercial programmable DSP chips.  ...  The architecture is a shared memory, single shared bus parallel processor designed to run signal processing tasks that can be statically scheduled.  ...  Digital Signal Processing that uses commercial programmable DSP chips.  ... 
doi:10.1109/icassp.1993.319126 dblp:conf/icassp/SriramL93 fatcat:v376vz6i7bgvhjvjjn4ahntp24

Models of Communication for Multicore Processors

Martin Schoeberl, Rasmus Bo Sorensen, Jens Sparso
2015 2015 IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops  
Furthermore, we discuss the usability of the different models of communication for realtime systems.  ...  In this paper we explore the different hardware mechanism for on-chip communication and how they support or favor different models of communication.  ...  ACKNOWLEDGMENT The work presented in this paper was partially funded by the Danish Council for Independent Research | Technology and Production Sciences under the project RTEMP, contract no. 12-127600  ... 
doi:10.1109/isorcw.2015.57 dblp:conf/isorc/SchoeberlSS15 fatcat:2xfammjbbnb5vkdm6zfd5wxefy

SignalPU: A Programming Model for DSP Applications on Parallel and Heterogeneous Clusters

Farouk Mansouri, Sylvain Huet, Dominique Houzet
2014 2014 IEEE Intl Conf on High Performance Computing and Communications, 2014 IEEE 6th Intl Symp on Cyberspace Safety and Security, 2014 IEEE 11th Intl Conf on Embedded Software and Syst (HPCC,CSS,ICESS)  
The biomedical imagery, the numeric communications, the acoustic signal processing and many others digital signal processing (DSP) applications are present more and more in the numeric world.  ...  However, they are still hard to program to make performance because of many reasons: Parallelism expression, task synchronization, memory management, hardware specifications handling, load balancing .  ...  They are a repetitive (iterative) processing of data set of input digital signal for producing an output signal or a result, as shown in the figure Fig.2 .  ... 
doi:10.1109/hpcc.2014.144 dblp:conf/hpcc/MansouriHH14 fatcat:pnsbyhpagvb2piyciurdr2c7tm

A domain-specific high-level programming model

Farouk Mansouri, Sylvain Huet, Dominque Houzet
2015 Concurrency and Computation  
Following this idea, we focus on the digital signal processing (digital signal processing (DSP)) domain, where the major challenge is to more easily express these applications in a high-level mode while  ...  the overhead rate because it uses static scheduling and does not manage data synchronization (static run-time).  ... 
doi:10.1002/cpe.3622 fatcat:5t6nnj62rfbb3dvpeyi7tmvvcy

Simulation based tuning of system specification

Y Zaidi, C Grimm, J Haase
2011 2011 Design, Automation & Test in Europe  
The approach consists of SystemC AMS coupling with a descriptive functional simulator.  ...  System engineering tools are typically used in design and analysis of system prototypes captured at very high level.  ...  By the nature of static scheduling of synchronous data flow graphs, once the cosimulation has begun no dynamic activity is expected at the node's input.  ... 
doi:10.1109/date.2011.5763204 dblp:conf/date/ZaidiGH11 fatcat:b4rkkog6knahjh3vzjjbaz75ka

Family I

Edward A. Jacoby, James S. Raby, Donald E. Robinson
1968 Proceedings of the December 9-11, 1968, fall joint computer conference, part I on - AFIPS '68 (Fall, part I)  
In the second type of real-time process, the processes must be scheduled to occur at precise instants of time for synchronization. Analog-todigital and digital-to-analog transfers are examples.  ...  It provides the ability to interrupt the flow of a program at a predetermined point, examine data, make corrections, and then resume at the point of interruption.  ... 
doi:10.1145/1476589.1476682 dblp:conf/afips/JacobyRR68 fatcat:nojw2pc635e6jisanspu4dkgp4

Optimization of Signal Processing Software for Control System Implementation

Shuvra Bhattacharyya, William Levine
2006 2006 IEEE Conference on Computer-Aided Control Systems Design  
Signal processing plays a fundamental role in the design of control systems -the portion of a digitallyimplemented control system between the sensor outputs and the actuator inputs is precisely a digital  ...  Consequently, effective techniques for design and optimization of signal processing software are important in achieving efficient controller implementations.  ...  Dataflow representations and related forms of program representation are useful for mapping signal processing applications onto FPGAs.  ... 
doi:10.1109/cacsd.2006.285491 fatcat:66hwzue46bdm5o7flbmqikqax4

Optimization of signal processing software for control system implementation

Shuvra S. Bhattacharyya, William S. Levine
2006 2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control  
Signal processing plays a fundamental role in the design of control systems -the portion of a digitallyimplemented control system between the sensor outputs and the actuator inputs is precisely a digital  ...  Consequently, effective techniques for design and optimization of signal processing software are important in achieving efficient controller implementations.  ...  Dataflow representations and related forms of program representation are useful for mapping signal processing applications onto FPGAs.  ... 
doi:10.1109/cacsd-cca-isic.2006.4776874 fatcat:lvqbmhlrp5cdfab76u2ucowkba

Ciaramella: A Synchronous Data Flow Programming Language For Audio DSP

Paolo Marrone, Stefano D'Angelo, Federico Fontana, Gennaro Costagliola, Gabriele Puppis
2022 Zenodo  
We propose a new audio DSP programming language, called Ciaramella, based on the synchronous data flow (SDF) computational model and featuring a fully declarative syntax to address these issues.  ...  Various programming languages have been developed specifically for audio DSP in the last decades, yet only a handful of industrial and commercial applications are known to actually use them.  ...  for working with data flows.  ... 
doi:10.5281/zenodo.6798221 fatcat:mwlpfqhcjfgvppu3llnz3ht3le

Ciaramella: A Synchronous Data Flow Programming Language For Audio DSP

Paolo Marrone, Stefano D'Angelo, Federico Fontana, Gennaro Costagliola, Gabriele Puppis
2022 Zenodo  
We propose a new audio DSP programming language, called Ciaramella, based on the synchronous data flow (SDF) computational model and featuring a fully declarative syntax to address these issues.  ...  Various programming languages have been developed specifically for audio DSP in the last decades, yet only a handful of industrial and commercial applications are known to actually use them.  ...  for working with data flows.  ... 
doi:10.5281/zenodo.6573429 fatcat:hlmdsvvm4vhtrf6oahegxvz3xq

Using Synchronizers for Refining Synchronous Communication onto Hardware/Software Architectures

Zhonghai Lu, Jonas Sicking, Ingo Sander, Axel Jantsch
2007 Rapid System Prototyping (RSP), Proceedings of the IEEE International Workshop on  
We have presented a formal set of synchronization components called synchronizers for refining synchronous communication onto HW/SW codesign architectures.  ...  The synchronizers enable local synchronization, thus satisfy the synchronization requirement of a typical IP core.  ...  It decouples the execution of P 3 from P. The scheduler is implemented in SW and runs as the main program loop.  ... 
doi:10.1109/rsp.2007.38 dblp:conf/rsp/LuSSJ07 fatcat:w76ekjlfdrb4hi7hulkzyw4qpm

Models of computation and languages for embedded system design

A. Jantsch, I. Sander
2005 IEE Proceedings - Computers and digital Techniques  
Models of computation (MoC) are reviewed and organised with respect to the time abstraction they use. Continuous time, discrete time, synchronous and untimed MoCs are distinguished.  ...  Consequently, it is argued that different MoCs are necessary for the various tasks and phases in the design of an embedded system.  ...  Data flow process networks have been shown to be very valuable in digital signal processing applications.  ... 
doi:10.1049/ip-cdt:20045098 fatcat:j6jhhgudbfatvcreknt4rwbkri
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