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Speculative multithreaded processors

G.S. Sohi, A. Roth
<span title="">2001</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/dsrvu6bllzai7oj3hktnc5yf4q" style="color: black;">Computer</a> </i> &nbsp;
With this trend comes a renewed and increasing interest in multithreaded architectures.  ...  Such architectures can extract parallelism from a sequential program via thread-level speculation-be it control-driven or data-driven-giving them the flexibility to operate in both multiple-program, high-throughput  ...  Acknowledgments This work was supported in part by National Science Foundation grants MIP-9505853, CCR-9900584 and 0071924, donations from Intel and Sun Microsystems, the University of Wisconsin Graduate  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/2.917542">doi:10.1109/2.917542</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/fsdtjvtfsnheljrwckngvqg73m">fatcat:fsdtjvtfsnheljrwckngvqg73m</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170808033220/http://cseweb.ucsd.edu/classes/sp03/cse291-e/sohiroth.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/a1/26/a126da31e93d6f893f4dc0ab70615d619ce5534d.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/2.917542"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Scheduled dataflow: execution paradigm, architecture, and performance evaluation

K.M. Kavi, R. Giorgi, J. Arul
<span title="">2001</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/5jlmyrayyrdazh5awdlsoec77q" style="color: black;">IEEE transactions on computers</a> </i> &nbsp;
AbstractÐIn this paper, the Scheduled Dataflow (SDF) architectureÐa decoupled memory/execution, multithreaded architecture using nonblocking threadsÐis presented in detail and evaluated against Superscalar  ...  A program is partitioned into nonblocking execution threads. In addition, all memory accesses are decoupled from the thread's execution.  ...  ACKNOWLEDGMENTS This research is supported in part by the following grants from the US National Science Foundation: CCR-9796310, EIA-9805216, and EIA-9820147 and Italian grant from CNR 203.15.9/97. the  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/tc.2001.947011">doi:10.1109/tc.2001.947011</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/e7cco3kjqvcopmukezqkuzyahq">fatcat:e7cco3kjqvcopmukezqkuzyahq</a> </span>
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Multithreaded Processors

T. Ungerer
<span title="2002-03-01">2002</span> <i title="Oxford University Press (OUP)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/bf4qaipmsrghrjyxonrsmqevie" style="color: black;">Computer journal</a> </i> &nbsp;
The execution units are multiplexed between the threads in the register sets.  ...  Unused instruction slots, which arise from pipelined execution of single-threaded programs by a contemporary microprocessor, are filled by instructions of other threads within a multithreaded processor  ...  Although these architectures are often called multithreaded, we have categorized them in a previous paper [35] as threaded dataflow or large-grain dataflow because a dataflow principle is applied to  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1093/comjnl/45.3.320">doi:10.1093/comjnl/45.3.320</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/hlkkabuhrzhkrmuyqomzfmc6zm">fatcat:hlkkabuhrzhkrmuyqomzfmc6zm</a> </span>
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A Survey on Hardware and Software Support for Thread Level Parallelism [article]

Somnath Mazumdar, Roberto Giorgi
<span title="2016-04-06">2016</span> <i > arXiv </i> &nbsp; <span class="release-stage" >pre-print</span>
In this paper, first, we have given an overview of threads, threading mechanisms and its management issues during execution.  ...  Todays computers are built upon multiple processing cores and run applications consisting of a large number of threads, making runtime thread management a complex process.  ...  Speculative data driven multithreading (DDMT) supports speculative thread execution in an out-of-order processor by forking new data-driven thread (DDT) in parallel to the main thread when main thread  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1603.09274v3">arXiv:1603.09274v3</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/75isdvgp5zbhplocook6273sq4">fatcat:75isdvgp5zbhplocook6273sq4</a> </span>
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Multi-Threaded Processors [chapter]

David Padua, Amol Ghoting, John A. Gunnels, Mark S. Squillante, José Meseguer, James H. Cownie, Duncan Roweth, Sarita V. Adve, Hans J. Boehm, Sally A. McKee, Robert W. Wisniewski, George Karypis (+29 others)
<span title="">2011</span> <i title="Springer US"> Encyclopedia of Parallel Computing </i> &nbsp;
The execution units are multiplexed between the threads in the register sets.  ...  Unused instruction slots, which arise from pipelined execution of single-threaded programs by a contemporary microprocessor, are filled by instructions of other threads within a multithreaded processor  ...  Although these architectures are often called multithreaded, we have categorized them in a previous paper [35] as threaded dataflow or large-grain dataflow because a dataflow principle is applied to  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/978-0-387-09766-4_423">doi:10.1007/978-0-387-09766-4_423</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/heb3n2cfwnbi5nvxv5kvxd2xgm">fatcat:heb3n2cfwnbi5nvxv5kvxd2xgm</a> </span>
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Scheduled dataflow: execution paradigm, architecture, and performance evaluation

K.M. Kavi, R. Giorgi, J. Arul
<span title="">2001</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/5jlmyrayyrdazh5awdlsoec77q" style="color: black;">IEEE transactions on computers</a> </i> &nbsp;
AbstractÐIn this paper, the Scheduled Dataflow (SDF) architectureÐa decoupled memory/execution, multithreaded architecture using nonblocking threadsÐis presented in detail and evaluated against Superscalar  ...  A program is partitioned into nonblocking execution threads. In addition, all memory accesses are decoupled from the thread's execution.  ...  ACKNOWLEDGMENTS This research is supported in part by the following grants from the US National Science Foundation: CCR-9796310, EIA-9805216, and EIA-9820147 and Italian grant from CNR 203.15.9/97. the  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/12.947003">doi:10.1109/12.947003</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/inhwbcvzrnhplobil2togefjg4">fatcat:inhwbcvzrnhplobil2togefjg4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20070627223134/http://www.csrl.unt.edu/~kavi/Research/ieeetc-01.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/12/50/1250388ecf7d51ed97fb5da7b51af64c45553f8f.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/12.947003"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Beyond Dataflow

Borut Robi�, Jurij �ilc, Theo Ungerer
<span title="">2000</span> <i title="Faculty of Electrical Engineering and Computing, Univ. of Zagreb"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/3darrl4gkvd37b2mcvvdirj7p4" style="color: black;">Journal of Computing and Information Technology</a> </i> &nbsp;
In particular, there has been active research and development in multithreaded architectures that evolved from the dataflow model.  ...  This paper presents some recent advanced dataflow architectures.  ...  In the dataflow environment, however, the idea of branch prediction and speculative execution has never been evaluated.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.2498/cit.2000.02.01">doi:10.2498/cit.2000.02.01</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/3bonvcsg6jbnzj3uouzwkc5tcm">fatcat:3bonvcsg6jbnzj3uouzwkc5tcm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20180721053818/http://cit.fer.hr/index.php/CIT/article/download/1416/1120" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/c7/eb/c7eb7e4394941f7ac29fc64d8d12a56f83a58c96.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.2498/cit.2000.02.01"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="unlock alternate icon" style="background-color: #fb971f;"></i> Publisher / doi.org </button> </a>

Execution and Cache Performance of the Scheduled Dataflow Architecture

Joseph Arul, Krishna Kavi, Roberto Giorgi
<span title="">2000</span> <i title="Verlag der Technischen Universität Graz"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/qvdzjysvg5hozjo6vlhyz6qa4a" style="color: black;">Journal of universal computer science (Online)</a> </i> &nbsp;
A program is partitioned into functional execution threads, which are perfectly suited for our non-blocking multithreaded architecture.  ...  The analytical analysis of our architecture showed that we could achieve a better performance than other classical dataflow architectures (i.e., ETS), hybrid models (e.g., EARTH) and decoupled multithreaded  ...  This research is supported in part by NSF grants: CCR 9796310, EIA 9729889, EIA 9820147.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.3217/jucs-006-10-0948">doi:10.3217/jucs-006-10-0948</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/journals/jucs/KaviAG00.html">dblp:journals/jucs/KaviAG00</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ayzfhn4jyra4jbhra6jpulqz6m">fatcat:ayzfhn4jyra4jbhra6jpulqz6m</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170811145427/http://www3.diism.unisi.it/~giorgi/papers/Kavi00a.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/f7/b1/f7b1cd6a8e4a8cfc89ec393346a505ca8cad2639.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.3217/jucs-006-10-0948"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="unlock alternate icon" style="background-color: #fb971f;"></i> Publisher / doi.org </button> </a>

Hardware support for software controlled multithreading

Aqeel Mahesri, Nicholas J. Wang, Sanjay J. Patel
<span title="2007-03-01">2007</span> <i title="Association for Computing Machinery (ACM)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/35q3ync5nbhnjfpylznlz57lyi" style="color: black;">SIGARCH Computer Architecture News</a> </i> &nbsp;
Empirical results from performance simulation show a 20% improvement in performance on a 2-way CMP machine, demonstrating that software controlled multithreading can indeed provide a benefit in the presence  ...  It divides a single thread of execution into multiple using the master-worker paradigm where some set of master threads execute code that spawns tasks for other, worker theads.  ...  Speculative multithreading More recently, a variety of speculative multithreading architectures have been proposed.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1241601.1241606">doi:10.1145/1241601.1241606</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/aabcvs7w5vgw3o3bqtmgx3hdpa">fatcat:aabcvs7w5vgw3o3bqtmgx3hdpa</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20070824030106/http://www.crhc.uiuc.edu/ACS/pub/dascmp06.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/1b/5a/1b5a608b14913d5c3d12b2c0ae4c52cb22363e38.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1241601.1241606"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

TERAFLUX: Exploiting Tera-device Computing Challenges

Antoni Portero, Zhibin Yu, Roberto Giorgi
<span title="">2011</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/cx3f4s3qmfe6bg4qvuy2cxezyu" style="color: black;">Procedia Computer Science</a> </i> &nbsp;
TERAFLUX aims at providing a framework based on dataflow concepts that could provide a solution for all the three above challenges.  ...  We briefly present here our idea on the architectural support for the TERAFLUX execution model. © Selection and peer-review under responsibility of FET11 conference organizers and published by Elsevier  ...  In this paper we focus on the architectural support for a data-driven execution model at level of threads.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.procs.2011.09.081">doi:10.1016/j.procs.2011.09.081</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/tkxlohqkjbbd3nv6w4pu4rtv4i">fatcat:tkxlohqkjbbd3nv6w4pu4rtv4i</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170811145951/http://www3.diism.unisi.it/~giorgi/papers/Portero11a.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/61/be/61be8e39bc6ca5f8f8df79084b107ef2885cfb12.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.procs.2011.09.081"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="unlock alternate icon" style="background-color: #fb971f;"></i> elsevier.com </button> </a>

A survey of processors with explicit multithreading

Theo Ungerer, Borut Robič, Jurij Šilc
<span title="2003-03-01">2003</span> <i title="Association for Computing Machinery (ACM)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/eiea26iqqjcatatlgxdpzt637y" style="color: black;">ACM Computing Surveys</a> </i> &nbsp;
The execution units are multiplexed between the thread contexts that are loaded in the register sets.  ...  Unused instruction slots, which arise from latencies during the pipelined execution of single-threaded programs by a contemporary microprocessor, are filled by instructions of other threads within a multithreaded  ...  Although these architectures are often called multithreaded, we have categorized them in a previous paper [Šilc et al. 1998 ] as threaded dataflow or largegrain dataflow because a dataflow principle is  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/641865.641867">doi:10.1145/641865.641867</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/u6x7jdmkfvexnm3culskjsoxwi">fatcat:u6x7jdmkfvexnm3culskjsoxwi</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170810221743/http://www.di.unipi.it/~vannesch/SPA/p29-ungerer.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/96/38/963888e0475cf0bf5a6fd59052d05f27e0c02d5f.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/641865.641867"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

The WaveScalar architecture

Steven Swanson, Andrew Schwerin, Martha Mercaldi, Andrew Petersen, Andrew Putnam, Ken Michelson, Mark Oskin, Susan J. Eggers
<span title="2007-05-01">2007</span> <i title="Association for Computing Machinery (ACM)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/th23p5ixr5d5joiuac47oiqstq" style="color: black;">ACM Transactions on Computer Systems</a> </i> &nbsp;
To execute WaveScalar programs, we have designed a scalable, tile-based processor architecture called the WaveCache.  ...  To allow programmers to easily express parallelism, WaveScalar supports pthread-style, coarse-grain multithreading and dataflow-style, fine-grain threading.  ...  WaveScalar is a dynamic dataflow architecture. Dynamic dataflow architectures differ in how they manage and assign tags to values.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1233307.1233308">doi:10.1145/1233307.1233308</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/va44t6ut4jbytjpzwl2zc5runa">fatcat:va44t6ut4jbytjpzwl2zc5runa</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20121221004831/http://arcade.cs.columbia.edu/ws-tocs07.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/4b/fc/4bfc78365b99173f2ba04f2b1a63aa602ba7e46b.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1233307.1233308"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

Hybrid Dataflow/von-Neumann Architectures

Fahimeh Yazdanpanah, Carlos Alvarez-Martinez, Daniel Jimenez-Gonzalez, Yoav Etsion
<span title="">2014</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/ll6bfs5o6bahfinh3u5z2cnyoy" style="color: black;">IEEE Transactions on Parallel and Distributed Systems</a> </i> &nbsp;
In this paper, we classify hybrid dataflow/von-Neumann models according to two different taxonomies: one based on the execution model used for inter-and intrablock execution, and the other based on the  ...  Finally, we compare a representative set of recent general purpose hybrid dataflow/von-Neumann architectures, discuss their different approaches, and explore the evolution of these hybrid processors.  ...  Alternatively, speculative multithreading architectures exploit TLP dynamically by scheduling the threads in parallel [114] , as Out-of-Order architectures for instructions, masking the synchronization  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/tpds.2013.125">doi:10.1109/tpds.2013.125</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/rswr6zvvjjamxjjca6p2cfhh5y">fatcat:rswr6zvvjjamxjjca6p2cfhh5y</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20150824192539/http://www.cs.technion.ac.il/~yetsion/papers/Dataflow-TPDS.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/f1/af/f1af0791836175668598d8112df42ca091d9600b.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/tpds.2013.125"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Effects of multithreading on cache performance

H. Kwak, B. Lee, A.R. Hurson, Suk-Han Yoon, Woo-Jong Hahn
<span title="">1999</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/5jlmyrayyrdazh5awdlsoec77q" style="color: black;">IEEE transactions on computers</a> </i> &nbsp;
Also, the dynamic behavior of multithreaded execution hinders the instruction locality that results in a high number of misses in the L1 instruction cache.  ...  In particular, multithreading affects the behavior of caches, and, thus, the overall performance in a nontrivial fashion.  ...  These dynamic threads will be executed concurrently on a SMT-like machine with special hardware support for register and memory dataflow and speculative execution.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/12.752659">doi:10.1109/12.752659</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/6b24u3lsnrcoflhbfb453n46sa">fatcat:6b24u3lsnrcoflhbfb453n46sa</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20060910174153/http://web.engr.oregonstate.edu/~benl/Publications/Journals/IEEE_ToC99.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/20/c5/20c5322e6c250f03bda4ec7b63947c9e5a8a6bca.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/12.752659"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Graph Coloring Algorithms for Muti-core and Massively Multithreaded Architectures [article]

Umit Catalyurek, John Feo, Assefaw Gebremedhin, Mahantesh Halappanavar, Alex Pothen
<span title="2012-05-16">2012</span> <i > arXiv </i> &nbsp; <span class="release-stage" >pre-print</span>
We explore the interplay between architectures and algorithm design in the context of shared-memory platforms and a specific graph problem of central importance in scientific and high-performance computing  ...  The second algorithm uses dataflow principles, and is targeted at the non-conventional, massively multithreaded Cray XMT system.  ...  The multithreading variant on this platform is simultaneous, which means multiple instructions from ready threads are executed in a given cycle. The system has 24 GB total memory.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1205.3809v1">arXiv:1205.3809v1</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/zyay6yyvlrgdhcr5l76wtt2zcy">fatcat:zyay6yyvlrgdhcr5l76wtt2zcy</a> </span>
<a target="_blank" rel="noopener" href="https://archive.org/download/arxiv-1205.3809/1205.3809.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> File Archive [PDF] </button> </a> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1205.3809v1" title="arxiv.org access"> <button class="ui compact blue labeled icon button serp-button"> <i class="file alternate outline icon"></i> arxiv.org </button> </a>
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