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Specification and Proof of High-Level Functional Properties of Bit-Level Programs [chapter]

Clément Fumex, Claire Dross, Jens Gerlach, Claude Marché
2016 Lecture Notes in Computer Science  
In a computer program, basic functionalities may be implemented using bit-wise operations.  ...  Formally proving that low-level code conforms to a higher-level specification is challenging, because of the gap between the different levels of abstraction.  ...  Thanks to Stefan Berghofer for providing us with an Isabelle/HOL realization of Why3's bit vector theory.  ... 
doi:10.1007/978-3-319-40648-0_22 fatcat:koyc45znwjdolf6flchiqlovba

Formal Verification of Security Properties of Smart Card Embedded Source Code [chapter]

June Andronick, Boutheina Chetali, Christine Paulin-Mohring
2005 Lecture Notes in Computer Science  
The idea is to combine two program verification approaches: the functional verification at the source code level and the verification of high level properties on a formal model built from the program and  ...  Caduceus enables the verification of an annotated C program and provides a validation process that we used to generate a high level formal model of the C source code.  ...  We would like to thank Jean Christophe Filliâtre, Thierry Hubert and Claude Marché for their useful help and support in using Caduceus.  ... 
doi:10.1007/11526841_21 fatcat:erblq2aorravpdbj33gywmvxxi

Bitfields and Tagged Unions in C: Verification through Automatic Generation

David Cock
2008 Conference on Automated Deduction  
The tool is used in the implementation of the seL4 microkernel, and hence also in the lowest-level refinement step of the L4.verified project which aims to prove the functional correctness of seL4.  ...  We present a tool for automatic generation of packed bitfields and tagged unions for systems-level C, along with automatic, machine checked refinement proofs in Isabelle/HOL.  ...  Also related to generated correctness proofs is the idea of proof-carrying code [18] , which usually focusses on the machine level and on specific properties such as memory safety or resource constraints  ... 
dblp:conf/cade/Cock08 fatcat:x37nqveiajdn7e42tpoitw4upq

Proving Functional Equivalence of Two AES Implementations Using Bounded Model Checking

Hendrik Post, Carsten SInz
2009 2009 International Conference on Software Testing Verification and Validation  
Recently, bit-vector bounded model checkers like CBMC have been developed that are able to check properties of (mostly low-level) software written in C.  ...  Cryptographic algorithms heavily rely on bit-level operations, which makes them particularly suitable for bit-precise tools like CBMC.  ...  To provide a high level of security, every bit of the ciphertext must be dependent on every bit of the original text and every bit of the key.  ... 
doi:10.1109/icst.2009.39 dblp:conf/icst/PostS09 fatcat:ijebfanngjdbzewftsg5s6c2bi

Formal verification of iterative algorithms in microprocessors

Mark D. Aagaard, Robert B. Jones, Roope Kaivola, Katherine R. Kohatsu, Carl-Johan H. Seger
2000 Proceedings of the 37th conference on Design automation - DAC '00  
Verifying these iterative circuits against high-level specifications requires two steps: reasoning about the algorithm itself and verifying the implementation against the algorithm.  ...  For example, the front-end of a microprocessor repeatedly fetches and decodes instructions while updating internal state such as the program counter; floating-point circuits perform divide and square root  ...  Acknowledgments We thank John Harrison for mechanizing the hand proof of FDIV and FSQRT and Bob Brennan for providing the opportunity to carry out these case studies.  ... 
doi:10.1145/337292.337388 dblp:conf/dac/AagaardJKKS00 fatcat:jxpl4lydundhxi2lubjixorr5q

Continuous Formal Verification of Amazon s2n [chapter]

Andrey Chudnov, Nathan Collins, Byron Cook, Joey Dodds, Brian Huffman, Colm MacCárthaigh, Stephen Magill, Eric Mertens, Eric Mullen, Serdar Tasiran, Aaron Tomb, Eddy Westbrook
2018 Lecture Notes in Computer Science  
A key aspect of this proof infrastructure is continuous checking, to ensure that properties remain proved during the lifetime of the software.  ...  We describe the proof itself and the technical decisions that enabled integration into development.  ...  We first describe the proof of high-level properties before going into specifics regarding the tools in Section 2.4.  ... 
doi:10.1007/978-3-319-96142-2_26 fatcat:tefiqbkw7rdj7b23utmxg2uwia

High-level separation logic for low-level code

Jonas B. Jensen, Nick Benton, Andrew Kennedy
2013 SIGPLAN notices  
Furthermore, our encoding of scoped assembly-language labels lets us give definitions and proof rules for powerful assemblylanguage 'macros' such as while loops, conditionals and procedures.  ...  The logic is built from an assertion logic on machine states over which we construct a specification logic that encapsulates uses of frames and step indexing.  ...  We would like to thank Lars Birkedal and Kasper Svendsen for many discussions on higher-order frame rules and their applications.  ... 
doi:10.1145/2480359.2429105 fatcat:ffuxbpc2tvgytcd7k4yw53b5oi

A Light-Weight Framework for Hardware Verification [chapter]

Christoph Kern, Tarik Ono-Tesfaye, Mark R. Greenstreet
1999 Lecture Notes in Computer Science  
This paper describes a deductive verification framework that allows the use of general purpose decision procedures and traditional model checking along with domain specific inference rules.  ...  To demonstrate this approach, a SRT divider is verified using a transistor-level model with timing.  ...  Our thanks to Ted Williams who explained many details of his design to one of the authors several years ago.  ... 
doi:10.1007/3-540-49059-0_23 fatcat:wpyttdzhsvhe7n76cejaiqiive

A Framework for Verifying Bit-Level Pipelined Machines Based on Automated Deduction and Decision Procedures

Panagiotis Manolios, Sudarshan K. Srinivasan
2006 Journal of automated reasoning  
We describe an approach to verifying bit-level pipelined machine models using a combination of deductive reasoning and decision procedures.  ...  a term-level abstraction of the bit-level machine refines the instruction set architecture, which is then handled automatically by UCLID.  ...  In this section, we will give a high-level description of our shallow embedding of the CLU logic and the UCLID specification language in ACL2.  ... 
doi:10.1007/s10817-006-9035-0 fatcat:bgwhzuzwfvgodp77hnwx6yww6y

The Last Mile: High-Assurance and High-Speed Cryptographic Implementations

Jose Bacelar Almeida, Manuel Barbosa, Gilles Barthe, Benjamin Gregoire, Adrien Koutsos, Vincent Laporte, Tiago Oliveira, Pierre-Yves Strub
2020 2020 IEEE Symposium on Security and Privacy (SP)  
We realize our approach by combining the Jasmin framework, which offers in a single language features of high-level and low-level programming, and the EasyCrypt proof assistant, which offers a versatile  ...  verification infrastructure that supports proofs of functional correctness and equivalence checking.  ...  This work was partially funded by national funds via FCT in the context of project PTDC/CCI-INF/31698/2017.  ... 
doi:10.1109/sp40000.2020.00028 dblp:conf/sp/AlmeidaBBGKL0S20 fatcat:opsfghx3brfkbmzra2wlq55cae

A Practical Verification Framework for Preemptive OS Kernels [chapter]

Fengwei Xu, Ming Fu, Xinyu Feng, Xiaoran Zhang, Hui Zhang, Zhaohui Li
2016 Lecture Notes in Computer Science  
It provides a specification language for defining the high-level abstract model of OS kernels, a program logic for refinement verification of concurrent kernel code with multi-level hardware interrupts  ...  , and automated tactics for developing mechanized proofs.  ...  Example of High-Level Specifications.  ... 
doi:10.1007/978-3-319-41540-6_4 fatcat:c35dgsvqvraq7gqzwewkooyf6e

Machine-Checked Proofs for Cryptographic Standards

José Bacelar Almeida, Pierre-Yves Strub, Cécile Baritel-Ruet, Manuel Barbosa, Gilles Barthe, François Dupressoir, Benjamin Grégoire, Vincent Laporte, Tiago Oliveira, Alley Stoughton
2019 Proceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security - CCS '19  
We present a high-assurance and high-speed implementation of the SHA-3 hash function.  ...  Our implementation is written in the Jasmin programming language, and is formally verified for functional correctness, provable security and timing attack resistance in the EasyCrypt proof assistant.  ...  high-speed implementations to provable security results for the high-level specifications.  ... 
doi:10.1145/3319535.3363211 dblp:conf/ccs/AlmeidaBBBDGL0S19 fatcat:ywk5fizlmrcoti6g3uhph7s7h4

Formal specification of a security framework for smart contracts [article]

Mikhail Mandrykin, Jake O'Shannessy, Jacob Payne, Ilya Shchepetkov
2020 arXiv   pre-print
We have used Isabelle/HOL to develop a formal specification of the Cap9 framework and prove its consistency.  ...  It provides developers the ability to perform upgrades in a secure and robust manner, and improves isolation and transparency through the use of a low level capability-based security model.  ...  Conclusion and Future Work We have developed a formal specification 3 of the Cap9 framework using the Isabelle/HOL theorem prover and proved its internal consistency.  ... 
arXiv:2001.04314v1 fatcat:jzfdgdo6rbdf5gespqyb4oispi

Modelling and verification of parameterized architectures: A functional approach

Salah Merniz, Saad Harous
2021 IET Computers & Digital Techniques  
The potential features of the proposed methodological proof approach are demonstrated over a detailed example of a circuit design and verification within a functional framework.  ...  The proof could be performed by induction within the same specification framework that avoids translating the higher order properties between different semantics, which remains extremely difficult.  ...  The use of a separate proof tool requires translating the design properties from the specification framework to the proof framework, and so, the soundness property remains difficult.  ... 
doi:10.1049/cdt2.12024 fatcat:g3ygb65a7ngm3p2ywyhmph4gr4

WoLFram- A Word Level Framework for Formal Verification

André Sülflow, Ulrich Kühne, Görschwin Fey, Daniel Große, Rolf Drechsler
2009 2009 IEEE/IFIP International Symposium on Rapid System Prototyping  
Due to high computational costs of formal verification on pure Boolean level, proof techniques on the word level, like Satisfiability Modulo Theories (SMT), were proposed.  ...  A wide range of applications is implemented, e.g. equivalence and property checking including algorithms for coverage/property analysis, debugging and robustness checking.  ...  of WoLFram and for many helpful discussions.  ... 
doi:10.1109/rsp.2009.21 dblp:conf/rsp/SulflowKFGD09 fatcat:6umh7p3qtjhg7onwlcvdb44dfe
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