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A specialized architecture for textual information retrieval

L. A. Hollaar, W. H. Stellhorn
1977 Proceedings of the June 13-16, 1977, national computer conference on - AFIPS '77  
Characteristics which distinguish text retrieval from retrieval of formatted files are discussed, and a computer configuration employing for special purpose processors is described.  ...  memory associative processors frequently proposed for efficient processing of relational databases.  ...  The merge network is capable of combining two sorted n-item lists into a single 2n-item sorted list.  ... 
doi:10.1145/1499402.1499524 dblp:conf/afips/HollaarS77 fatcat:lzvj2qng5rbelih4wv5eomphsu

An NC Algorithm for Sorting Real Numbers in O(nlogn/√loglogn) Operations

Yijie Han, Sneha Mishra, Md Usman Gani Syed
2019 Open Journal of Applied Sciences  
This is the first NC algorithm known to take ( ) log o n n operations for sorting real numbers.  ...  We apply the recent important result of serial sorting of n real numbers in ( ) log O n n time to the design of a parallel algorithm for sorting real numbers in ( ) 1 log O n ε + time and log log log operations  ...  In general, lists merged into 1 sorted list. For simplicity, let us break down n elements into lists with m elements in each list.  ... 
doi:10.4236/ojapps.2019.95034 fatcat:5b2kc4bwjrf3tnicscsumqgj3q

A Hybrid Sorting Algorithm on Heterogeneous Architectures

Ming Xu, Xianbin Xu, Fang Zheng, Yuanhua Yang, Mengjia Yin
2015 TELKOMNIKA (Telecommunication Computing Electronics and Control)  
To fully utilize computing capability of both CPU and GPU, we used SIMD intrinsic instructions to implement sorting kernels that run on CPU, and adopted radix sort kernels that implemented by CUDA (Compute  ...  In this paper, we propose a novel hybrid sorting algorithm that let CPU cooperate with GPU.  ...  For partially sorted blocks, we use bitonic sorting network merge keys.  ... 
doi:10.12928/telkomnika.v13i4.1896 fatcat:hew5jbb74raq7du4ybr43seynq

Efficient implementation of sorting on multi-core SIMD CPU architecture

Jatin Chhugani, Anthony D. Nguyen, Victor W. Lee, William Macy, Mostafa Hagog, Yen-Kuang Chen, Akram Baransi, Sanjeev Kumar, Pradeep Dubey
2008 Proceedings of the VLDB Endowment  
Although literature abounds with various flavors of sorting algorithms, different architectures call for customized implementations to achieve faster sorting times.  ...  Our multi-threaded, SIMD implementation sorts 64 million floating point numbers in less than 0.5 seconds on a commodity 4-core Intel processor.  ...  We are also thankful to Ronny Ronen for his comments on an initial version of the paper, and the anonymous reviewers for their insightful comments and suggestions.  ... 
doi:10.14778/1454159.1454171 fatcat:uw5swzk7oze7tbry7qzqyc5ao4

Efficient distributed algorithms to build inverted files

Berthier Ribeiro-Neto, Edleno S. Moura, Marden S. Neubert, Nivio Ziviani
1999 Proceedings of the 22nd annual international ACM SIGIR conference on Research and development in information retrieval - SIGIR '99  
The inverted file is compressed to save memory and disk space and to save time for moving data in/out disk and across the network. We analyze our algorithms and discuss the tradeoffs among them.  ...  Using 16 processors this time drops to roughly 4 hours.  ...  In phase c, a disk-based multiway merge is done to combine the partial inverted lists into final lists. The details are shown in Figure 2 .  ... 
doi:10.1145/312624.312663 dblp:conf/sigir/Ribeiro-NetoMNZ99 fatcat:kx2vsttusncltk7lyzf3bnczxa

An application-specific instruction set for accelerating set-oriented database primitives

Oliver Arnold, Sebastian Haas, Gerhard Fettweis, Benjamin Schlegel, Thomas Kissinger, Wolfgang Lehner
2014 Proceedings of the 2014 ACM SIGMOD international conference on Management of data - SIGMOD '14  
A high query throughput and a low query latency are essential for the success of a database system.  ...  We illustrate exemplarily how to create an instruction set extension for set-oriented database primitives.  ...  Furthermore, we would like to thank Synopsys and Tensilica for software and IP.  ... 
doi:10.1145/2588555.2593677 dblp:conf/sigmod/ArnoldHFSKL14 fatcat:7acpjrsqgrfgxlqepsud4pptvu

Skew-insensitive Parallel Algorithms for Relational Join

Khaled AlSabti, Sanjay Ranka
2001 Journal of King Saud University: Computer and Information Sciences  
Our analysis will be done for hypercube and two-dimensional meshes networks.  ...  The first algorithm is sort-based and the second is hash-based.  ...  Details of the algorithm for n writes on an array of size n are given in [10, 11] . 6. Merging two sorted lists: Merging of globally sorted lists has been widely studied problem in the literature.  ... 
doi:10.1016/s1319-1578(01)80005-7 fatcat:h4utsjhoqzgbxotp6io65ny4ii

Sorting networks on FPGAs

Rene Mueller, Jens Teubner, Gustavo Alonso
2011 The VLDB journal  
In this paper, we explore the use of sorting networks on fieldprogrammable gate arrays (FPGAs).  ...  Our results indicate that efficient usage of FPGAs involves non-trivial aspects such as having the right computation model (a sorting network in this case); a careful implementation that balances all the  ...  An 8-element sorting co-processor is implemented in the FPGA logic and combined with a merge sort algorithm running on the embedded CPU.  ... 
doi:10.1007/s00778-011-0232-z fatcat:fzqmyyyvifeipflgj5aitw7taa

A Paradigm for the Design of Parallel Algorithms with Applications

I.V. Ramakrishnan, J.C. Browne
1983 IEEE Transactions on Software Engineering  
Fussell for improving the clarity of the paper.  ...  The algorithm for the merge of two ordered lists developed through application of this technique is thought to be original.  ...  The technique used to rank elements in the sorting algorithm is used for selection. C. Merging Array A is of size n and B is of size m. .  ... 
doi:10.1109/tse.1983.234777 fatcat:cajjzzzaj5djxipgom2qeuvium

The multiple write BUS technique

Renate Gemballa, Rolf Lindner
1983 Computers & graphics  
A new access technique, developed in Germany, solves some raster scan problems and also appears to speed up basic sorting algorithms.  ...  data onp processors and merging of the sorted subsets on a conventional common bus, (3) pure multiplewrite bus sorting, and (4) the favorite-combining conventional two-way merge sorting of distributed  ...  Multiple-write bus-access network for Processor P(J). A fivebit data-word system is shown.  ... 
doi:10.1016/0097-8493(83)90010-9 fatcat:ifdyfaka2bhfrj5b5x7bwrikpa

The Multiple-Write Bus Technique

Gemballa, Lindner
1982 IEEE Computer Graphics and Applications  
A new access technique, developed in Germany, solves some raster scan problems and also appears to speed up basic sorting algorithms.  ...  data onp processors and merging of the sorted subsets on a conventional common bus, (3) pure multiplewrite bus sorting, and (4) the favorite-combining conventional two-way merge sorting of distributed  ...  Multiple-write bus-access network for Processor P(J). A fivebit data-word system is shown.  ... 
doi:10.1109/mcg.1982.1674403 fatcat:qh6dpsddobggbcbumkeklwcv6m

Sorting using BItonic netwoRk wIth CUDA

Gabriele Capannini, Fabrizio Silvestri, Ranieri Baraglia, Franco Maria Nardini
2009 Annual International ACM SIGIR Conference on Research and Development in Information Retrieval  
We present a fast sorting algorithm implementing an efficient bitonic sorting network. This algorithm is highly suitable for information retrieval applications.  ...  We introduce an efficient instruction dispatch mechanism to improve the overall sorting performance. We also present a cache-based computational model for graphics processors.  ...  ACKNOWLEDGMENTS This research has been supported by the Action IC0805: Open European Network for High Performance Computing on Complex Environments.  ... 
dblp:conf/sigir/CapanniniSBN09 fatcat:ldzv2mbuebhlpljwuj3oiiye6m

FLiMS: a Fast Lightweight 2-way Merger for Sorting [article]

Philippos Papaphilippou, Wayne Luk, Chris Brooks
2022 arXiv   pre-print
In this paper, we present FLiMS, a highly-efficient and simple parallel algorithms for merging two sorted lists residing in banked and/or wide memory.  ...  This is useful in many applications such as in parallel merge trees to achieve high-throughput sorting, where the resource utilisation of the merger is critical for building larger trees and internalising  ...  This "pruned" merge block is combined with additional logic to work as a parallel merger for longer lists as streams.  ... 
arXiv:2112.05607v3 fatcat:vsljd4t3xzferlfac2y4kz2msq

An Approach to Parallel Sorting Using Ternary Search

Monica Maurya, Alka Singh
2018 International Journal of Modern Education and Computer Science  
First of all the data sequence is distributed among the different processors and are sorted in parallel using counting sort.  ...  The results of proposed algorithms shows that it is better than existing parallel sorting algorithm like parallel merge sort and binary search based sorting algorithm.  ...  The merge sort algorithm can be parallelized by distributing (n/p) processors to each processor. Each processor sequentially sorts the sublist and then return to final sorted list. 1.  ... 
doi:10.5815/ijmecs.2018.04.05 fatcat:zew3n3kf4jfvdhsfrm4cyoocvy

Page 7318 of Mathematical Reviews Vol. , Issue 90M [page]

1990 Mathematical Reviews  
Hence, one tries to obtain practically efficient o(log” n) sorting networks based on a k-way merge for nonconstant k.  ...  Batcher’s odd-even sorting network with depth @(log” n) is more efficient in practice. Batcher’s network is based on a 2-way merge.  ... 
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