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Verification of IEEE compliant subtractive division algorithms [chapter]

Paul S. Miner, James F. Leathrum
1996 Lecture Notes in Computer Science  
A parameterized de nition of subtractive oating point division algorithms is presented and veri ed using PVS.  ...  The general algorithm is proven to satisfy a formal de nition of an IEEE standard for oating point arithmetic.  ...  IEEE compliant division Given the above v eri ed general algorithm and a quotient selection function of type qs type for some division radix r, quotient digit set bound by a, and oating point base b. it  ... 
doi:10.1007/bfb0031800 fatcat:jz6roqodxbck5abx7ycku7h6fe

Putative Biological Mechanisms of Efficiency of Substrate Reduction Therapies for Mucopolysaccharidoses

Zyta Banecka-Majkutewicz, Joanna Jakóbkiewicz-Banecka, Magdalena Gabig-Cimińska, Alicja Węgrzyn, Grzegorz Węgrzyn
2012 Archivum Immunologiae et Therapiae Experimentalis  
Results of behavioral tests in animals as well as some preliminary clinical observations with pediatric patients corroborated the suggestions about possible efficacy of SRT in MPS treatment, including  ...  Efficient reduction of GAG levels in MPS cells homozygous for null mutations may be intriguing in the commonly accepted scheme of SRT mode of action.  ...  This scheme is based on figures published by Neufeld and Muenzer (2001) and A B C D E Fig. 2 The putative mechanisms of efficacy of SRT in the treatment of MPS III. a A normal situation in a healthy  ... 
doi:10.1007/s00005-012-0195-9 pmid:22949095 fatcat:t5kwznnobrbkxhbbdnahdza4om

Design issues in division and other floating-point operations

S.F. Oberman, M.J. Flynn
1997 IEEE transactions on computers  
Floating-point division is generally regarded as a low frequency, high latency operation in typical floating-point applications.  ...  It also examines the performance implications of shared multiplication hardware, shared square root, on-the-fly rounding and conversion, and fused functional units.  ...  The authors would also like to thank Grant McFarland for reading and commenting on an earlier draft of this paper.  ... 
doi:10.1109/12.565590 fatcat:46ptguktc5emjn5wmnxkqsmvvi

Review of Basic Classes of Dividers Based on Division Algorithm

Udayan S. Patankar, Ants Koel
2021 IEEE Access  
ACKNOWLEDGEMENT A preliminary patent is applied in Estonia based on the research work of developing a new algorithm for division. Application no-70390 date-June 2020.  ...  Pipelined type Based on performance [15] , we can classify types of dividers as: 1. Slow type 2. Fast type (b) (c) III.  ...  Fixed-point division core from Xilinx results in difficulty implementing it universally in every application due to some restrictions imposed by its implementation requirements as  A large area occupied  ... 
doi:10.1109/access.2021.3055735 fatcat:flnsfd2szvgavhkcop7nozrff4

Low power self-timed radix-2 division

Jae-Hee Won, Kiyoung Choi
2000 ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514)  
A self-timed radix-2 division scheme for low power consumption is proposed.  ...  SPICE simulation results show that the proposed design can achieve 33.8-ns latency for 56-bit mantissa division and 47% energy reduction compared to a fully dual-rail version.  ...  SRT Algorithm We have adopted a radix-2 SRT division algorithm [6] with the RSD number system.  ... 
doi:10.1109/lpe.2000.155280 fatcat:nacrkng4tzedrjauimru7kuexi

Using an induction prover for verifying arithmetic circuits

Deepak Kapur, Mahadevan Subramaniam
2000 International Journal on Software Tools for Technology Transfer (STTT)  
multipliers and division circuits.  ...  Furthermore, it is believed that these results are scalable, and the proposed approach is likely to be effective for other arithmetic circuits as well.  ...  Proof attempts on the original conjecture may not succeed if all induction schemes are flawed [3, 46] . Generalizing a subterm may result in new schemes some of which may be unflawed.  ... 
doi:10.1007/pl00010808 fatcat:prlrlo2serb2tcn3qiwnz5s5pq

A dynamic specification to automatically debug and correct various divider circuits

Mohammad Hashem Haghbayan, Bijan Alizadeh
2016 Integration  
This paper presents a formal technique to verify and debug division circuits on fixed point numbers.  ...  The proposed technique is based on a reverse-engineering mechanism of obtaining a high level model of the gate level implementation and also introducing an intermediate representation of the specification  ...  Like QSF, the implementation of CFs depends on the type of the division algorithm.  ... 
doi:10.1016/j.vlsi.2015.12.004 fatcat:qrwppix6zngzbjnqi2rne4w2oq

Single Relaxation Time and Multiple Revised Matrix Lattice Boltzmann Simulations of Forced Isotropic Turbulence [article]

Waleed Abdel Kareem, Pietro Asinari, Sauro Succi, Seiichiro Izawa, Yu Fukunishi
2022 arXiv   pre-print
Some new aspects and results have been confirmed such as the superiority of the MRT model to simulate forced turbulence and using the Courant-Friedichs-Lewy condition (CFL) (Courant et al., 1967) by multiplying  ...  is almost unity at all timesteps for the MRT case, while a clear disturbance about unity is observed for the SRT case.  ...  Forcing method Different types of forcing schemes have been developed for isotropic turbulent flow simulations.  ... 
arXiv:2207.04400v1 fatcat:vlnkrcvhifgphp2rool3ma2oze

Fast Decimal Floating-Point Division

H. Nikmehr, B. Phillips, Cheng-Chew Lim
2006 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
HIGH-RADIX SRT DIVISION Surveys [14] and [19] show that many VLSI implementations of FP division are based on the SRT digit recurrence division algorithms.  ...  The algorithm is based on high-radix SRT division 1 with the recurrence in a new decimal signed-digit format.  ... 
doi:10.1109/tvlsi.2006.884047 fatcat:qsgxppwunfdsxmwilvpwvduf3a

Computer arithmetic and hardware: "off the shelf" microprocessors versus "custom hardware"

Daniel Etiemble
2002 Theoretical Computer Science  
First, we examine the impact of computer arithmetic on the overall performance of today's microprocessors.  ...  Finally, we show that programmable logic devices now permit a cost-e ective implementation of speciÿc arithmetic number representations, such as serial arithmetic or logarithmic representations.  ...  Fig. 7 . 7 Radix-2 SRT division diagram. Fig. 8 . 8 Data ow required for each SRT division stage.  ... 
doi:10.1016/s0304-3975(00)00424-2 fatcat:trzfntxn55avhctr665zflyccq

A Pseudopotential Lattice Boltzmann Method for Simulation of Two-Phase Flow Transport in Porous Medium at High-Density and High–Viscosity Ratios

Eslam Ezzatneshan, Reza Goharimehr, Zhaojie Song
2021 Geofluids  
Then, according to the results obtained, a conclusion has been made to choose an efficient numerical algorithm, including an appropriate collision operator, a realistic EoS, and an accurate forcing scheme  ...  In this work, the capability of a multiphase lattice Boltzmann method (LBM) based on the pseudopotential Shan-Chen (S-C) model is investigated for simulation of two-phase flows through porous media at  ...  To compare the obtained results for the two-phase flow characteristics through the porous medium in a similar situation, a normalized time T * is defined by division of the time step to the total simulation  ... 
doi:10.1155/2021/5668743 fatcat:inmy3vbny5ezngoyatmdr3qlou

Aberrant cell divisions in root meristeme of maize following exposure to X-rays low doses compared to similar effects of 50 Hz electromagnetic exposure

R. Focea, G. Capraru, M. Racuciu, D. Creanga, T. Luchian
2012 EPJ Web of Conferences  
Microscope slides were prepared following a specific procedure (squash technique and Feulgen method based on modified Carr reactive coloration).  ...  From a qualitative viewpoint, chromosomal aberrations such as interchromatidian bridges, lagging and expelled chromosomes and multipolar divisions were evidenced -no distinct situation for either ionizing  ...  Possibly some of such aberrant divisions propagate as genetic mutations in some cases.  ... 
doi:10.1051/epjconf/20122406004 fatcat:fagsvoq5bfgyfle55donltsfla


Andrew Chubykalo, Augusto Espinoza, Sergey Artekha
2016 International Journal of Advanced Research  
In this article we analyze some logical paradoxes of the special relativity theory (SRT), concerning the time dilation and length contraction.  ...  In such a case, one can formulate some symmetric setting of a problem with results which are evident from common sense.  ...  We can construct a symmetrical scheme of flower-type ( Fig. 4) , which includes rectilinear sections, where a large speed remains constant (inertial systems).  ... 
doi:10.21474/ijar01/1046 fatcat:qydfdmp6ejac3llxnqxn7yji5y

Sampling-based roadmap of trees for parallel motion planning

E. Plaku, K.E. Bekris, B.Y. Chen, A.M. Ladd, L.E. Kavraki
2005 IEEE Transactions on robotics  
Exploiting this property, we designed and implemented a parallel version of our planner.  ...  A key advantage of our planner is that it is significantly more decoupled than PRM and sampling-based tree planners.  ...  A. Benchmarks We ran our experiments on a set of benchmarks chosen to vary in type and in difficulty. An illustration of our benchmarks can be found in Fig. 1 and Fig. 2 .  ... 
doi:10.1109/tro.2005.847599 fatcat:27icvh2ydrfrzb7uzebjqolkju

Design and implementation of a Radix-100 division unit

Zhuo Wang, Liu Han, Seok-Bum Ko
2012 2012 IEEE International Symposium on Circuits and Systems  
Instead of using popular SRT (Sweeney, Robertson, and Tocher) division algorithm, selection by truncation algorithm is utilized.  ...  Besides, a compensation method is utilized to reduce the cycle time and the time consumed on the "multiples selection" module.  ...  However, it is obvious that the design is based on a cascaded SRT division method.  ... 
doi:10.1109/iscas.2012.6271460 dblp:conf/iscas/WangHK12 fatcat:4fhogrfkljap3iwybch2rshsnu
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