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Some Methods for Simplifying Switching Circuits Using "Don't Care" Conditions

J. T. Chu
1961 Journal of the ACM  
Several methods for simplifying switching circuits using ‘‘don’t-care’’ condi- tions are suggested.  ...  Some Metnods for Simplifying Switching Circuits UsingDon’t CareConditions* J. T. Caut Radio Corporation of America, Camden, New Jersey Abstract.  ... 
doi:10.1145/321088.321092 fatcat:dvhtwyh2mje5rkrj2qk44zebrm

Don't Care discovery for FPGA configuration compression

Zhiyuan Li, Scott Hauck
1999 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays - FPGA '99  
With the help of the Don't Cares, higher configuration compression ratios can be achieved by using our modified configuration compression algorithm.  ...  In this paper, we develop an algorithm for finding Don't Care bits in configurations to improve the compatibility of the configuration data.  ...  We now give some details on how to find Don't Cares for cells, switches and IOBs respectively.  ... 
doi:10.1145/296399.296435 dblp:conf/fpga/LiH99 fatcat:ft3yclwdfjdsbk5iln6ib3s2au

SAT sweeping with local observability don't-cares

Qi Zhu, Nathan Kitchen, Andreas Kuehlmann, Alberto Sangiovanni-Vincentelli
2006 Proceedings of the 43rd annual conference on Design automation - DAC '06  
SAT sweeping is a method for simplifying an AND/INVERTER graph (AIG) by systematically merging graph vertices from the inputs towards the outputs using a combination of structural hashing, simulation,  ...  Our reported results based on a set of industrial benchmark circuits demonstrate that ODC-based SAT sweeping results in significantly more graph simplification with great benefit for Boolean reasoning  ...  In [9] the use of observability don't-cares was proposed to simplify the functionality of internal circuit nodes by exploiting non-observability of their input assignments [9] .  ... 
doi:10.1145/1146909.1146970 dblp:conf/dac/ZhuKKS06 fatcat:2gtnltl7rngppk3jfcionzrweq

SAT sweeping with local observability don't-cares

Qi Zhu, N. Kitchen, A. Kuehlmann, A. Sangiovanni-Vincentelli
2006 Proceedings - Design Automation Conference  
SAT sweeping is a method for simplifying an AND/INVERTER graph (AIG) by systematically merging graph vertices from the inputs towards the outputs using a combination of structural hashing, simulation,  ...  Our reported results based on a set of industrial benchmark circuits demonstrate that ODC-based SAT sweeping results in significantly more graph simplification with great benefit for Boolean reasoning  ...  In [9] the use of observability don't-cares was proposed to simplify the functionality of internal circuit nodes by exploiting non-observability of their input assignments [9] .  ... 
doi:10.1109/dac.2006.229206 fatcat:qtvgulb4ifhjdbcn36j7l4j25e

SAT Sweeping with Local Observability Don't-Cares [chapter]

Qi Zhu, Nathan B. Kitchen, Andreas Kuehlmann, Alberto Sangiovanni-Vincentelli
2010 Advanced Techniques in Logic Synthesis, Optimizations and Applications  
In this paper we present a significant extension of the SATsweeping algorithm that uses observability don't-cares (ODCs) for greater graph simplification.  ...  SAT sweeping is a method for simplifying an AND/INVERTER graph (AIG) by systematically merging graph vertices from the inputs towards the outputs using a combination of structural hashing, simulation,  ...  In [9] the use of observability don't-cares was proposed to simplify the functionality of internal circuit nodes by exploiting non-observability of their input assignments [9] .  ... 
doi:10.1007/978-1-4419-7518-8_8 fatcat:hjwyvuhflbglvmcldtj2tjbcga

Efficient Symbolic Simulation via Dynamic Scheduling, Don't Caring, and Case Splitting [chapter]

Viresh Paruthi, Christian Jacobi, Kai Weber
2005 Lecture Notes in Computer Science  
Unlike prior work in case splitting which focused upon variable cofactoring, our approach leverages the full power of our don't-caring solution and intelligently selects arbitrary functions to apply as  ...  First, we introduce a dynamic scheduling algorithm for building BDDs for gates of the netlist, using an efficient hybrid of depth-and breadth-first traversal, and constant propagation.  ...  Only designs containing constraints were used for this experiment. The intermediate don't-caring using constraints (cf.  ... 
doi:10.1007/11560548_11 fatcat:xghg5ibjr5bujlzppd4ay5rfoa

Page 497 of Journal of the Association for Computing Machinery Vol. 8, Issue 4 [page]

1961 Journal of the Association for Computing Machinery  
Some Metnods for Simplifying Switching Circuits UsingDon’t CareConditions* J. T. Caut Radio Corporation of America, Camden, New Jersey Abstract.  ...  Several methods for simplifying switching circuits using ‘‘don’t-care’’ condi- tions are suggested.  ... 

Page 87 of The American Mathematical Monthly Vol. 62, Issue 2 [page]

1955 The American Mathematical Monthly  
(c) Simplify the switching function as much as possible, using relations (1)- (18) as they apply, and any “don’t-careconditions which may exist.  ...  The entries “d” in this column de- note the fact that we don’t care whether 0’s or 1’s appear in those positions.  ... 

Security through Obscurity: Layout Obfuscation of Digital Integrated Circuits using Don't Care Conditions

Sana Mehmood Awan
2015
The contribution of this paper is the creation and simulation of a new layout obfuscation method that uses don't care conditions.  ...  Our layout obfuscation technique utilizes don't care conditions (namely, Observability and Satisfiability Don't Cares) inherent in the circuit to camouflage selected gates and modify sub-circuit functionality  ...  CHAPTER 5: OBSERVABILITY DON'T CARE-BASED OBFUSCATION Our second work in this dissertation was to develop a method for layout obfuscation of circuits using Observability Don't Care conditions (ODCs).  ... 
doi:10.13016/m2s77v fatcat:vpsdpp56ofbgxpj252ehjxfxrm

Register Binding-Based RTL Power Management for Control-Flow Intensive Designs

J. Luo, L. Zhong, Y. Fei, N.K. Jha
2004 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
circuits which did not use PM register binding.  ...  Retentive multiplexers can preserve their previous select signal values in the control steps in which the select signals are don't-cares.  ...  It presents a sufficient condition for obtaining PPM RTL circuits for DFI behaviors. This method was extended in [18] to CFI behaviors based on the concept of variable and path protection.  ... 
doi:10.1109/tcad.2004.831597 fatcat:pzfdnsularfx5j5vfj5umqs7la

A Low-power ASIP Generation Method by Extracting Minimum Execution Conditions

Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai
2010 IPSJ Transactions on System LSI Design Methodology  
This paper proposes a low-power ASIP generation method by automatically extracting minimum execution conditions of pipeline registers for clock gating.  ...  For highly effective power reduction by clock gating, it is important to create minimum execution conditions, which can shut off redundant clock supplies for registers.  ...  A clock gating method based on the Observability Don't Care (ODC) 8) can derive the minimum execution conditions of registers by ODC calculation.  ... 
doi:10.2197/ipsjtsldm.3.222 fatcat:cnacnuqosfbshn447emvzq5nkq

Assignment and reordering of incompletely specified pattern sequences targetting minimum power dissipation

P. Flores, J. Costa, H. Neto, J. Monteiro, J. Marques-Silva
1999 Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)  
For a significant number of electronic systems used in safety-critical applications circuit testing is performed periodically.  ...  Preliminary experimental results amply confirm that the resulting power savings due to pattern sequence reordering using don't cares can be significant.  ...  Given some statistical information of the inputs, probabilistic methods propagate this information through the logic circuit obtaining statistics about the switching activity at each node in the circuit  ... 
doi:10.1109/icvd.1999.745121 dblp:conf/vlsid/FloresCNMM99 fatcat:aavkmxgujvgktkmaaky4yz3cvm

Sequential logic optimization for low power using input-disabling precomputation architectures

J. Monteiro, S. Devadas, A. Ghosh
1998 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
We present a method to automatically synthesize precomputation logic for this architecture. Up to 66% reduction in power dissipation is possible using the proposed architecture.  ...  Index Terms-Design automation, low power, observability don't-cares, power management, very-large-scale integration.  ...  Second, the original circuit is simplified due to the don't-care conditions in the complete input-disabling architecture. VI.  ... 
doi:10.1109/43.700725 fatcat:bkv3r3uvcnfmxhyzpobeougfsa

A 65 nm 0.165 fJ/Bit/Search 256$\,\times\,$144 TCAM Macro Design for IPv6 Lookup Tables

Po-Tsang Huang, Wei Hwang
2011 IEEE Journal of Solid-State Circuits  
This work presents a novel 65 nm energy-efficient TCAM macro design for IPv6 applications. The proposed TCAM employs the concept of architecture and circuit co-design.  ...  The match-lines are also implemented using noise-tolerant XOR-based conditional keepers to reduce not only the search time but also the power consumption.  ...  Fig. 5(a) displays a simplified architecture of the don't-care-based hierarchical search-line scheme.  ... 
doi:10.1109/jssc.2010.2082270 fatcat:vbyzjmzcwfalbkaaaerzj7qpgu

Logic optimization and equivalence checking by implication analysis

W. Kunz, D. Stoffel, P.R. Menon
1997 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
It shows that an ordinary test generator for single stuckat faults can be used to perform arbitrary transformations in a combinational circuit and discusses how this approach relates to conventional multilevel  ...  By identifying indirect implications between signals in the circuit, transformations can be derived which are "good" candidates for the minimization of the circuit.  ...  Srinivasan for providing us with industrial designs for our experimental evaluation. The authors are also grateful to M. Cobenuss for his help in various ways.  ... 
doi:10.1109/43.594832 fatcat:a76yphdbqzahxpqmvffn2f63fq
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