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Solving constraints on the invisible bits of the intermediate result for floating-point verification

M. Aharoni, S. Asaf, R. Maharik, I. Nehama, I. Nikulshin, A. Ziv
2005 17th IEEE Symposium on Computer Arithmetic (ARITH'05)  
Our work investigates the following problem: Given a floating-point operation, and constraints on the invisible bits and the sticky bit, find two inputs for the operation that yield an intermediate result  ...  Test generation for datapath floating-point verification involves targeting intricate corner cases, which can often be solved only through complex constraint solving.  ...  We focus on solving constraints on the invisible bits, including the sticky bit, of the intermediate result, so that each bit is individually constrained to 0 or 1, or else is unconstrained.  ... 
doi:10.1109/arith.2005.38 dblp:conf/arith/AharoniAMNNZ05 fatcat:avsqrf7qz5hl5c3pnbhrljdgvq

Making Software Verification Tools Really Work [chapter]

Jade Alglave, Alastair F. Donaldson, Daniel Kroening, Michael Tautschnig
2011 Lecture Notes in Computer Science  
Practical hurdles include the challenges arising from realworld systems features, such as floating-point arithmetic and weak memory.  ...  Our long-term vision is for the community to produce tools that are indispensable for a developer but so seamlessly integrated into a development environment, as to be invisible.  ...  We are also grateful to Dragan Bošnački for insightful comments on an earlier draft of this work.  ... 
doi:10.1007/978-3-642-24372-1_3 fatcat:me5zmhg5irgurazxa5jgjkxvgm

A high-level compilation toolchain for heterogeneous systems

W. Luk, J.G.F. Coutinho, T. Todman, Y.M. Lam, W. Osborne, K.W. Susanto, Q. Liu, W.S. Wong
2009 2009 IEEE International SOC Conference (SOCC)  
We also use the C language with source-annotations as intermediate representation for the toolchain, making it easier for users to understand and to control the compilation process.  ...  The main goal of Harmonic is to improve an application by partitioning and optimising each part of the program, and selecting the most appropriate processing element in the system to execute each part.  ...  We thank George Constantinides, Matti Juvonen and Philip Leong for their contributution to the material described in this paper.  ... 
doi:10.1109/soccon.2009.5398108 dblp:conf/socc/LukCTLOSLW09 fatcat:m3hkuvrzx5cehknqevi7wbyrkq

On the Properties of Non-Media Digital Watermarking: A Review of State of the Art Techniques

Arezou Soltani Panah, Ron Van Schyndel, Timos Sellis, Elisa Bertino
2016 IEEE Access  
For example, a loose definition of robustness might be in terms of the resilience of a watermark against normal host data operations, and of invisibility as resilience of the data interpretation against  ...  For multimedia watermarks, invisibility is defined in human terms (that is, in terms of human sensory limitations).  ...  The proposed method is also applicable for marking negative integers, floating point numbers and low-entropy datasets.  ... 
doi:10.1109/access.2016.2570812 fatcat:2xxteahvprepzekaqqbbyey7hi

Accelerating Faceting Wide-Field Imaging Algorithm with FPGA for SKA Radio Telescope as a Vast Sensor Array

Yuefeng Song, Yongxin Zhu, Tianhao Nan, Junjie Hou, Sen Du, Shijin Song
2020 Sensors  
The simulation and tests on FPGA are done to confirm the acceleration result of our design and it is shown that the acceleration performance we achieved on phase rotation is 20× the result of the previous  ...  Hence, our approach enables efficient acceleration of the faceting algorithm on FPGAs with high performance to meet the computational constraints of SKA as a representative vast sensor array.  ...  Acknowledgments: We would like to thank the Xilinx University Program (XUP) for their support of Xilinx EDA tools and hardware.  ... 
doi:10.3390/s20154070 pmid:32707801 fatcat:mehfwj55zncgtlav4k4rksbyva

Certification of bounds on expressions involving rounded operators

Marc Daumas, Guillaume Melquiond
2010 ACM Transactions on Mathematical Software  
using fixed-and floating-point arithmetics.  ...  This Coq library provides theorems dealing with addition, multiplication, division, and square root, for both fixedand floating-point arithmetics.  ...  Line 1 below defines the rnd function as rounding to nearest using IEEE 754 standard for 32 bit floating-point data.  ... 
doi:10.1145/1644001.1644003 fatcat:nb6win5sfze4xoz75loxdj4z4i

SGML documents: Where does quality go?

José Carlos Ramalho, Jorge Gustavo Rocha, José João Almeida, Pedro Henriques
1999 Markup Languages: Theory and Practice  
With SGML we can solve part of the problem, structural/syntactic correctness.  ...  Quality control in electronic publications should be one of the major concerns of everyone who is managing a project.  ...  The author/user will work in the usual way (the changes are invisible from the user point of view).  ... 
doi:10.1162/109966299751940850 fatcat:hpscko4hrngorcstszikawq6ie

DECAF: A Platform-Neutral Whole-System Dynamic Binary Analysis Platform

Andrew Henderson, Lok Kwong Yan, Xunchao Hu, Aravind Prakash, Heng Yin, Stephen McCamant
2017 IEEE Transactions on Software Engineering  
DECAF implements a new instruction-level taint tracking engine at bit granularity, which exercises fine control over the QEMU Tiny Code Generator (TCG) intermediate representation to accomplish on-the-fly  ...  While several dynamic binary analysis tools and frameworks have been proposed, all suffer from one or more of: prohibitive performance degradation, a semantic gap between the analysis code and the program  ...  ACKNOWLEDGMENTS We would like to thank the anonymous reviewers for their comments.  ... 
doi:10.1109/tse.2016.2589242 fatcat:n7mqdtkdjzeldnlu7b2itenvbi

Theory of Multi Core Hypervisor Verification [chapter]

Ernie Cohen, Wolfgang Paul, Sabine Schmaltz
2013 Lecture Notes in Computer Science  
However, there is a significant gap between code verification of a kernel (such as a hypervisor) and a proof of correctness of a real system running the code.  ...  When the project ended in 2010, crucial and tricky portions of the hypervisor product were formally verified, but one was far from having an overall theory of multi core hypervisor correctness even on  ...  The formal verification of an optimizing compiler for the intermediate language C-minor is reported in [28] .  ... 
doi:10.1007/978-3-642-35843-2_1 fatcat:fe62ercjczcxrkl7te7ifyc56e

Portable Software Fault Isolation

Joshua A. Kroll, Gordon Stewart, Andrew W. Appel
2014 2014 IEEE 27th Computer Security Foundations Symposium  
Unlike traditional SFI, which relies on analysis of assembly-level programs, we analyze and rewrite programs in a compiler intermediate language, the Cminor language of the CompCert C compiler.  ...  the SFI memory safety policy for any of CompCert's supported architectures (currently: PowerPC, ARM, and x86-32).  ...  ACKNOWLEDGMENTS We wish to thank sincerely the anonymous referees and everyone who read drafts of this work, especially Lennart Beringer, Drew Dean, and Edward W. Felten.  ... 
doi:10.1109/csf.2014.10 dblp:conf/csfw/KrollSA14 fatcat:3nbs6e6gtza5veoggnepamndeu

Using visualization for visualization: An ecological interface design approach to inputting data

H. Wright, C. Mathers, J.P.R.B. Walton
2013 Computers & graphics  
This paper proposes an entirely new way of inputting data for scientific visualization that employs rapid interaction and visual feedback in order to understand how the data is stored.  ...  The approach draws on ideas from the discipline of ecological interface design to extract and control important parameters describing the data, at the same time harnessing our innate human ability to recognise  ...  Adjusting the starting point of the byte selection results in (b).  ... 
doi:10.1016/j.cag.2013.01.013 fatcat:5566jyw3uzdtdompnizcwmpwwe

Combining Model Checking and Testing [chapter]

Patrice Godefroid, Koushik Sen
2018 Handbook of Model Checking  
Over the last two decades, significant progress has been made on how to broaden the scope of model checking from finite-state abstractions to actual software implementations.  ...  One way to do this consists of adapting model checking into a form of systematic testing that is applicable to industrial-size software.  ...  bit-vectors, arrays, uninterpreted functions, etc.), and by the type of constraint solvers they use (such as lp solve, CVClite, STP, Disolver, Yikes, Z3, etc.).  ... 
doi:10.1007/978-3-319-10575-8_19 fatcat:o7z7rus4ebesdlatlvgockypjy

Exploiting a Graphical Programming Paradigm to Facilitate Rigorous Verification of Embedded Software

W. A. Halang, B. Kramer, L. Trybus
1995 Computer journal  
A computing architecture enabling economical safety licensing of software embedded in safety-critical technical systems is defined. The architecture relies on mature methods and technology only.  ...  For safety-related program controlled electronic systems, safety licensing of software is extremely critical, since it is far from being as dependable as hardware.  ...  On the other hand, PLCs cannot perform many floating point calculations, because the scan time would quickly exceed acceptable limits.  ... 
doi:10.1093/comjnl/38.4.301 fatcat:d57gtrxdbbf3nnvjlwpjwueqfq

A Scalable Factory Backbone for Multiple Independent Time-Sensitive Networks

Wolfram Lautenschlaeger, Florian Frick, Konstantinos Christodoulopoulos, Torben Henke
2021 Journal of systems architecture  
Convergence of time-sensitive machine control networks as part of the operational technology (OT) with the ubiquitous information technology (IT) networks is an essential requirement for the ongoing digitalization  ...  In this paper, we review the fundamental differences between both technologies, the challenges to be solved, existing and upcoming solutions like TSN and their limitations.  ...  The proposals suffer from one weak point: The definition of an acceptable jitter level.  ... 
doi:10.1016/j.sysarc.2021.102277 fatcat:g5xalkjrkbe5lafv54ebzzhvf4

Final Statements [chapter]

2009 FPGA-Based Implementation of Signal Processing Systems  
The authors would like to thank Richard Walke and John Gray for motivating a lot of the work at Queen's University Belfast on FPGA.  ...  A number of other people have also acted to contribute in many other ways to either provide technical input or support. These  ...  The CM-2 had quite of number of simple PEs (typically 64 000) which processed one bit at a time, but was later extended to floating point.  ... 
doi:10.1002/9780470713785.ch14 fatcat:b5uyg6k2qbhnncscazm2ickxki
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