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Optimizing the FPGA Implementation of HRT Systems

Marco Di Natale, Enrico Bini
2007 Real Time and Embedded Technology and Applications Symposium (RTAS), IEEE  
for the implementation of embedded applications with real-time constraints.  ...  means of a real-time task executed by a softcore.  ...  We performed the optimization assuming a number of processors ranging from 0 to 9.  ... 
doi:10.1109/rtas.2007.25 dblp:conf/rtas/NataleB07 fatcat:7cv7wjbo4fapbnmz7y6hhauh3e

Dynamic Task Distribution Model for On-Chip Reconfigurable High Speed Computing System

Mahendra Vucha, Arvind Rajawat
2015 International Journal of Reconfigurable Computing  
Modern embedded systems are being modeled as Reconfigurable High Speed Computing System (RHSCS) where Reconfigurable Hardware, that is, Field Programmable Gate Array (FPGA), and softcore processors configured  ...  Some benchmark applications are represented as DAG and are distributed to the resources of RHSCS based on DTD-MLF model.  ...  The reconfigurable systems having FPGA as PE [10] [11] [12] [13] bring phenomenon of dynamic reconfiguration to the applications at the lack of softcore processor or at the expense of offchip softcore  ... 
doi:10.1155/2015/783237 fatcat:kozszwtk4jbl3dvaqqnipeq6ji

ARCHITECT-R

R. A. Gonçalves, P. A. Moraes, J. M. P. Cardoso, D. F. Wolf, M. M. Fernandes, R. A. F. Romero, E. Marques
2003 Proceedings of the 2003 ACM symposium on Applied computing - SAC '03  
An increasing interest in the design of mobile robots has been observed in recent years, which is mainly motivated by technologic al advances that may allow their application to consumer markets, in addition  ...  to industrial areas.  ...  Since they require high computational efforts, it is important to improve its performance, especially to make feasible its use in real-time systems.  ... 
doi:10.1145/952660.952665 fatcat:lvrwtwok7zgnlkd6ahgkzwu6uu

ARCHITECT-R

R. A. Gonçalves, P. A. Moraes, J. M. P. Cardoso, D. F. Wolf, M. M. Fernandes, R. A. F. Romero, E. Marques
2003 Proceedings of the 2003 ACM symposium on Applied computing - SAC '03  
An increasing interest in the design of mobile robots has been observed in recent years, which is mainly motivated by technologic al advances that may allow their application to consumer markets, in addition  ...  to industrial areas.  ...  Since they require high computational efforts, it is important to improve its performance, especially to make feasible its use in real-time systems.  ... 
doi:10.1145/952532.952665 dblp:conf/sac/GoncalvesMCWFRM03 fatcat:listfpiarneifgpv3uu7tug2r4

An FPGA Implementation of HW/SW Codesign Architecture for H.263 Video Coding [chapter]

A. Ben, P. Kadionik, F. Ghozzi, P. Nouel, N. Masmoudi, H. Levi
2011 Effective Video Coding for Multimedia Applications  
We have proposed timing optimization of the encoder.  ...  We have shown that a 15.8-16.5 times improvement in coding speed compared to software based solution can be obtained using the HW/SW implementation.  ...  Softcore processors can be easily customized to the needs of a specific target application (e.g. multimedia embedded systems). The two major FPGA manufacturers provide commercial softcore processors.  ... 
doi:10.5772/15469 fatcat:kj6wb7achbfl3oklljvzmrj2me

An FPGA implementation of HW/SW codesign architecture for H.263 video coding

Ahmed Ben Atitallah, Patrice Kadionik, Fahmi Ghozzi, Patrice Nouel, Nouri Masmoudi, Herve Levi
2007 AEU - International Journal of Electronics and Communications  
We have proposed timing optimization of the encoder.  ...  We have shown that a 15.8-16.5 times improvement in coding speed compared to software based solution can be obtained using the HW/SW implementation.  ...  Softcore processors can be easily customized to the needs of a specific target application (e.g. multimedia embedded systems). The two major FPGA manufacturers provide commercial softcore processors.  ... 
doi:10.1016/j.aeue.2006.11.001 fatcat:zwjf7sz45zhfzf66ayqcn6hslm

MCGREP--A Predictable Architecture for Embedded Real-Time Systems

Jack Whitham, Neil Audsley
2006 2006 27th IEEE International Real-Time Systems Symposium (RTSS'06)  
Utilizing slower, more predictable processors, may not provide sufficient instruction throughput to execute all required application processes.  ...  Real-time systems design involves many important choices, including that of the processor.  ...  MCGREP has been implemented on an FPGA, and compares well to existing softcores. Some of the uses for MC-GREP in real-time applications have been demonstrated by experiment.  ... 
doi:10.1109/rtss.2006.28 dblp:conf/rtss/WhithamA06 fatcat:s5pz3vqeefdpvpd5natc5c3pqu

Reconfigurable Multiprocessor Systems: A Review

Taho Dorta, Jaime Jiménez, José Luis Martín, Unai Bidarte, Armando Astarloa
2010 International Journal of Reconfigurable Computing  
Flexibility is one of the strong points of this kind of system, and multiprocessor systems can even be reconfigured at run time, allowing hardware to be adjusted to the demands of the application.  ...  Advances in FPGA technology are leading to more powerful systems in terms of processing and flexibility.  ...  New applications in modern embedded systems require complex multiprocessor designs to reach Real-Time (RT) deadlines while overcoming other critical constraints such as power consumption and low area.  ... 
doi:10.1155/2010/570279 fatcat:uho74omrjzbjhe5nwm36zupxam

Configurable Multiprocessor Platform with RTOS for Distributed Execution of UML 2.0 Designed Applications

T. Arpinen, P. Kukkala, E. Salminen, M. Hannikainen, T.D. Hamalainen
2006 Proceedings of the Design Automation & Test in Europe Conference  
Each processor has a local copy of eCos real-time operating system for the scheduling of multiple application threads.  ...  To our knowledge, this is the first real implementation combining a high-level design flow with a synthesizable platform.  ...  Inter-Processor Communication (IPC) support functions are required to perform distributed application execution.  ... 
doi:10.1109/date.2006.244125 dblp:conf/date/ArpinenKSHH06 fatcat:nzotwsgq5rh53lnz6ujqlr4qwe

A novel hardware/software embedded system based on automatic censored target detection for radar systems

Ridha Djemal, Kais Belwafi, Walid Kaaniche, Saleh A. Alshebeili
2013 AEU - International Journal of Electronics and Communications  
This paper presents a practical design exploration for a new application related to real-time, highresolution target detection for radar systems.  ...  increase the accuracy of the detection and to reduce the false-alarm rate for both homogeneous and non-homogeneous environments.  ...  The CA-CFAR processor is the optimal CFAR processor in homogeneous environments.  ... 
doi:10.1016/j.aeue.2012.09.001 fatcat:utygmh5cmrbbbbaadnlcgzcdhy

Realizing reconfigurable mesh algorithms on softcore arrays

Heiner Giefers, Marco Platzner
2008 2008 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation  
In this paper, we present the mapping of reconfigurable mesh algorithms to softcore arrays.  ...  However, these low complexities can not be exploited due to the unrealistic assumption that communication time is either constant or logarithmic in the number of cores.  ...  In contrast, we are interested in more complex applications that require the processors to compute different and larger codes.  ... 
doi:10.1109/icsamos.2008.4664845 dblp:conf/samos/GiefersP08 fatcat:353d4qdnxjgafpgkes6vymuzpm

Early results from ERA — Embedded Reconfigurable Architectures

Stephan Wong, Anthony Brandon, Fakhar Anjam, Roel Seedorf, Roberto Giorgi, Zhibin Yu, Nikola Puzovic, Sally A. Mckee, Magnus Sjalander, Luigi Carro, Georgios Keramidas
2011 2011 9th IEEE International Conference on Industrial Informatics  
Commercially available, off-the-shelf processors are combined with other proprietary and application-specific, dedicated cores.  ...  the given application(s).  ...  Currently, we are working on area-and performance optimizations of the ρ-VEX processor in order to decrease its required FPGA resources.  ... 
doi:10.1109/indin.2011.6034998 fatcat:d2b43ieto5a33lb3svr2swahni

ERA – Embedded Reconfigurable Architectures [chapter]

Stephan Wong, Luigi Carro, Mateus Rutzig, Debora Motta Matos, Roberto Giorgi, Nikola Puzovic, Stefanos Kaxiras, Marcelo Cintra, Giuseppe Desoli, Paolo Gai, Sally A. Mckee, Ayal Zaks
2011 Reconfigurable Computing  
Commercially available, off-the-shelf processors are combined with other proprietary and application-specific, dedicated cores.  ...  the given application(s).  ...  Currently, we are working on area-and performance optimizations of the ρ-VEX processor in order to decrease its required FPGA resources.  ... 
doi:10.1007/978-1-4614-0061-5_10 fatcat:nliffibv2nevvbqv5f2q2hadzm

Vehicle localization systems: towards low-cost architectures

Samir SAKHI, Abdelhafid ELOUARDI, Samir BOUAZIZ, Mahmoud BELHOCINE
2016 Turkish Journal of Electrical Engineering and Computer Sciences  
Moreover, we also evaluate the navigation algorithm on a low-cost ARM processor.  ...  INS-GPS integration is a fundamental task used to enhance the accuracy of an inertial navigation system alone. However, its implementation complexity has been a challenge to most embedded systems.  ...  We compared the performances and the computation precision between various hardware architectures according to the floating-point format of calculation (SP and DP).  ... 
doi:10.3906/elk-1402-260 fatcat:vjawwugnbjg5zksdtnyfpo2zvi

Hardware Design of Embedded Systems for Security Applications [chapter]

Camel Tanougast, Abbas Dandache, Mohamed Salah, Said Sadoudi
2012 Embedded Systems - High Performance Systems, Applications and Projects  
The key characteristic of an embedded system is that it is dedicated to the handling of a particular task. They may require very powerful processors and extensive communications.  ...  embedded applications.  ...  These configured processor units are called softcore processors as opposed to hardcore processors, which are buried in the silicon of the FPGA.  ... 
doi:10.5772/38649 fatcat:l6isvwc4xnd5bed52pxtnltala
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