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A Survey Approach - Multiprocessing on FPGA using Light Weight Processor
IJIREEICE - Electrical, Electronics, Instrumentation and Control

Shivaraja B G, Shankar B B, Praveen J, Raghavendra Rao A
2015 IJIREEICE  
Multiprocessor embedded systems (MESes) are a very promising approach for high performance yet relatively low-cost computing.  ...  These Multiprocessors have been widely used in modern high performance embedded system to meet the computational needs of smart, real time applications spread across multiple domains.  ...  From the study of paper [3] , soft multiprocessors on FPGAs only lose a 2.6X factor in performance normalized to area compared to a network processor implementation for the IPv4packet forwarding application  ... 
doi:10.17148/ijireeice.2015.3303 fatcat:gzce4l6mi5aqhp4sexhqcmbcbi

Design space exploration using arithmetic-level hardware--software cosimulation for configurable multiprocessor platforms

Jingzhao Ou, Viktor K. Prasanna
2006 ACM Transactions on Embedded Computing Systems  
Configurable multiprocessor platforms consist of multiple soft processors configured on FPGA devices. They have become an attractive choice for implementing many computing applications.  ...  The configurable multiprocessor platforms are described using these arithmetic-level abstractions.  ...  The authors would also like to thank Phil James-Roxby for offering us the original VHDL multiprocessor design of the JPEG2000 application.  ... 
doi:10.1145/1151074.1151080 fatcat:4h5l2jh5crdwnpktv2m7vepki4

Application Specific Customization and Scalability of Soft Multiprocessors

Deepak Unnikrishnan, Jia Zhao, Russell Tessier
2009 2009 17th IEEE Symposium on Field Programmable Custom Computing Machines  
Several studies have examined the behavior of common parallel processing applications such as sorting networks on soft multiprocessor systems developed from commercial soft-core IP blocks.  ...  Soft multiprocessor ISA subsetting and memory size optimization In general, soft microprocessors use only a portion of their ISA for filter implementation.  ... 
doi:10.1109/fccm.2009.41 dblp:conf/fccm/UnnikrishnanZT09 fatcat:7cjy7ltl4rcyzlo7e2p4hdecdq

Reconfigurable Multiprocessor Systems: A Review

Taho Dorta, Jaime Jiménez, José Luis Martín, Unai Bidarte, Armando Astarloa
2010 International Journal of Reconfigurable Computing  
Modern digital systems demand increasing electronic resources, so the multiprocessor platforms are a suitable solution for them.  ...  Flexibility is one of the strong points of this kind of system, and multiprocessor systems can even be reconfigured at run time, allowing hardware to be adjusted to the demands of the application.  ...  Acknowledgments This work has been supported by the Department of Education, Universities and Research of the Basque Government within the fund for research groups of the Basque university system IT394  ... 
doi:10.1155/2010/570279 fatcat:uho74omrjzbjhe5nwm36zupxam

Special issue: Real-Time Systems (Euromicro RTS-03)

Giorgio C. Buttazzo
2005 Journal of Embedded Computing  
The ninth paper, "Efficient Scheduling of Soft Realtime Applications on Multiprocessors", by Anand Srinivasan and James Anderson, considers soft realtime applications implemented on multiprocessors.  ...  upon identical multiprocessors, under the assumptions that each task instance can only have a fixed priority and can only execute on a single processor.  ... 
dblp:journals/jec/Buttazzo05 fatcat:vtqhbrirvbfw5n5mtus6ilzxvm

An automated exploration framework for FPGA-based soft multiprocessor systems

Yujia Jin, Nadathur Satish, Kaushik Ravindran, Kurt Keutzer
2005 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05  
FPGA-based soft multiprocessors are viable system solutions for high performance applications. They provide a software abstraction to enable quick implementations on the FPGA.  ...  The multiprocessor can be customized for a target application to achieve high performance.  ...  The output of our exploration is a soft multiprocessor system customized for the target application.  ... 
doi:10.1145/1084834.1084903 dblp:conf/codes/JinSRK05 fatcat:llzqhusnyrghlbu5vkh37dzsca

A HETEROGENEOUS MULTIPROCESSOR SYSTEM-ON-CHIP ARCHITECTURE INCORPORATING MEMORY ALLOCATION

T.Thillaikkarasi, A. Jagadeesan, K.Duraiswamy
2010 ICTACT Journal on Communication Technology  
It addresses the problem of mapping a process network with data dependent behavior and soft real time constraints onto the heterogeneous multiprocessor System on Chip (SoC) architectures and focuses on  ...  An application is modeled as Kahn Process Network (KPN) which makes the parallelism present in the application explicit.  ...  In this paper, we address the problem of synthesis of application specific multiprocessor SoC architectures for process networks of streaming applications.  ... 
doaj:b8211922f0a64f35b745d94ebd811555 fatcat:klc3lpzgszcs5j253a7abmdrzy

Guest Editorial for Special Issue of ESWEEK 2015

Petru Eles, Rolf Ernst
2016 ACM Transactions on Embedded Computing Systems  
Manfred Morari, professor at ETH Zuerich, and one of the most prominent researchers in automated control, demonstrated the importance of embedded system performance for cyber-physical systems in the keynote  ...  Michael Fausten, VP, Vehicle Systems Development at Bosch, asked "Evolution or Revolution?" as he explained the requirements for the architecture of automated vehicles.  ...  The authors of "An Efficient Technique of Application Mapping and Scheduling on Real-Time Multiprocessor Systems for Throughput Optimization" consider a homogeneous multiprocessor architecture.  ... 
doi:10.1145/2968218 fatcat:was6e46scvcbfmlbdirffmdwdu

An Automatic Design Flow for Data Parallel and Pipelined Signal Processing Applications on Embedded Multiprocessor with NoC: Application to Cryptography

Xinyu Li, Omar Hammami
2009 International Journal of Reconfigurable Computing  
And the overall multiprocessor architecture is still kept for additional applications. This provides a transition to software only parallel implementation while avoiding pure hardware implementation.  ...  Embedded system design is increasingly based on single chip multiprocessors because of the high performance and flexibility requirements.  ...  IP component Description Source Version Qty Processor Soft core IP Microblaze Soft core IP Xilinx 5.00 b 12 Memory Soft core IP Xilinx Coregen 96 KB v.2.4. 8 Network on chip switch Soft  ... 
doi:10.1155/2009/631490 fatcat:kcrbtxmc7jgd3jptwwrxqcuqf4

On-chip sensor networks for soft-error tolerant real-time multiprocessor systems-on-chip

Weichen Liu, Xuan Wang, Jiang Xu, Wei Zhang, Yaoyao Ye, Xiaowen Wu, Mahdi Nikdast, Zhehui Wang
2014 ACM Journal on Emerging Technologies in Computing Systems  
On-chip sensor networks for soft-error tolerant real-time multiprocessor systems-on-chip.  ...  There are generally two classes of approaches to achieving system-level fault tolerance for multiprocessor systems.  ...  the performance of applications running on multiprocessor systems.  ... 
doi:10.1145/2564928 fatcat:66r4x436rfh2jhx7olz6tbcrqy

Configuration and Programming of Heterogeneous Multiprocessors on a Multi-FPGA System Using TMD-MPI

Manuel Saldana, Daniel Nunes, Emanuel Ramalho, Paul Chow
2006 2006 IEEE International Conference on Reconfigurable Computing and FPGA's (ReConFig 2006)  
A programming model for multiprocessor Systems-On-FPGAs should be standard and application independent, but optimized for a particular architecture.  ...  The penalty is the loss of generality in the architecture, but reconfigurability of FPGAs allows them to be reprogrammed for other applications.  ...  Acknowledgments We acknowledge the CMC/SOCRN, NSERC and Xilinx for the funding provided for this project. CONACYT in Mexico provided funding to Manuel Saldaña.  ... 
doi:10.1109/reconf.2006.307779 dblp:conf/reconfig/SaldanaNRC06 fatcat:ganr7p2aibhhbgpcf7f55etmmy

Routability of Network Topologies in FPGAs

M. Saldana, L. Shannon, Jia Shuo Yue, Sikang Bian, J. Craig, P. Chow
2007 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
For systems with a modest number of nodes implemented on current large FPGAs, it is not necessary to use the connectivity-limited topologies typically used for networks-on-chip.  ...  Except for the fully-connected networks, it is observed that the difference in logic resources used and routing overhead among these topologies is insignificant for the systems tested.  ...  They would also like to thank the reviewers for their comments.  ... 
doi:10.1109/tvlsi.2007.900746 fatcat:xinxci4jajaijllwozbgfhdeoq

Windowed FIFOs for FPGA-based Multiprocessor Systems

Kai Huang, David Grunert, Lothar Thiele
2007 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP)  
FPGA-based multiprocessor systems are viable solutions for stream-based embedded applications. They provide a software abstraction which enables coarse-grained parallel deployment on an FPGA chip.  ...  We introduce our abstraction of WFIFO process network which is suitable for systematic and automated synthesis while still inheriting the nice property of Kahn process networks, i.e. being determinate.  ...  In [8] , an exploration framework is presented to build FPGA multiprocessor systems for stream-oriented applications, generating homogeneous networks of MicroBlaze processors interconnected by buses and  ... 
doi:10.1109/asap.2007.4429955 dblp:conf/asap/HuangGT07 fatcat:c6jgf6kq5nboxim7vjs2wrpc3i

Multiprocessor on chip: beating the simulation wall through multiobjective design space exploration with direct execution

R.B. Mouhoub, O. Hammami
2006 Proceedings 20th IEEE International Parallel & Distributed Processing Symposium  
This paper proposes a new performance evaluation methodology for multiprocessors on chip which conduct a multiobjective design space exploration through emulation.  ...  Design space exploration of multiprocessors on chip requires both automatic performance analysis techniques and efficient multiprocessors configuration performance evaluation.  ...  Soft IP Based Embedded Multiprocessor System Embedded systems based on soft IPs are SoC including; soft IP processors, interconnect infrastructure and memories.  ... 
doi:10.1109/ipdps.2006.1639623 dblp:conf/ipps/MouhoubH06 fatcat:oeagswclb5fgpksaucl3nvz7wa

Dataflow Analysis for Real-Time Embedded Multiprocessor System Design [chapter]

Marco Bekooij, Rob Hoes, Orlando Moreira, Peter Poplavko, Milan Pastrnak, Bart Mesman, Jan David Mol, Sander Stuijk, Valentin Gheorghita, Jef van Meerbergen
2005 Philips Research  
Dataflow analysis techniques are key to reduce the number of design iterations and shorten the design time of real-time embedded network based multiprocessor systems that process data streams.  ...  For soft real-time applications these static dataflow analysis techniques are combined with simulation of the dataflow model to test statistical assertions about their temporal behavior.  ...  Given the PRT of an actor we will predict the resource budget for a soft real-time job. MULTIPROCESSOR SYSTEM TEMPLATE This section describes a network based multiprocessor system.  ... 
doi:10.1007/1-4020-3454-7_4 fatcat:edr2zdlyqffpbpl2b62vmmfkdi
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