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Single-level integrity and confidentiality protection for distributed shared memory multiprocessors

Brian Rogers, Chenyu Yan, Siddhartha Chhabra, Milos Prvulovic, Yan Solihin
2008 High-Performance Computer Architecture  
In this work, we propose architectural mechanisms to ensure data confidentiality and integrity in Distributed Shared Memory multiprocessors which utilize a point-topoint based interconnection network.  ...  In this work we propose a new and efficient memory encryption and authentication solution for protecting the confidentiality and integrity of data in a DSM system.  ...  Conclusions In this paper, we have proposed a single-level data encryption and authentication scheme to protect the confidentiality and integrity of data in Distributed Shared Memory multiprocessors that  ... 
doi:10.1109/hpca.2008.4658636 dblp:conf/hpca/RogersYCPS08 fatcat:hiv72zl6xfgr5hm7qdkixrpriq

Distributed Security for Communications and Memories in a Multiprocessor Architecture

Pascal Cotret, Jeremie Crenne, Guy Gogniat, Jean-Philippe Diguet, Lubos Gaspar, Guillaume Duc
2011 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum  
An unauthorized format may overwrite some protected data in the target IP. • Confidentiality and Integrity Modes (CM and IM).  ...  For each option, it is possible to execute or to bypass confidentiality (block cipher) and integrity (hash trees) modules.  ... 
doi:10.1109/ipdps.2011.158 dblp:conf/ipps/CotretCGDGD11 fatcat:fis4mvjob5hqbbaimxh37nznbu

I2SEMS: Interconnects-Independent Security Enhanced Shared Memory Multiprocessor Systems

Manhee Lee, Minseon Ahn, Eun Jung Kim
2007 Parallel Architecture and Compilation Techniques (PACT), Proceedings of the International Conference on  
In this paper, we present a fast and efficient method for providing secure memory and cache-to-cache communications in shared memory multiprocessor systems that are becoming enormously popular in designing  ...  We tested our design with SPLASH-2 benchmarks on up to 16-processor shared memory multiprocessor systems.  ...  Next, we would like to expand our research to much larger multiprocessor systems with distributed shared memory (DSM) and to new multiprocessor architectures such as Chip Multiprocessor (CMP) systems.  ... 
doi:10.1109/pact.2007.4336203 fatcat:62pacrxg2feeheqlzn54enu2di

An Analysis of Secure Processor Architectures [chapter]

Siddhartha Chhabra, Yan Solihin, Reshma Lal, Matthew Hoekstra
2010 Lecture Notes in Computer Science  
We then provide a discussion on the issues in securing multiprocessor systems and survey one design each for Shared Memory Multiprocessors and Distributed Shared Memory Multiprocessors.  ...  Many systems may have security requirements such as protecting the integrity and confidentiality of data and code stored in the system, ensuring integrity of computations, or preventing the execution of  ...  survey one design each for Shared Memory Multiprocessors and Distributed Shared Memory Multiprocessors.  ... 
doi:10.1007/978-3-642-11389-5_6 fatcat:lwcttyi2uzc3hcgnsudh7mhbf4

Protection of heterogeneous architectures on FPGAs: An approach based on hardware firewalls

Pascal Cotret, Guy Gogniat, Martha Johanna Sepúlveda Flórez
2016 Microprocessors and microsystems  
These firewalls filter all data going through the system communication bus and an additional flexible cryptographic block aims to protect external memory from attacks.  ...  This work presents an approach to protect communications in multiprocessor architectures. This approach is based on hardware security enhancements acting as firewalls.  ...  protection with confidentiality/integrity of N data blocks is performed in 10 + (10 + 2) × N cycles (therefore, 22 cycles for a single data block).  ... 
doi:10.1016/j.micpro.2016.01.013 fatcat:wnqzdr46qvcudc4vcvkf354ray

Memory encryption

Michael Henson, Stephen Taylor
2014 ACM Computing Surveys  
Memory encryption has yet to be used at the core of operating system designs to provide confidentiality of code and data.  ...  Recently, memory encryption primitives have been integrated within commodity processors such as the Intel i7, AMD bulldozer, and multiple ARM variants.  ...  Whereas the efficiency of memory-to-cache confidentiality is the primary concern for monolithic processors, multiprocessor systems must also protect cache-tocache traffic.  ... 
doi:10.1145/2566673 fatcat:jmnwf76mm5calh5vjqh4ukchju

Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines [chapter]

Reouven Elbaz, David Champagne, Catherine Gebotys, Ruby B. Lee, Nachiketh Potlapally, Lionel Torres
2009 Lecture Notes in Computer Science  
While this paper focuses on memory authentication for uniprocessor platforms, we also discuss the security issues that arise when considering data authentication in symmetric multiprocessor (shared memory  ...  After a description of the active attacks that threaten memory integrity, this paper surveys existing cryptographic techniques -namely integrity trees -allowing for memory authentication.  ...  Active research efforts [26, 27, 28] are also being carried out in the field of data authentication in multiprocessor systems with Distributed Shared Memory (DSM).  ... 
doi:10.1007/978-3-642-01004-0_1 fatcat:jmwvo4qelzeo7p7ayai6xqjerq

TrustGeM: Dynamic trusted environment generation for chip-multiprocessors

Luis Angel D. Bathen, Nikil D. Dutt
2011 2011 IEEE International Symposium on Hardware-Oriented Security and Trust  
As applications with different degrees of assurance are deployed on these multiprocessor platforms, new challenges emerge in terms of protection against software based side channel attacks and exploits  ...  In this paper, we introduce TrustGeM: a dynamic trusted environment generation engine for chip-multiprocessors.  ...  INTRODUCTION As semiconductor manufacturers continue to push for Chip-Multiprocessor technology (e.g., IBM Cell [1] , Intel's Multicore [2] , Teraflops Research [3] , Single Cloud Computer [4] , and  ... 
doi:10.1109/hst.2011.5954994 dblp:conf/host/BathenD11 fatcat:sex2lg4bljeefcgjyvy5ppo77a

Platforms and Applications in Hardware Security: Trends and Challenges

Edward David Moreno
2013 International Journal of Security and Its Applications  
(ii) Flexible Level of Security: It is relatively easy to adapt new architectures and systems to new insights and optimizations.  ...  The security in hardware area and its integration amongst different security services in embedded systems still need methods, techniques, and most importantly efficient prototypes in performance and power  ...  Acknowledgements The authors would like to thank FAPITEC (Fundação de Amparo à Pesquisa e à Inovação Tecnológica do Estado de Sergipe), FAPEAM, CNPq and CAPES, for financial support.  ... 
doi:10.14257/ijsia.2013.7.5.27 fatcat:ftkdnt6t7fgmvpkgqyjsh5hn5e

Virtualizing on-chip distributed ScratchPad memories for low power and trusted application execution

Luis Angel D. Bathen, Dongyun Shin, Sung-Soo Lim, Nikil D. Dutt
2013 Design automation for embedded systems  
The SPMVisor exploits policy-driven allocation strategies based on application privilege levels and data level prioritization metrics (e.g., utilization) to efficiently manage the on-chip memory real-estate  ...  Emerging multicore platforms are increasingly deploying distributed scratchpad memories to achieve lower energy and area together with higher predictability; but this requires transparent and efficient  ...  Open Access This article is distributed under the terms of the Creative Commons Attribution License which permits any use, distribution, and reproduction in any medium, provided the original author(s)  ... 
doi:10.1007/s10617-012-9100-3 fatcat:svn2fcscpvh4rars7p4g4hbceq

Bus-based MPSoC Security through Communication Protection: A Latency-efficient Alternative

Pascal Cotret, Jeremie Crenne, Guy Gogniat, Jean-Philippe Diguet
2012 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines  
Most solutions are currently built at the software level; we believe hardware enhancements also play a major role in system protection.  ...  Designers can deploy different security policies (access right, data format, authentication, confidentiality) in order to protect the system in a flexible way.  ...  At the communication level, these systems can be protected either by software or hardware mechanisms.  ... 
doi:10.1109/fccm.2012.42 dblp:conf/fccm/CotretCGD12 fatcat:2tpb5srczjhazpnsgnjbqpabha

Parallel Computational Intelligence-Based Multi-Camera Surveillance System

Sergio Orts-Escolano, Jose Garcia-Rodriguez, Vicente Morell, Miguel Cazorla, Jorge Azorin, Juan Garcia-Chamizo
2014 Journal of Sensor and Actuator Networks  
It addresses multiple vision tasks at various levels, such as segmentation, representation or characterization, analysis and monitoring of the movement.  ...  Offering relevant information to higher level systems, monitoring and making decisions in real time, it must accomplish a set of requirements, such as: time constraints, high availability, robustness,  ...  Acknowledgments This work was partially funded by the Spanish Government DPI2013-40534-R grant and Valencian Government GV/2013/005 and University of Alicante UA GRE11-01 grants.  ... 
doi:10.3390/jsan3020095 fatcat:jwnriy3zf5fwtpxl7svmqywfhy

The Secure Machine: Efficient Secure Execution On Untrusted Platforms [article]

Ofir Shwartz, Yitzhak Birk
2018 arXiv   pre-print
We developed Distributed Memory Integrity Trees, a method for enhancing single node integrity trees for preserving the integrity of a distributed application running on an untrusted computing environment  ...  To enable secure data sharing in shared memory environments, we developed Secure Distributed Shared Memory (SDSM), an efficient (time and memory) algorithm for allowing thousands of compute nodes to share  ...  Finally, although SDSM protects the confidentiality and integrity of data blocks during their transfer between compute nodes, protecting the integrity of a distributed program (for blocks that are not  ... 
arXiv:1803.03951v1 fatcat:judqg442wvekdbevambchu3o6i

Multi-processor architectural support for protecting virtual machine privacy in untrusted cloud environment

Yuanfeng Wen, JongHyuk Lee, Ziyi Liu, Qingji Zheng, Weidong Shi, Shouhuai Xu, Taeweon Suh
2013 Proceedings of the ACM International Conference on Computing Frontiers - CF '13  
Our key idea is to exploit hardware mechanisms to enforce access control over the shared resources (e.g., memory spaces), while protecting VM memory integrity as well as inter-processor communications  ...  and data sharing.  ...  Representation examples are: 1) protecting data privacy by performing decryption in parallel to memory access [21] ; 2) protecting data privacy and integrity in distributed shared memory multi-processors  ... 
doi:10.1145/2482767.2482799 dblp:conf/cf/WenLLZSXS13 fatcat:xg6lndxekjh4xdfen6ebkamcka

ARTÌS: A Parallel and Distributed Simulation Middleware for Performance Evaluation [chapter]

Luciano Bononi, Michele Bracuto, Gabriele D'Angelo, Lorenzo Donatiello
2004 Lecture Notes in Computer Science  
The High level Architecture (HLA) has currently become a synonymous for the middleware implementation of distributed simulation services and a RunTime (RTI) simulation kernel, based on the IEEE 1516 Standard  ...  and high memory allocation needs.  ...  In ARTÌS, design optimizations have been applied to adapt adequate protocols for synchronization and communication in Local Area Network (LAN) or Shared Memory (SHM) multiprocessor architectures.  ... 
doi:10.1007/978-3-540-30182-0_63 fatcat:soviahqxkjhoti6ddvknxjb3ja
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