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Self-Aligned Double Patterning Friendly Configuration for Standard Cell Library Considering Placement
[article]
2014
arXiv
pre-print
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2013
Design for Manufacturability through Design-Process Integration VII
unpublished
doi:10.1117/12.2011660 fatcat:woam6ixl45hxzhk34yrxae2cxu
doi:10.1117/12.2011660 fatcat:woam6ixl45hxzhk34yrxae2cxu
We propose a SADP friendly standard cell configuration which provides pre-coloring results for standard cells. ...
Self-aligned double patterning (SADP) has become a promising technique to push pattern resolution limit to sub-22nm technology node. ...
We present the standard cell configuration and embed this information in the cell library. ...
arXiv:1402.2442v1
fatcat:mgqff7hqznbtpeb4rnonjxez2e
Design for manufacturability and reliability in extreme-scaling VLSI
2016
Science China Information Sciences
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Keywords design for manufacturability, design for reliability, VLSI CAD Citation Yu B, Xu X Q, Roy S, et al. Design for manufacturability and reliability in extreme-scaling VLSI. ...
five decades, the number of transistors on a chip has increased exponentially in accordance with the Moore's law, and the semiconductor industry has followed this law as long-term planning and targeting for ...
The authors would like to thank Meng LI and Wei YE at University of Texas for helpful comments.
Conflict of interest The authors declare that they have no conflict of interest. ...
doi:10.1007/s11432-016-5560-6
fatcat:lz5ebjqeprbanbkgxqxjeouip4
Toward Unidirectional Routing Closure in Advanced Technology Nodes
2017
IPSJ Transactions on System LSI Design Methodology
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Meanwhile, with the unidirectional layout, self-aligned double and quadruple patterning can be applied to achieve finer pitches beyond the resolutions limits of 193 nm lithography tools. ...
Notably, unidirectional routing limits the standard cell pin accessibility, which makes manual cell layout design and optimization more and more challenging under modern standard cell architecture. ...
To improve standard cell pin access, one option is to go through the design flow in Fig. 4 , which detects hard-to-route cells for iterative standard cell library optimization [33] . ...
doi:10.2197/ipsjtsldm.10.2
fatcat:my5uqy2kh5ho3lrrfakdy4yuta
Front Matter: Volume 8684
2013
Design for Manufacturability through Design-Process Integration VII
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Publication of record for individual papers is online in the SPIE Digital Library. ...
The publisher is not responsible for the validity of the information or for any outcomes resulting from reliance thereon. ...
(United States)
8684 06
Self-aligned double patterning friendly configuration for standard cell library considering
placement impact [8684-6]
J.-R. Gao, B. ...
doi:10.1117/12.2028890
fatcat:c4k4oxu5fbet7nwrnjamr6z2k4
Role of Design in Multiple Patterning: Technology Development, Design Enablement and Process Control
2013
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013
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Multiple-patterning optical lithography is inevitable for technology scaling beyond the 22nm technology node. ...
Multiple patterning imposes several counter-intuitive restrictions on layout and carries serious challenges for design methodology. ...
MP/DP can be implemented with different manufacturing processes with the most viable being the Litho-Etch-Litho-Etch (LELE) and Self-Aligned Double-Patterning (SADP), a.k.a. spacer double patterning. ...
doi:10.7873/date.2013.076
dblp:conf/date/GhaidaG13
fatcat:ck3tg3adsnh4jntnyr2zmcikhu
A methodology for the early exploration of design rules for multiple-patterning technologies
2012
Proceedings of the International Conference on Computer-Aided Design - ICCAD '12
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down to 90nm) would more than double the number of DP-compatible cells in the library. ...
technologies including tripe/multiple-patterning with multiple litho-etch steps, selfaligned double patterning (SADP), and directed self-assembly. ...
Although the focus of this paper is on DP, the methodology is more general and can be applied to explore rules of other layout-restrictive technologies, such as triple patterning, self-aligned double patterning ...
doi:10.1145/2429384.2429395
dblp:conf/iccad/GhaidaSKG12
fatcat:s3nu3gmuavevvjnwkzahu22kem
Standard Cell Layout Regularity and Pin Access Optimization Considering Middle-of-Line
2015
Proceedings of the 25th edition on Great Lakes Symposium on VLSI - GLSVLSI '15
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Given irregular cell layout from old technology nodes, our cell optimization tool can search unidirectional migrated result where the self-aligned double patterning (SADP) and MOL based design constraints ...
This problem is formulated as a general integer linear programming (ILP), which may suffer from long runtime for some large standard cell cases. ...
Due to the regularity, both Metal-1 and MOL layers can be manufactured through self-aligned double patterning (SADP) technique [9] , which has better overlap and line edge roughness control than multiple ...
doi:10.1145/2742060.2742084
dblp:conf/glvlsi/YeYPBL15
fatcat:sk4btcu5bve3fmjcunaq7fdjoi
Design for Manufacturing With Emerging Nanolithography
2013
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Index Terms-Design for manufacturing, double patterning, e-beam lithography (EBL), EUV lithography (EUVL), multiple patterning, nanolithography, physical design. ...
In this paper, we survey key design for manufacturing issues for extreme scaling with emerging nanolithography technologies, including double/multiple patterning lithography, extreme ultraviolet lithography ...
Puri, IBM, for their helpful discussions. ...
doi:10.1109/tcad.2013.2276751
fatcat:amxc565rjfg6bkliymbbbjczde
VLSI CAD for emerging nanolithography
2012
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test
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In this paper, we discuss emerging nanolithography technologies including double/multiple patterning, extreme ultraviolet lithography, electron-beam lithography, and their interactions with VLSI CAD. ...
There are two main types of technologies: litho-etch-litho-etch (LELE) and self-aligned double patterning (SADP). ...
As shown in Fig. 5 (b) and (c), a library of layout configurations, called characters (or templates) are prepared on a stencil first. ...
doi:10.1109/vlsi-dat.2012.6212644
dblp:conf/vlsi-dat/PanGY12
fatcat:zm5e7gstrvgazloi5htdhbr2im
Improving Reliability, Security, and Efficiency of Reconfigurable Hardware Systems
[article]
2018
arXiv
pre-print
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This technique was applied to the acceleration of SQL queries for large database applications as well as for image and signal processing applications. ...
In the area of reliability, countermeasures against radiation-induced faults and aging effects for long mission times were investigated and applied to SRAM-FPGA-based satellite systems. ...
The standard cell approach has an increased flexibility in the design flow. However, the resulting circuits have still a fixed structure. ...
arXiv:1809.11156v1
fatcat:6ttulp2tancyvds7fk2coxoptq
A Boolean Rule-Based Approach for Manufacturability-Aware Cell Routing
2014
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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It is technology-independent and parameterizable for different fabrics and design rules, including support for multiple-patterning lithography. ...
An approach for cell routing using gridded design rules is proposed. ...
The synthesis of a standard cell is typically decomposed into two main tasks: transistor placement and routing. ...
doi:10.1109/tcad.2013.2292514
fatcat:j7cfml6zx5fxpffd362ykr5svy
FIND: A new software tool and development platform for enhanced multicolor flow analysis
2011
BMC Bioinformatics
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The main goals of this effort were to provide a user-friendly tool for automated gating (classification) of multi-color data as well as a platform for development and dissemination of new analysis tools ...
As immunostained cells pass individually through the flow chamber of the instrument, laser pulses cause fluorescence emissions that are recorded digitally for later analysis as multidimensional vectors ...
Patel for their invaluable input and assistance. ...
doi:10.1186/1471-2105-12-145
pmid:21569257
pmcid:PMC3119067
fatcat:k5yluwtrl5c4rgsmysmp4ooneq
Near-Field Electrospinning and Melt Electrowriting of Biomedical Polymers—Progress and Limitations
2021
Polymers
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As a result, this precise fiber control results in another dimension of scaffold tailorability for biomedical applications. ...
In this review, biomedically relevant polymers that to date have manufactured fibers by NFES/MEW are explored and the present limitations in direct fiber writing of standardization in published setup details ...
This library allows for the generation of G-code at a greater level of abstraction in the more user-friendly python programming language. ...
doi:10.3390/polym13071097
pmid:33808288
fatcat:le2pzrixzrb5lirxkzx5uvbik4
Three Ages of FPGAs: A Retrospective on the First Thirty Years of FPGA Technology
2015
Proceedings of the IEEE
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Capacity is logic cell count. Speed is same-function performance in programmable fabric. Price is per logic cell. Power is per logic cell. Price and power are scaled up by 10 000Â. ...
Instead, configuration memory cells were distributed around the array to control functionality and wiring. ...
Half of the configuration memory cells in a four-input LUT are wasted when a three-input function is instantiated in it. ...
doi:10.1109/jproc.2015.2392104
fatcat:s4e6yrfidfcktguslmjrg3hhom
Machines and Algorithms
[article]
2017
arXiv
pre-print
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precision (DP) units aligns better with GP100's new datapath configuration, allowing the GPU to process DP workloads more efficiently. ...
This has been made accessible for QCD calculations by both the QUDA library [14] and the QDP-JIT library [9] . ...
arXiv:1702.00208v1
fatcat:er6sxgrduvf5rjirxjknwb43ym
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