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Self-Adaptive Heterogeneous Cluster with Wireless Network

Xinyu Niu, Kuen Hung Tsoi, Wayne Luk
2012 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum  
In this work, we build a self-adaptive framework for heterogeneous clusters, coupled with a customised wireless network.  ...  Results show that, for monitoring operations upon heterogeneous clusters, the customised wireless network provides stable and scalable performance for negligible overhead.  ...  Under the self-adaptive framework, computational capacity of processing Static design running at full speed Self-adaptive design aiming at maximum performance Self-adaptive design aiming at maximum power  ... 
doi:10.1109/ipdpsw.2012.37 dblp:conf/ipps/NiuTL12 fatcat:fvzkdr2lsrgvzn5mzsdfhcsth4

Reconfigurable Self-Organizing Neural Network Design and it's FPGA Implementation

Basma M. K. Younis, Basil Sh. Mahmood, Fakhraldeen H. Ali
2009 Al-Rafidain Engineering Journal  
The use of Kohonen self-organizing feature maps in real time applications requires high computational performance, especially for embedded systems and hence neural network chips are essential.  ...  A digital architecture of Kohonen neural network with learning capability and on-chip adaptation and storage is proposed with the implementation of Kohonen Self-Organizing Map (SOM) neural networks on  ...  Kohonen Network Self Organizing Algorithm Self-Organizing Maps (SOMs) as proposed by Kohonen [5] use an unsupervised learning algorithm to form a nonlinear mapping of high-dimensional input space onto  ... 
doi:10.33899/rengj.2009.42925 fatcat:rbfhphkbkbbcjouqce6gr3463q

Author Index

2008 2008 IEEE International Symposium on Parallel and Distributed Processing  
He, Xubin Performance Adaptive UDP for High-Speed Bulk Data Transfer Over Dedicated Links Heien, Eric M.  ...  a Long-Life Pervasive System Trehan, Amitabh Picking up the Pieces: Self-Healing in Reconfigurable Networks Trendelenburg, Stanis A Rapid Prototyping Environment for High-speed Reconfigurable Analog Signal  ... 
doi:10.1109/ipdps.2008.4536576 fatcat:7unikf5ywjhjtdd6xtrmcom3gq

Author index

2007 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP)  
the Gap between FPGAs and Multi-Processor Architectures: A Video Processing Perspective Graphic processors to speed up simula- tions for the design of high performance solar receptors Parallelizing  ...  High-Level Synthesis Graphic processors to speed up simulations for the design of high performance solar receptors Design and Implementation of an Effi cient and Power-Aware Architecture for Skin Segmentation  ... 
doi:10.1109/asap.2007.4459300 fatcat:lbxlom2lkrf2jf3q5c56uwiuea

Rekindling Parallelism

Frederic Gruau, Fabien Michel
2011 2011 Fifth IEEE Conference on Self-Adaptive and Self-Organizing Systems Workshops  
We are working on such a generic model called self developing self mapping network.  ...  to parallel run-time performance for more classical parallel algorithms.  ...  Programming a fixed circuit to compute an algorithm needs a very specific mindset and is mainly adapted for signal processing.  ... 
doi:10.1109/sasow.2011.7 dblp:conf/saso/GruauM11 fatcat:njluxdp4p5eodohxclmbw2nkhu

Software Systems for Scalable Computers

David R. O'Hallaron, Boleslaw K. Szymanski
1999 Scientific Programming  
The current parallel architectures are fast and economically sound.  ...  Hence, compilers and run-time systems must be responsible for tuning the portable software for a particular architecture, and we find that research on automatic optimization of data locality both at compile  ...  In the paper entitled "Menhir: An environment for high performance Matlab", Stéphane Chauveau and François Bodin describe a compiler system for parallelizing programs written in Matlab, a popular high-level  ... 
doi:10.1155/1999/582031 fatcat:7d73i7bwbnd7daqjlq2ohwcdgq

Editorial: enabling technologies for programming extreme scale systems

Ching-Hsien Hsu
2012 Journal of Supercomputing  
, languages, algorithms and applications for designing next generation scalable and high-performance parallel systems.  ...  Multi-core architecture presents a new trend, and core-based parallel processing algorithms will continue to become more important.  ...  definition and proposed a self-adaptive K value selection scheme for optimizing load balancing in large scale network system.  ... 
doi:10.1007/s11227-012-0745-2 fatcat:w74ggqhcibc27llbaq4nqe3oiq

ULSI architectures for artificial neural networks

U. Ruckert
2002 IEEE Micro  
Because of their highly regular, modular structure, information processing parallelism, inherent fault tolerance, learning ability, and environmental adaptability, artificial neural networks (ANNs) offer  ...  Two approaches exist for supporting ANNs in parallel computing architectures: generalpurpose neurocomputers for emulating a wide range of neural network models, and specialpurpose ULSI systems dedicated  ...  Acknowledgment This work was partly supported by the Deutsche Forschungsgemeinschaft (German Research Council) DFG GR 948/14-3, DFG RU 477/2-3 and the Graduate Centre Parallele Rechnernetzwerke in der  ... 
doi:10.1109/mm.2002.1013300 fatcat:m6djx22p4fhvleo6qn56dlstci

Self-adaptive Gossip Policies for Distributed Population-based Algorithms [article]

J.L.J. Laredo, E.A. Eiben, M. Schoenauer, P.A. Castillo, A.M. Mora, F. Fernandez, J.J. Merelo
2007 arXiv   pre-print
The model avoids obsolete nodes in the population by defining a self-adaptive refresh rate which depends on the latency and bandwidth of the network.  ...  Gossipping has demonstrate to be an efficient mechanism for spreading information among P2P networks.  ...  Self-Adaptive Gossip Mechanism Algorithms 1,2 and 3 show the pseudo-code of the main tasks in the communication process.  ... 
arXiv:cs/0703117v1 fatcat:mk6uakstmfhtfbhtzkayjduw7q

ADAPTIVE: A dynamically assembled protocol transformation, integration and evaluation environment

Douglas C. Schmidt, Donald F. Box, Tatsuya Suda
1993 Concurrency Practice and Experience  
efficient parallel process architectures.  ...  applications running on high-performance networks.  ...  on high-performance networks.  ... 
doi:10.1002/cpe.4330050405 fatcat:qdhtmvr7yndthaqw5keiefuikq

Distributing Deep Learning Hyperparameter Tuning for 3D Medical Image Segmentation [article]

Josep Lluis Berral, Oriol Aranda, Juan Luis Dominguez, Jordi Torres
2021 arXiv   pre-print
We evaluate the experiment speed-up, showing the potential for scaling out on GPUs and nodes.  ...  However, experiment parallelism is also an option, where different training processes are parallelized across resources.  ...  Architecture Details 1) Adapting the Pipeline: Either using Ray.Tune for distributing hyper-parameter search or not using it, the used Neural Network engine is TensorFlow (TF).  ... 
arXiv:2110.15884v1 fatcat:ozfpb7w2ejcajawaq5ysmowvta

SCALPsim. a tool for modeling asynchronous Self-Organizing 3-D NoC architectures

Diego Barrientos, Claudio Sousa, Andres Upegui, Bernard Girau
2020 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)  
Hardware SCALP is a prototyping platform for reconfigurable 3-D NoCs and self-adaptive architectures. Nodes are arranged in a 3-D grid with dedicated links between them.  ...  Self-Organising features The decentralised architecture of SCALP results from a particular interest for self-organising approaches.  ... 
doi:10.1109/icecs49266.2020.9294833 fatcat:ostigmby3ndndfgveajynru2ku

The M2DC Project: Modular Microserver DataCentre

Mariano Cecowski, Giovanni Agosta, Ariel Oleksiak, Michal Kierzynka, Micha vor dem Berge, Wolfgang Christmann, Stefan Krupop, Mario Porrmann, Jens Hagemeyer, Rene Griessl, Meysam Peykanu, Lennart Tigges (+13 others)
2016 2016 Euromicro Conference on Digital System Design (DSD)  
This paper provides an overview of the different topics FPGAs have been used for in the last 15 years of research and why they have been chosen over other processing units like e.g. CPUs.  ...  Nevertheless, every application field introduces special requirements to the used computational architecture.  ...  Again, the high level of parallelism offered by FPGAs enable applications to gain a significant speed-up, especially in comparison to even modern multi-core architecture CPUs.  ... 
doi:10.1109/dsd.2016.76 dblp:conf/dsd/CecowskiAOKBCKP16 fatcat:bu4nbkqaejebjafrotibui6mkq

Compromising Algorithmicity and Plasticity in Autonomous Agent Control Architectures: The Autonomous Cell

Elpida S. Tzafestas
1999 Journal of Intelligent Systems  
On the other hand, the redundancy inherent in most connectionist architectures allows for continuous self-organization that compensates for limited-scale neuron failures.  ...  While algorithmic autonomous agent control architectures demonstrate high efficiency, they suffer from network structure rigidity that shows in the liability to crucial errors.  ...  catalytic messages A competition mechanism (with the aid of reaction speeds) Self-regulation of the dynamics of interaction with the world (reaction speeds) Developmental social adaptation : Tit-for-tat  ... 
doi:10.1515/jisys.1999.9.2.135 fatcat:fl42n7ctxfhrjcadilbwryhlne

Multi-Dimensional Self-Organizing Maps on Massively Parallel Hardware [chapter]

Udo Seiffert, Bernd Michaelis
2001 Advances in Self-Organising Maps  
Although available (sequential) computer hardware is very powerful nowadays, the implementation of artificial neural networks on massively parallel hardware is still undoubtedly of high interest, not only  ...  This paper presents an implementation of multi-dimensional Self-Organizing Maps on a scalable SIMD structure of a CNAPS computer with up to 512 parallel processors.  ...  Self-organizing maps [1] have a relatively high level of parallel data flow, since all neurons belong to the same layer.  ... 
doi:10.1007/978-1-4471-0715-6_23 dblp:conf/wsom/SeiffertM01 fatcat:kah75ussn5aa7nocjafxbyoqia
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