9,275 Hits in 10.1 sec

Security, Performance and Energy Trade-Offs of Hardware-Assisted Memory Protection Mechanisms

Christian Gottel, Rafael Pires, Isabelly Rocha, Sebastien Vaucher, Pascal Felber, Marcelo Pasin, Valerio Schiavoni
2018 2018 IEEE 37th Symposium on Reliable Distributed Systems (SRDS)  
The performance trade-offs of two novel hardware-assisted memory protection mechanisms, namely AMD SEV and Intel SGX - currently available on the market to tackle this problem, are described in this practical  ...  Specifically, we implement and evaluate a publish/subscribe use-case and evaluate the impact of the memory protection mechanisms and the resulting performance.  ...  ACKNOWLEDGMENTS The authors would like to thank Christof Fetzer for the discussions on hardware-assisted memory protection mechanisms.  ... 
doi:10.1109/srds.2018.00024 dblp:conf/srds/GottelPRVFPS18 fatcat:6e2hn2sqlrdu5nw7amwbduduka

Guest Editors' Introduction to the Special Issue on Hardware Security

Amro Awad, Rujia Wang
2020 IEEE transactions on computers  
The paper implements an off-chip Active Security Processor (ASP) and evaluates its security and performance in real hardware.  ...  This paper advocates for a new architecture that leverages active security processors and discusses the design trade-offs and optimizations required to realize such designs.  ...  The paper implements an off-chip Active Security Processor (ASP) and evaluates its security and performance in real hardware.  ... 
doi:10.1109/tc.2020.3021223 fatcat:nz37oxlhovahlbggly7iwpl22i

Hardware-Software Co-Design: Not Just a Cliché

Adrian Sampson, James Bornholt, Luis Ceze, Marc Herbstritt
2015 Summit on Advances in Programming Languages  
The age of the air-tight hardware abstraction is over.  ...  We reflect on the challenges and successes of approximation research and, with these lessons in mind, distill opportunities for future hardware-software co-design efforts.  ...  These architectures would avoid the energy and time overhead of dynamic protection mechanisms and simplify future scaling efforts.  ... 
doi:10.4230/lipics.snapl.2015.262 dblp:conf/snapl/SampsonBC15 fatcat:w53z5tuoujcx5eqfyn4c5s5eau

Hash Attacks Prevention for Instruction Security in Embedded Monitoring System

Xiang WANG, Zhan-Hong HE, Yang XU, Shu-Song PANG, Xiao-Cui WANG, Cheng ZHOU, Pei DU
2016 DEStech Transactions on Engineering and Technology Research  
model, and to achieve protection of instruction information.  ...  In this paper we designed a protection mechanism by adding the interference information to each of instructions, making the attacker's burden greatly increase, so as to enhance the security of monitoring  ...  It also increases the time required to perform lookups, and this is the time-memory trade-off of the rainbow table.  ... 
doi:10.12783/dtetr/ssme-ist2016/4025 fatcat:hosfchnfyrattcllwem6gtgsmm

CRC: Fully General Model of Confidential Remote Computing [article]

Kubilay Ahmet Küçük, Andrew Martin
2021 arXiv   pre-print
The CRC model illustrates the trade-offs between decentralisation, task size and transparency overhead.  ...  correct use of proofs and evidence reports generated by the attestation mechanisms.  ...  Acknowledgements Some of this work is supported by the InnovateUK ManySecured project. We thank Sean Smith, O Yaman, A Acar, M Geden, I Heinemann, for their helpful discussions and reviews.  ... 
arXiv:2104.03868v1 fatcat:j72spncwrfhedjtgmtnqdtszl4

On security issues in embedded systems: challenges and solutions

Lyes Khelladi, Yacine Challal, Abdelmadjid Bouabdallah, Nadjib Badache
2008 International Journal of Information and Computer Security  
These features make the integration of conventional security mechanisms impractical, and require a better understanding of the whole security problem.  ...  Ensuring security in embedded systems translates into several design challenges, imposed by the unique features of these systems.  ...  devices, so that an acceptable trade-off can be achieved between the security level and corresponding energy requirements.  ... 
doi:10.1504/ijics.2008.018515 fatcat:up7vrjklrneahhxxzibcspiae4

Hardware-Assisted System for Program Execution Security of SOC

Xiang Wang, Shu-Song Pang, Wei-Ke Wang, Zong-Min Zhao, Cheng Zhou, Zhan-Hong He, Xiao-Cui Wang, Yang Xu, T. Gong, T. Yang, J. Xu
2016 ITM Web of Conferences  
This paper presents a new hardware assisted security mechanism to protect the program's code and data, monitoring its normal execution.  ...  The experimental analysis shows that the proposed mechanism can defence a wide range of common software and physical attacks with low performance penalties and minimal overheads.  ...  Arora [7] also presented a hardware assisted mechanism to check control flow and integrity of code.  ... 
doi:10.1051/itmconf/20160703006 fatcat:f4z34rq445durie4s7azkl6ssy

Effective Scaling of Blockchain Beyond Consensus Innovations and Moore's Law [article]

Yinqiu Liu, Kai Qian, Jianli Chen, Kun Wang, Lei He
2020 arXiv   pre-print
This makes blockchain suffer from insufficient performance and poor scalability.  ...  hardware scaling is about to end.  ...  Previous work presented that wimpy networks with balanced performance-to-power ratios can achieve reasonable performance while saving much energy, which is a meaningful trade-off for applications [34]  ... 
arXiv:2001.01865v2 fatcat:yhjx2yxtdnaapgj7xleuyqjeri

Virtualization-Based Security Techniques on Mobile Cloud Computing: Research Gaps and Challenges

Boubakeur Annane, Osman Ghazali
2019 International Journal of Interactive Mobile Technologies  
A new idea emerged by including the cloud computing into mobile devices to augment the capacities of the mobile devices resources such as smartphones, tablet, and other personal digital assistant (PDA)  ...  This paper investigates the main challenges regarding the security and privacy issues in mobile cloud exactly focusing on the virtualization issue layer and give clear strengths and weaknesses of recent  ...  The authors have proposed a new flexible and efficient mechanism of memory protection by allowing restricted roles for the hypervisors and decoupling the memory isolation from memory allocation that is  ... 
doi:10.3991/ijim.v13i04.10515 fatcat:hhf7lpny2feoblfesbxsfpop2i


Huili Chen, Cheng Fu, Bita Darvish Rouhani, Jishen Zhao, Farinaz Koushanfar
2019 Proceedings of the 46th International Symposium on Computer Architecture - ISCA '19  
We take an Algorithm/Software/Hardware co-design approach to optimize DeepAttest's overhead in terms of latency and energy consumption.  ...  The unregulated usage of intelligent platforms and the lack of hardware-bounded IP protection impair the commercial advantage of the device provider and prohibit reliable technology transfer.  ...  TEEs on other platforms utilize similar mechanisms to isolate the execution of the protected program by securing memory access to the code and data of the confidential program.  ... 
doi:10.1145/3307650.3322251 dblp:conf/isca/ChenFRZK19 fatcat:o2oknyg36zht3lxoelu7dasv2e

A Survey on RISC-V Security: Hardware and Architecture [article]

Tao Lu
2021 arXiv   pre-print
This paper summarizes the representative security mechanisms of RISC-V hardware and architecture. Based on our survey, we predict the future research and development directions of RISC-V security.  ...  Data security and user privacy protection are common challenges faced by all IoT devices.  ...  A major challenge of applying encryption in restricted environments is the trade-off between security and performance. Fabio et al.  ... 
arXiv:2107.04175v1 fatcat:hr6avyprj5dvpav2pvnmfmvg2a

MEM-DnP—A Novel Energy Efficient Approach for Memory Integrity Detection and Protection in Embedded Systems

Satyajeet Nimgaonkar, Mahadevan Gomathisankaran, Saraju P. Mohanty
2013 Circuits, systems, and signal processing  
Although a lot of hardware and software techniques have been proposed to provide high levels of security, they are hampered by the trade-offs created by the design constraints in embedded systems.  ...  This paper presents a novel energy efficient approach for MEMory integrity Detection and Protection (MEM-DnP).  ...  In this version, we have discussed in detail the concept of Memory Integrity Verification (MIV) in Section 2, expanded the architecture to include memory operations and the hash address computation algorithm  ... 
doi:10.1007/s00034-013-9621-4 fatcat:t2f7dtuqnjhlbkehzwslnq5ck4

Hardware-assisted Machine Learning in Resource-constrained IoT Environments for Security: Review and Future Prospective

Georgios Kornaros
2022 IEEE Access  
To protect an IoT infrastructure, various solutions look into hardware-based methods for ML-based IoT authentication, access control, secure offloading, and malware detection schemes.  ...  computing and user privacy, as well as protecting against attacks such as spoofing, denial of service (DoS), jamming, and eavesdropping.  ...  powered methods assisted by hardware techniques and accelerators for the security of IoT devices and systems.  ... 
doi:10.1109/access.2022.3179047 fatcat:damwrncpzzbxzamtghwlmrg6v4

Hardware-Enhanced Protection for the Runtime Data Security in Embedded Systems

Weike Wang, Xiaobing Zhang, Qiang Hao, Zhun Zhang, Bin Xu, Haifeng Dong, Tongsheng Xia, Xiang Wang
2019 Electronics  
For the integrity protection, the signature is calculated by the hardware implemented Lhash engine before the data sending off the chip, and the signature of the data block is recalculated and compared  ...  The hardware cryptographic engines are optimized to work simultaneously with the memory access operation, which reduces the hardware overhead and the performance overhead.  ...  W.W. and X.Z. conceived and designed the proposed hardware architecture and the experiments; Q.H., Z.Z. and B.X. joined in the data analysis and discussion phases; H.D. and T.X. helped on the structure  ... 
doi:10.3390/electronics8010052 fatcat:cfhdvborzfgdbk5kewdurde6vq

A Survey of Mobile Device Virtualization

Junaid Shuja, Abdullah Gani, Kashif Bilal, Atta Ur Rehman Khan, Sajjad A. Madani, Samee U. Khan, Albert Y. Zomaya
2016 ACM Computing Surveys  
Recent growth in the processing and memory resources of mobile devices has fueled research within the field of mobile virtualization.  ...  Challenges and issues faced in virtualization of CPU, memory, I/O, interrupt, and network interfaces are highlighted.  ...  Moreover, we debated performance trade-offs between ARM and other hardware ISA based mobile virtualization solutions.  ... 
doi:10.1145/2897164 fatcat:htenyu2vlzfg3dv2czs2mdvi7q
« Previous Showing results 1 — 15 out of 9,275 results