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Second-Order Logic over Strings: Regular and Non-regular Fragments [chapter]

Thomas Eiter, Georg Gottlob, Thomas Schwentick
2002 Lecture Notes in Computer Science  
We also give a brief survey of recent results on the complexity of evaluating existential second-order logic over graphs, and a list of interesting open problems.  ...  By a well-known result due to Büchi and Trakhtenbrot, all monadic second-order sentences over words describe regular languages.  ...  Conclusion and Open Problems The aim of this paper was twofold, namely, to give a status report on the ambitious research programme of determining the complexity of prefix classes over finite structures  ... 
doi:10.1007/3-540-46011-x_4 fatcat:wnrmwktrprhhnm4cuxl4zwwc2i

Kronecker in Contemporary Mathematics. General Arithmetic as a Foundational Programme

Yvon Gauthier
2013 Reports on Mathematical Logic  
In his report on Hilbert's research on the foundations of arithmetic, Bernays says that Hilbert, in spite of his durable opposition to Kronecker whom he accused of dogmatism, has wanted a reconciliation  ...  One must admit that after the demise of the logicist programme (Frege and Russell) and despite the efforts of philosophers and logicians to recover Frege's logicist foundations of arithmetic with the second-order  ... 
dblp:journals/rml/Gauthier13 fatcat:vt6whunfanf55k4mb44x6g6r5u

Page 613 of Mathematical Reviews Vol. , Issue 92b [page]

1992 Mathematical Reviews  
Mahr and Siefkes on a formalism of recursive definitions over arbitrary data structures which supports several types of complexity analysis, and two papers with S.  ...  These structures provide a basis for Boolean algebras similarly as partial orders do for lattices.  ... 

Dsolve: Safety Verification via Liquid Types [chapter]

Ming Kawaguchi, Patrick M. Rondon, Ranjit Jhala
2010 Lecture Notes in Computer Science  
We present Dsolve, a verification tool for OCaml. Dsolve automates verification by inferring "Liquid" refinement types that are expressive enough to verify a variety of complex safety properties.  ...  Third, the constraints are solved using predicate abstraction over a finite set of predicates generated from user-provided logical qualifiers.  ...  The higher-order function foldn folds over the integers from m to n.  ... 
doi:10.1007/978-3-642-14295-6_12 fatcat:zaxvisqnybbidl3hcnajr56fcy

Constraint Modelling: A Challenge for First Order Automated Reasoning

Peter Baumgartner, John Slaney
2009 International Workshops on First Order Theorem Proving  
The G12 project involves well over 20 researchers, including  ...  Cadoli et al [BCM04, MC05, CM04] noted the potential of first order automated reasoning for the purpose of analysing constraint models, and reported some encouraging initial experimental results.  ...  Techniques used to solve CSPs range from the purely logical, such as SAT solving, through finite domain (FD) reasoning which similarly consists of a backtracking search over assignments, using a range  ... 
dblp:conf/ftp/BaumgartnerS09 fatcat:tayozrojdzfmbkbj73jc2dt66q

Understanding disruptive monitoring capabilities of programmable networks

Paul Chaignon, Kahina Lazri, Jerome Francois, Olivier Festor
2017 2017 IEEE Conference on Network Softwarization (NetSoft)  
Thus, recent research efforts centered on the addition of stateful properties to switches. In this paper, we discuss the impact of emerging programmable dataplane abstractions on network monitoring.  ...  Furthermore, we analyse the impact of stateful dataplane designs on the control plane visibility of the network.  ...  ACKNOWLEDGMENTS We would like to thank Sylvie Laniepce for her helpful comments on drafts of this paper.  ... 
doi:10.1109/netsoft.2017.8004248 dblp:conf/netsoft/ChaignonLFF17 fatcat:kyznfjdjv5edxgpp273wnp6uxy

Modeling Message Sequences for Intrusion Detection in Industrial Control Systems [chapter]

Marco Caselli, Emmanuele Zambon, Jonathan Petit, Frank Kargl
2015 IFIP Advances in Information and Communication Technology  
ICS-CERT have described exploits on industrial devices, such as programmable logic controllers and SCADA servers, that are triggered by carefully-crafted messages (see, e.g., [9] ).  ...  Meanwhile, numerous reports from the U.S.  ...  This research was also supported by a CTVR Grant (SFI 10/CE/I 1853) from Science Foundation Ireland.  ... 
doi:10.1007/978-3-319-26567-4_4 fatcat:txl3dtrpl5hclbwct5yv4d66xu

SMT Solving for Functional Programming over Infinite Structures

Bartek Klin, Michał Szynwelski
2016 Electronic Proceedings in Theoretical Computer Science  
We develop a simple functional programming language aimed at manipulating infinite, but first-order definable structures, such as the countably infinite clique graph or the set of all intervals with rational  ...  The language is implemented as a Haskell module.  ...  We are grateful to Eryk Kopczyński and Szymon Toruńczyk, who came up with the idea of using formulas to represent orbit-finite sets with atoms, and whose work on the LOIS library for C++ [10] has been  ... 
doi:10.4204/eptcs.207.3 fatcat:adqa23j4qbhnbbvhdfk4noskrm

Programmable Switched Capacitor Finite Impulse Response Filter with Circular Memory Implemented in CMOS 0.18 μm Technology

Rafał Długosz, Krzysztof Iniewski
2008 Journal of Signal Processing Systems  
This paper presents a programmable multi-mode finite impulse response (FIR) filter implemented as switched capacitor (SC) technique in CMOS 0.18 μm technology.  ...  One of the key components that allows for this multi-mode operation is the proposed programmable and ultra low power multiphase clock circuit.  ...  In this case Illustrative clock diagram for the filter of second order N=2 for a the rotator structure and b the circular memory structure [29] .  ... 
doi:10.1007/s11265-008-0233-3 fatcat:qlpsezngu5aa7fnysvs6tiguoi

Constraint Modelling: A Challenge for First Order Automated Reasoning (Invited Talk)

John K. Slaney
2008 Conference on Automated Deduction  
The process of modelling a problem in a form suitable for solution by constraint satisfaction or operations research techniques, as opposed to the process of solving it once formulated, requires a significant  ...  Properties of the model independent of the data may thus be established by first order reasoning.  ...  The G12 project involves well over 20 researchers, including Peter Stuckey, Kim Marriott, Mark Wallace, Toby Walsh, Michael Maher, Andrew Verden and Abdul Sattar.  ... 
dblp:conf/cade/Slaney08 fatcat:an6uqbvbfvhpfmazobkpyhpevu

VLSI digital signal processing: some arithmetic issues

Graham A. Jullien, Franklin T. Luk
1996 Advanced Signal Processing Algorithms, Architectures, and Implementations VI  
Many of the illustrative examples are taken from work conducted in the VLSI Research Group, University of Windsor over the past few years, including on-going work.  ...  We start with a Silicon Technology Roadmap view of the next decade, in order to grasp some of the issues facing the next generation of VLSI designers, particularly associated with high performance DSP  ...  Mapping 2 in Finite Ring Arithmetic One of the advantages of binary arithmetic is the ability for the associated logic to be easily factored into small logic arrays.  ... 
doi:10.1117/12.255423 fatcat:ifzdtlm75vairplds4j32k3w7y

Component Specification Using Event Classes [chapter]

Mark Bickford
2009 Lecture Notes in Computer Science  
Working in a higher-order, abstract logic of events, we define event classes, a generalization of interfaces, and propagation rules that specify information flow between event classes.  ...  Thus a component specified in E # is a higher-order object: given programs for its input classes, it produces a distributed program for propagating information and programs for its output classes.  ...  Acknowledgments We would like to thank: David Guaspari for editing and reorganizing several drafts of this report; Bob Constable for enthusiastic technical and financial support for this work and collaboration  ... 
doi:10.1007/978-3-642-02414-6_9 fatcat:n4jgvl3pifb53izjkwjfysoqiu

Digital Security System Using FPGA

Akash Shukla
2017 International Journal of Recent Advancement in Engineering & Research  
The first part is concern on the hardware development. The second part is based on software programming to operate the hardware structure.  ...  This project is focusing on developing a house security system with an active infrared motion detector, pressure sensor, magnetic sensor and light sensor which are controlled using FPGA programmed by VHDL  ...  Overview: FPGA (Field Programmable Gate Array) is a chip containing a matrix of logic cells with programmable interconnects, which can be configured by a user.  ... 
doi:10.24128/ijraer.2017.ij01op fatcat:alryo2b46zhptfi3pze6qf6a3u

Field-programmable smart-pixel arrays: design, VLSI implementation, and applications

Sherif S. Sherif, Stefan K. Griebel, Albert Au, Dennis Hui, Ted H. Szymanski, H. Scott Hinton
1999 Applied Optics  
A field-programmable smart-pixel array ͑FP-SPA͒ is a smart-pixel array capable of having its electronic functionality dynamically programmed in the field.  ...  In the second, we configure the device as an optoelectronic transceiver for a dynamically reconfigurable free-space intelligent optical backplane called the hyperplane.  ...  Field-Programmable Smart-Pixel Array Internal Structure Each field-programmable smart pixel is actually a finite-state machine with electronic I͞O, optical I͞O, and internal state information stored in  ... 
doi:10.1364/ao.38.000838 pmid:18305683 fatcat:czxpxhtbvbhjnpg7z6pdsigqhy

Program Sketching via CTL* Model Checking [chapter]

Andreas Morgenstern, Klaus Schneider
2011 Lecture Notes in Computer Science  
Sketching is an approach to automated software synthesis where the programmer develops a partial implementation called a sketch and a separate specification of the desired functionality.  ...  Previously, sketching has been applied to finite programs with a desired functional input/output behavior and given invariants.  ...  In a recent 'Google research blog', it has been reported [14] that almost all binary search algorithms are broken.  ... 
doi:10.1007/978-3-642-22306-8_9 fatcat:odppeb3vefhxdedai3fepxzjkm
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