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Co-processing SPMD computation on CPUs and GPUs cluster

Hui Li, Geoffrey Fox, Gregor von Laszewski, Arun Chauhan
2013 2013 IEEE International Conference on Cluster Computing (CLUSTER)  
Furthermore, we are proposing an analytic model to automatically schedule SPMD tasks on heterogeneous clusters.  ...  Challenges occur in regard to programmability and performance when running SPMD tasks on heterogeneous devices.  ...  We also thank Jerome Mitchell and Adnan Ozsoy for the help about running experiments on Delta nodes. We also thank Judy Qiu for the suggestions on MapReduce design and implementation.  ... 
doi:10.1109/cluster.2013.6702632 dblp:conf/cluster/LiFLC13 fatcat:3pe3e6xjbjg57apkzet3tdrhhq

An Optimized and Efficient Multi Parametric Scheduling Approach for Multi-Core Systems

Sonia Mittal, Priyanka Sharma
2013 Journal of clean energy technologies  
For Efficient scheduling of task or thread on multi core system the operating system scheduler must be aware about the underlying heterogeneity present in the system, also it must be aware about the characteristics  ...  Because as per the characteristic of the executing application the scheduler can take decision to schedule the task on available core so that optimal performance and good throughput can be achieved.  ...  Pseudo code for scheduling compute intensive tasks. and Fig. 3: Schedular_Compute_Intensive_Task( ) { If Task is pure Compute intensive and cannot be executed parallel then schedule the task on  ... 
doi:10.7763/ijcte.2013.v5.716 fatcat:kcrxdhlpafaylofc25zol7d43y

Performance Analysis of Heterogeneous Data Centers in Cloud Computing Using a Complex Queuing Model

Wei-Hua Bai, Jian-Qing Xi, Jia-Xian Zhu, Shao-Wei Huang
2015 Mathematical Problems in Engineering  
We further conduct numerical experiments to demonstrate that the traffic intensity (or utilization) of each execution server, as well as the configuration of server clusters, in a heterogeneous data center  ...  In this paper, we investigate the heterogeneity of modern data centers and the service process used in these heterogeneous data centers.  ...  We can see that the traffic intensity (utilization) of each execution server has a significant impact on the performance of the heterogeneous data center.  ... 
doi:10.1155/2015/980945 fatcat:fnctsvtx7ves5hdx7kl5rj75jy

LU, QR, and Cholesky factorizations: Programming model, performance analysis and optimization techniques for the Intel Knights Landing Xeon Phi

Azzam Haidar, Stanimire Tomov, Konstantin Arturov, Murat Guney, Shane Story, Jack Dongarra
2016 2016 IEEE High Performance Extreme Computing Conference (HPEC)  
This is done through multiple techniques ranging from multi-level data partitioning to adaptive task grain sizes, and dynamic task scheduling.  ...  In addition, our task abstractions enable unified algorithmic development across all the heterogeneous resources.  ...  If the runtime detects that the data required for a task is not available at the location that the task is scheduled, it manages the data transfer.  ... 
doi:10.1109/hpec.2016.7761591 dblp:conf/hpec/HaidarTAGSD16 fatcat:26femjzy75c33idwcxnrfdet34

A Task-level Pipelined Many-SIMD Augmented Reality Processor with Congestion-aware Network-on-Chip Scheduler

Gyeonghoon Kim, Donghyun Kim, Seongwook Park, Youchang Kim, Kyuho Lee, Injoon Hong, Kyeongryeol Bong, Hoi-Jun Yoo
2015 IEEE Micro  
In addition, the multicore employs a congestion-aware network-on-chip scheduler for 2D-mesh network-on-chip to support massive internal data transaction caused by task-level pipeline.  ...  A 36 Heterogeneous multicore processor is proposed to accelerate recognition-based markerless augmented reality.  ...  Its task-level pipelined heterogeneous many-SIMD clusters reduce latency of the computationally intensive AR process.  ... 
doi:10.1109/mm.2015.2 fatcat:kd5kg5ndxne3hksvlxzkrq2nne

Runtime Task Scheduling using Imitation Learning for Heterogeneous Many-Core Systems [article]

Anish Krishnakumar, Samet E. Arda, A. Alper Goksoy, Sumit K. Mandal, Umit Y. Ogras, Anderson L. Sartor, Radu Marculescu
2020 arXiv   pre-print
Domain-specific systems-on-chip, a class of heterogeneous many-core systems, are recognized as a key approach to narrow down the performance and energy-efficiency gap between custom hardware accelerators  ...  Existing optimization-based techniques cannot achieve this objective at runtime due to the combinatorial nature of the task scheduling problem.  ...  (b) A heterogeneous computing platform with 4 processing elements and list of tasks in DAG supported by each PE (c) A sample schedule of the DAG on the heterogeneous many-core system. time quantum.  ... 
arXiv:2007.09361v1 fatcat:w3xhf5urejdvvinunuqev2sfwu

Evaluation Performance of Task Scheduling Algorithms in Heterogeneous Environments

Hadi Yazdanpanah, Amin Shouraki, Najmeh Jamali
2016 International Journal of Computer Applications  
Scheduling is one of the important factors in the heterogeneous environment and the aim of task scheduling in the processing environment is to move computation towards data.  ...  A heterogeneous computing environment is a large-scale distributed data processing environment, it is depends to some extent parameters on the application and that classified in three main categories such  ...   Partitioning based on Data-intensive Workflow.  Reduced latency with improvement in the throughput. Multi-Objective Task Scheduling  Minimize the makespan.  ... 
doi:10.5120/ijca2016908968 fatcat:pg6ufigyerajhnzronxfmtqodu

Algorithms for scheduling task-based applications onto heterogeneous many-core architectures

Michel A. Kinsy, Srinivas Devadas
2014 2014 IEEE High Performance Extreme Computing Conference (HPEC)  
We use two realistic power electronics applications to evaluate our mapping techniques on full RTL many-core systems consisting of eight different types of processor cores.  ...  In this paper we present an Integer Linear Programming (ILP) formulation and two non-iterative heuristics for scheduling a task-based application onto a heterogeneous manycore architecture.  ...  onto a heterogenous many-core architecture.  ... 
doi:10.1109/hpec.2014.7040977 dblp:conf/hpec/KinsyD14a fatcat:biaj3t7rijeqtier5b7fmj6xvy

Heterogeneous cores for MapReduce processing: Opportunity or challenge?

Feng Yan, Ludmila Cherkasova, Zhuoyao Zhang, Evgenia Smirni
2014 2014 IEEE Network Operations and Management Symposium (NOMS)  
To offer diverse computing capabilities, the emergent modern system on a chip (SoC) might include heterogeneous multi-core processors.  ...  ., to choose between many slow cores, fewer faster cores, or to select a combination of them.  ...  processors with (many) slow cores.  ... 
doi:10.1109/noms.2014.6838339 dblp:conf/noms/YanCZS14 fatcat:jliihgk4ozbl3il4slco4r5ihe

A task-level pipelined many-SIMD augmented reality processor with congestion-aware network-on-chip scheduler

Gyeonghoon Kim, Seongwook Park, Kyuho Lee, Youchang Kim, Injoon Hong, Kyeongryeol Bong, Dongjoo Shin, Sungpill Choi, Junyoung Park, Hoi-Jun Yoo
2014 2014 IEEE COOL Chips XVII  
In addition, the multicore employs a congestion-aware network-on-chip scheduler for 2D-mesh network-on-chip to support massive internal data transaction caused by task-level pipeline.  ...  A 36 Heterogeneous multicore processor is proposed to accelerate recognition-based markerless augmented reality.  ...  Its task-level pipelined heterogeneous many-SIMD clusters reduce latency of the computationally intensive AR process.  ... 
doi:10.1109/coolchips.2014.6842959 dblp:conf/coolchips/KimPLKHBSCPY14 fatcat:e3ms3usrrfabdjo77lssrttaxy

High performance scheduling of mixed-mode DAGs on heterogeneous multicores [article]

Agnes Rohlin, Henrik Fahlgren, Miquel Pericas
2019 arXiv   pre-print
To achieve high performance we analyze various schemes for heterogeneous scheduling, including both criticality-aware and performance-only schemes, and extend them with task molding to dynamically adjust  ...  This paper studies how irregular mixed-mode parallel computations can be mapped on a single-ISA heterogeneous architecture with the goals of performance and portability.  ...  Kernels When selecting the kernels, the priority was to match the desired characteristics of memory-intensive (streaming), cache-intensive (i.e. data reuse) and compute-intensive.  ... 
arXiv:1901.05907v2 fatcat:3j2mcdgimbd2hpp4f4remfjeey

Asymmetry-Aware Scheduling in Heterogeneous Multi-core Architectures [chapter]

Tao Zhang, Xiaohui Pan, Wei Shu, Min-You Wu
2013 Lecture Notes in Computer Science  
PBS makes scheduling based on applications' sensitivity on large cores, and assigns large cores to applications that can achieve better performance gains.  ...  We have implemented these two schedulers in Linux and evaluated their performance with the PARSEC benchmark on different heterogeneous architectures.  ...  Many studies on scheduling in heterogeneous multi-core systems focus on achieving high system throughput by balancing the hardware resources (e.g., cores, caches) among different applications [1] [16  ... 
doi:10.1007/978-3-642-40820-5_22 fatcat:xxrgexgcgjgczmyfamcjlspaf4

Towards Seismic Wave Modeling on Heterogeneous Many-Core Architectures Using Task-Based Runtime System

Victor Martinez, David Michea, Fabrice Dupros, Olivier Aumage, Samuel Thibault, Hideo Aochi, Philippe O.A. Navaux
2015 2015 27th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)  
Towards seismic wave modeling on heterogeneous many-core architectures using task-based runtime system.  ...  In this paper, we consider StarPU task-based runtime system in order to harness the power of heterogeneous CPU+GPU computing nodes.  ...  Towards seismic wave modeling on heterogeneous many-core architectures using task-based runtime system Víctor Martínez * , David Michéa ‡ , Fabrice Dupros ‡ , Olivier Aumage § , Samuel Thibault § , Hideo  ... 
doi:10.1109/sbac-pad.2015.33 dblp:conf/sbac-pad/MartinezMDATAN15 fatcat:e6z7kutkpze4fbwowbeq2frbye

An Adaptive Performance-oriented Scheduler for Static and Dynamic Heterogeneity [article]

Jing Chen, Pirah Noor Soomro, Mustafa Abduljabbar, Miquel Pericàs
2020 arXiv   pre-print
The PTT is an extensible and dynamic lightweight manifest of the per-core latency that can be used to guide the scheduling of both critical and non-critical tasks.  ...  With the emergence of heterogeneous hardware paving the way for the post-Moore era, it is of high importance to adapt the runtime scheduling to the platform's heterogeneity.  ...  Conclusion We have introduced a performance-based scheduler for heterogeneous architecture that leverages online monitoring on top of the XiTAO runtime. e presented scheduler improves task execution throughput  ... 
arXiv:1905.00673v2 fatcat:ufjpveqjlretzfp3zhnebxxq6u

MARLA: MapReduce for Heterogeneous Clusters

Zacharia Fadika, Elif Dede, Jessica Hartog, Madhusudhan Govindaraju
2012 2012 12th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (ccgrid 2012)  
We quantify the performance gains exhibited by our approach against Apache Hadoop and MARIANE in data intensive and compute intensive applications.  ...  MapReduce has gradually become the framework of choice for "big data". The MapReduce model allows for efficient and swift processing of large scale data with a cluster of compute nodes.  ...  Tasks are requested for as many cores as a node possesses (an option the user can control in the application settings).  ... 
doi:10.1109/ccgrid.2012.135 dblp:conf/ccgrid/FadikaDHG12 fatcat:t6ff7z2jzfhwvciqyn4j7xjjlq
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