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Accurate and scalable RF interconnect model for silicon-based RFIC applications

Choon Beng Sia, Beng Hwee Ong, Kiat Seng Yeo, Jian-Guo Ma, Manh Anh Do
2005 IEEE transactions on microwave theory and techniques  
Accurate and scalable RF interconnect model for silicon-based RFIC applications. IEEE Transactions on Microwave Theory and Techniques, 53(9), 3035-3044.  ...  An accurate and scalable double-radio frequency interconnect model, continuous across physical dimensions of width and length, is presented to demonstrate reliable predictions of interconnect characteristics  ...  language (PEL) to obtain values of the components in the RF subcircuit model.  ... 
doi:10.1109/tmtt.2005.854218 fatcat:idchwd4c5bd73dywb4v6uowwye

Design automation methodology and rf/analog modeling for rf CMOS and SiGe BiCMOS technologies

D. L. Harame, K. M. Newton, R. Singh, S. L. Sweeney, S. E. Strang, J. B. Johnson, S. M. Parker, C. E. Dickey, M. Erturk, G. J. Schulberg, D. L. Jordan, D. C. Sheridan (+6 others)
2003 IBM Journal of Research and Development  
The rapidly expanding telecommunications market has led to a need for advanced rf integrated circuits.  ...  To enable this, IBM has in place a mature project infrastructure consisting of predictive device models, complete rf characterization, statistical and scalable compact models that are hardware-verified  ...  We acknowledge the SiGe BiCMOS and rf CMOS development organizations at the IBM East Fishkill, New York, and Essex Junction, Vermont, facilities for the technology development.  ... 
doi:10.1147/rd.472.0139 fatcat:pejbk72rafbfxkagylkctnet24

Design considerations for 60 GHz CMOS radios

C.H. Doan, S. Emami, D.A. Sobel, A.M. Niknejad, R.W. Brodersen
2004 IEEE Communications Magazine  
With the availability of 7 GHz of unlicensed spectrum around 60 GHz, there is growing interest in using this resource for new consumer applications requiring very high-data-rate wireless transmission.  ...  System, circuit, and device-level barriers to a low-cost 60 GHz CMOS implementation are described, potential solutions are explored, and remaining challenges are discussed.  ...  S-parameter models are very accurate as they implicitly account for all parasitics and any distributed effects, and are sufficient for the design of many small-signal circuits.  ... 
doi:10.1109/mcom.2004.1367565 fatcat:4auradxk7jgtlczlp6ulenjr3u

ESD protection design for microwave/millimeter wave low-noise amplifiers

Ming-Hsien Tsai, Shawn S. H. Hsu
2014 2014 IEEE International Wireless Symposium (IWS 2014)  
Different ESD design topologies suitable for microwave/millimeter wave low-noise amplifiers (LNAs) are reviewed, and the design tradeoffs and limitations of each topology are also discussed.  ...  Index Terms-CMOS, electrostatic discharge (ESD), low-noise amplifier (LNA), human body model (HBM), microwave, and millimeter wave (mm-wave).  ...  We proposed using the scalable RF junction varactors for ESD design [5] .  ... 
doi:10.1109/ieee-iws.2014.6864242 fatcat:bbxw2uy355g7pp3fplxphqd6fq

Equivalent circuit model of on-wafer CMOS interconnects for RFICs

Xiaomeng Shi, Jian-Guo Ma, Kiat Seng Yeo, Manh Anh Do, Erping Li
2005 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
This paper investigates the properties of the on-wafer interconnects built in a 0.18-m CMOS technology for RF applications. A scalable equivalent circuit model is developed.  ...  Index Terms-Empirical formulas, lumped equivalent circuit model, modeling, RF CMOS interconnects, scalable, scattering parameters measurement, skin effect, substrate losses.  ...  Equivalent Circuit Model of On-Wafer CMOS Interconnects for RFICs I.  ... 
doi:10.1109/tvlsi.2005.857177 fatcat:df3lddi7ujgjpge5okufssdiva

On-Wafer Microwave De-Embedding Techniques [chapter]

Xi Sung Loo, Kiat Seng Yeo, Kok Wai Johnny Chew
2017 Microwave Systems and Applications  
Successful RF circuit design requires accurate characterization of on-chip devices.  ...  The resulted de-embedded RF parameters of CMOS transistor show good scalability across geometries and negligible frequency dependency of less than 3% for up to 100 GHz.  ...  Acknowledgements The authors like to thank GLOBALFOUNDRIES Singapore Pte Ltd for providing tape-out resources and measurement support.  ... 
doi:10.5772/66237 fatcat:6vg4sjruarcd7ivuyvm3qpefdi

SOI CMOS Technology with 360GHz fT NFET, 260GHz fT PFET, and Record Circuit Performance for Millimeter-Wave Digital and Analog System-on-Chip Applications

Sungjae Lee, Jonghae Kim, Daeik Kim, Basanth Jagannathan, Choongyeun Cho, Jim Johnson, Brian Dufrene, Noah Zamdmer, Lawrence Wagner, Richard Williams, David Fried, Ken Rim (+4 others)
2007 2007 IEEE Symposium on VLSI Technology  
We present record-performance RF devices and circuits for an SOI CMOS technology, at 35nm L poly .  ...  to enable high-performance circuit design.  ...  Fig. 5 shows CMOS RF performance (f T ) scalability with L poly . At sub-35nm L poly , peak f T 's of 360GHz and 260GHz for NFET and PFET are measured, as shown in Fig. 5 .  ... 
doi:10.1109/vlsit.2007.4339724 fatcat:trcsntyudbe77auvt2tgghysma

65nm SOI CMOS SoC Technology for Low-Power mmWave and RF Platform

Daeik D. Kim, Jonghae Kim, Choongyeun Cho, Jean-Olivier Plouchart, Robert Trzcinski
2008 2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems  
An RF and mmWave platform developed in 65nm SOI CMOS technology is presented. The SOI FET performance in a wired cell is measured up to f T =300GHz and 200GHz for NFET and PFET.  ...  Back-end-of-line Vertical Native Capacitor (VNCAP) and on-chip inductor performances are reported. The performance scaling trends of mmWave PLL front-end components are presented.  ...  Patton for their support.  ... 
doi:10.1109/smic.2008.18 fatcat:wanso7i4dvchlawnscanko5cry

65nm SOI CMOS SoC Technology for Low-Power mmWave and RF Platform

Daeik D. Kim, Jonghae Kim, Choongyeun Cho, Jean-Olivier Plouchart, Robert Trzcinski
2008 2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems  
An RF and mmWave platform developed in 65nm SOI CMOS technology is presented. The SOI FET performance in a wired cell is measured up to f T =300GHz and 200GHz for NFET and PFET.  ...  Back-end-of-line Vertical Native Capacitor (VNCAP) and on-chip inductor performances are reported. The performance scaling trends of mmWave PLL front-end components are presented.  ...  Patton for their support.  ... 
doi:10.1109/smic.2007.18 fatcat:tohjuqdzzffwxccj3ch2e5kate

ESD-Protected K-Band Low-Noise Amplifiers Using RF Junction Varactors in 65-nm CMOS

Ming-Hsien Tsai, Shawn S. H. Hsu, Fu-Lung Hsueh, Chewn-Pu Jou
2011 IEEE transactions on microwave theory and techniques  
The junction varactors are customized for the RF ESD applications with accurate equivalent circuit models.  ...  This paper presents two K-band low-noise amplifiers (LNAs) in 65-nm CMOS using the proposed RF junction varactors as the ESD protection devices.  ...  The components , , and model the parasitics from the substrate.  ... 
doi:10.1109/tmtt.2011.2170582 fatcat:hctgza6pdfgkfdfaehp5iepgbe

Chip-package co-design of a 4.7 GHz VCO

S. Donnay, K. Vaesen, P. Pieters, W. Diels, P. Wambacq, W. De Raedt, E. Beyne, M. Engels, I. Bolsens
2000 ICM'99. Proceedings. Eleventh International Conference on Microelectronics (IEEE Cat. No.99EX388)  
Unloaded Qs of on-chip inductors are typically not higher than 5, which limits for example the phase noise performance of a VCO circuit.  ...  Active RF components can be assembled to the MCM substrate using Flip Chip technology. The parasitics introduced this way are much lower as compared to traditional chip bonding and packaging.  ...  Acknowledgments The authors would like to thank both the MCM and MIRA development groups of IMEC for their contributions and support in this research.  ... 
doi:10.1109/icm.2000.884826 fatcat:arlj5tq3fnbwthurzz62enlf5m

Capacitive Model and S-Parameters of Double-Pole Four-Throw Double-Gate RF CMOS Switch

Viranjay M. Srivastava, Kalyan S. Yadav, Ghanashyam Singh
2011 Wireless Engineering and Technology  
DP4T DG RF CMOS switch for operation at high frequency is also analyzed with its capacitive model.  ...  In this paper, we have analyzed the Double-Pole Four-Throw Double-Gate Radio-Frequency Complementary Metal-Oxide-Semiconductor (DP4T DG RF CMOS) switch using S-parameters for 1 GHz to 60 GHz of frequency  ...  Figure 5 . 5 Capacitive model of the DP4T DG RF CMOS switch at ON state. Figure 6 . 6 Equivalent circuit of the DP4T DG RF CMOS switch.  ... 
doi:10.4236/wet.2011.21003 fatcat:npow7surpnd3zebxrghws4nqsm

Free Software for Analog and Digital Design

Dušan N. Grujić
2021 Zenodo  
PSSOH paper on free software for analog and digital design. The lecture was recorded and the video of presentation held by Assist. Prof.  ...  very important feature for RF design, missing in FOSS extractors, is parasitic blocking.It is common for RF devices to be modeled with extrinsic model -it includes intrinsic parasitics of semiconductor  ...  Mixed signal simulations are essential for design and characterization of digitally assisted analog/RF circuits.  ... 
doi:10.5281/zenodo.6506432 fatcat:yn3fyiaulvcprja5nkchermmae

RF CMOS Integrated Circuit: History, Current Status and Future Prospects

Noboru ISHIHARA, Shuhei AMAKAWA, Kazuya MASU
2011 IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences  
In this paper, the history and the current status of the development of RF CMOS circuits are reviewed, and the future status of RF CMOS circuits is predicted.  ...  However, classical technology for designing analog RF circuits cannot be used to design circuits for the abovementioned devices since it can be applied only in the case of continuous voltage and continuous  ...  Acknowledgments We are all thanks for students and researchers who were or are engaged in studding of the future LSI circuit design with us.  ... 
doi:10.1587/transfun.e94.a.556 fatcat:4fvaacoeqfc6nhmpgmjg5mrdiq

Scalable RFCMOS Model for 90 nm Technology

Ah Fatt Tong, Wei Meng Lim, Choon Beng Sia, Xiaopeng Yu, Wanlan Yang, Kiat Seng Yeo
2011 International Journal of Microwave Science and Technology  
This paper presents the formation of the parasitic components that exist in the RF MOSFET structure during its high-frequency operation.  ...  Physical geometry equations are proposed to represent these parasitic components, and by implementing them into the RF model, a scalable RFCMOS model, that is, valid up to 49.85 GHz is demonstrated.  ...  Tonegawa from Sony for their helpful discussions and valuable inputs.  ... 
doi:10.1155/2011/452348 fatcat:vtu2eybro5bqbl37udesgdbstu
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