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A scalable register file architecture for superscalar processors

Steven Wallace, Nader Bagherzadeh
<span title="">1998</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/brvj2ugukfgvhevdy5lwzvdy6m" style="color: black;">Microprocessors and microsystems</a> </i> &nbsp;
Consequently, a scalable register file architecture can be implemented without performance degradation.  ...  Multiple register files of a scalar processor can be used in a superscalar processor if results are renamed when they are written to the register file.  ...  Another benefit of using a scalable register file architecture is that the cycle time can be close to that of a scalar register file.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/s0141-9331(98)00048-9">doi:10.1016/s0141-9331(98)00048-9</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/25auvisuo5d3loqakzmsqa7gxa">fatcat:25auvisuo5d3loqakzmsqa7gxa</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170812182259/http://gram.eng.uci.edu/students/swallace/papers_wallace/pdf/JMM-98-ScalableRF.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/24/e0/24e06b49053ca219d4e777517a0a87c979836e12.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/s0141-9331(98)00048-9"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> elsevier.com </button> </a>

Mamba: A scalable communication centric multi-threaded processor architecture

Gregory A. Chadwick, Simon W. Moore
<span title="">2012</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/nmhv25e6jvhplcow6e2chjryx4" style="color: black;">2012 IEEE 30th International Conference on Computer Design (ICCD)</a> </i> &nbsp;
Communication is also a key issue in multi-core architecture.  ...  However a fine-grained approach implies many interworking threads and the overhead of synchronising and scheduling these threads can eradicate any scalability advantages a fine-grained program may have  ...  Acknowledgments The authors would like to acknowledge Arnab Banerjee for implementing the interconnect architecture used by the Mamba system and would like to thank Paul Fox, Timothy Jones and Theo Markettos  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/iccd.2012.6378652">doi:10.1109/iccd.2012.6378652</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/iccd/ChadwickM12.html">dblp:conf/iccd/ChadwickM12</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/peugqonstvbtlgb64iq67aw344">fatcat:peugqonstvbtlgb64iq67aw344</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170123234842/http://www.cl.cam.ac.uk:80/techreports/UCAM-CL-TR-832.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/18/a9/18a9349eb021f921dbd46509568d49919e98a7ba.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/iccd.2012.6378652"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Flexible design of SPARC cores

Tomás Bautista, Antonio Núñez
<span title="">1999</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/h4zelo33ojdfzbwajaf5qlthey" style="color: black;">Proceedings of the seventh international workshop on Hardware/software codesign - CODES &#39;99</a> </i> &nbsp;
In this paper we present experimental results obtained during the modelling, design and implementation of a full set of versions of SPARC v8 Integer Unit core aimed for embedded applications in digital  ...  They have been mapped to a 0.35 m, three metal layers process. The quantitative results given characterize suitable points in the design space.  ...  Architecture related reasons: X It has been chosen more specifically the SPARC 32-bit version 8 specification ( SPARC is an open and scalable architecture, which leaves the designer with a great degree  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/301177.301200">doi:10.1145/301177.301200</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/codes/BautistaN99.html">dblp:conf/codes/BautistaN99</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/cuopcpchibezrga2tjzrhuudqm">fatcat:cuopcpchibezrga2tjzrhuudqm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170808183735/http://www.cecs.uci.edu/~papers/compendium94-03/papers/1999/codes99/pdffiles/2_3.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/ec/e9/ece9be92e0b58ccd56b57b6de9f65ddda6b82ae6.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/301177.301200"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

Design of SPARC V8 ISS Based on SystemC

Xue Yang, Yunkai Feng, Lixin Yu
<span title="">2015</span> <i title="EJournal Publishing"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/dvpgeslokng5hpqcame34jtsc4" style="color: black;">International Journal of Information and Electronics Engineering</a> </i> &nbsp;
SPARC V8 PROCESSOR ARCHITECTURE SPARC (Scalable Processor ARChitecture) is a system structure standard brought forward by SUN company in 1985.  ...  It is now one of the most popular worldwide microprocessor architecture. SPARC is an open architecture, so all organizations and individuals can exploit products based on SPARC architecture.  ...  She is a junior Engineer. She majors in design of microprocessor, familiar with SPARC V8 architecture, pipeline structure and multi-issue structure.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.18178/ijiee.2016.6.1.596">doi:10.18178/ijiee.2016.6.1.596</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/lvcc753lgvefpairollogujh5e">fatcat:lvcc753lgvefpairollogujh5e</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20180604011155/http://www.ijiee.org/vol6/596-D2014204.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/93/57/935736a9759e6eb4bc7732442617508e3819f43a.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.18178/ijiee.2016.6.1.596"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> Publisher / doi.org </button> </a>

A Characterization of the SPARC T3-4 System [article]

Michiel W. van Tol
<span title="2011-06-15">2011</span> <i > arXiv </i> &nbsp; <span class="release-stage" >pre-print</span>
This technical report covers a set of experiments on the 64-core SPARC T3-4 system, comparing it to two similar AMD and Intel systems.  ...  Scalability tests with a fine grained multithreaded runtime are performed, showing problems with atomic CAS operations on such physically highly parallel systems.  ...  Acknowledgement The author would like to thank Sun/Oracle for early access to a SPARC T3-4 system through the CMT beta programme which made these experiments possible, as well as the feedback given on  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1106.2992v1">arXiv:1106.2992v1</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/hez42imqjregngie7xvpaiw7m4">fatcat:hez42imqjregngie7xvpaiw7m4</a> </span>
<a target="_blank" rel="noopener" href="https://archive.org/download/arxiv-1106.2992/1106.2992.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> File Archive [PDF] </button> </a> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1106.2992v1" title="arxiv.org access"> <button class="ui compact blue labeled icon button serp-button"> <i class="file alternate outline icon"></i> arxiv.org </button> </a>

Sparc T4: A Dynamically Threaded Server-on-a-Chip

Manish Shah, Robert Golla, Gregory Grohoski, Paul Jordan, Jama Barreh, Jeffrey Brooks, Mark Greenberg, Gideon Levinsky, Mark Luttrell, Christopher Olson, Zeid Samoail, Matt Smittle (+1 others)
<span title="">2012</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/gvjkwgwwvnakpbfssxpqjozbqm" style="color: black;">IEEE Micro</a> </i> &nbsp;
Sparc T1, the first-generation processor of the Niagara family, incorporated eight processor cores with a total of 32 threads on a single chip, thus achieving industry-leading throughput performance on  ...  a single chip. 1 Sparc T2, the next processor, delivered twice the performance of Sparc T1 with hardware support for 64 threads on a single chip. 2,3 In 2010, Oracle introduced the Sparc T3 microprocessor  ...  Cryptographic unit Oracle Sparc Architecture CMT processors have always provided hardware support for a range of cryptographic operations.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/mm.2012.1">doi:10.1109/mm.2012.1</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/qgohgt56ufbk7nuirqg527m624">fatcat:qgohgt56ufbk7nuirqg527m624</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20120417022854/http://ipv6.ppk.itb.ac.id:80/~dikshie/IEEE-Micro/06133263.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/d3/38/d33880a01318ec992071968c25059763146e6343.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/mm.2012.1"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

SparCE: Sparsity aware General Purpose Core Extensions to Accelerate Deep Neural Networks [article]

Sanchari Sen, Shubham Jain, Swagath Venkataramani, Anand Raghunathan
<span title="2017-11-29">2017</span> <i > arXiv </i> &nbsp; <span class="release-stage" >pre-print</span>
We also evaluate SparCE on a 4-way SIMD ARMv8 processor using the OpenBLAS library, and demonstrate that SparCE achieves 8%-15% reduction in the application-level execution time.  ...  SparCE consists of 2 key micro-architectural enhancements- a Sparsity Register File (SpRF) that tracks zero registers and a Sparsity aware Skip Address (SASA) table that indicates instructions to be skipped  ...  In-order SparCE Processor Pipeline We now explain how SPARCE can be integrated into an inorder processor. Figure 8 shows the block diagram of the overall SPARCE processor architecture.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1711.06315v2">arXiv:1711.06315v2</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/vckqomokmfbkxendwvzmbxa4sq">fatcat:vckqomokmfbkxendwvzmbxa4sq</a> </span>
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SPARC: Statistical Performance Analysis with Relevance Conclusions

Justin C. Tullos, Scott R Graham, Jeremy D. Jordan, Pranav Patel
<span title="">2021</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/k7cf45sp7faezjq6aasftgokc4" style="color: black;">IEEE Open Journal of the Computer Society</a> </i> &nbsp;
We present an experimental analysis characterizing the performance of a trio of RISC-V open-source processors to evaluate SPARC and its efficacy compared to similar frameworks.  ...  To address this problem, we propose a new framework, SPARC, that pioneers a synthesis of difference and equivalence hypothesis testing to provide relevant conclusions.  ...  CONCLUSION In this paper, the statistical framework SPARC is proposed for a scalable and distribution-free performance evaluation of computers.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/ojcs.2021.3060658">doi:10.1109/ojcs.2021.3060658</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/c7a3ueq3t5c3nnrxsuqdp4iulm">fatcat:c7a3ueq3t5c3nnrxsuqdp4iulm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20210428153052/https://ieeexplore.ieee.org/ielx7/8782664/9349230/09359464.pdf?tp=&amp;arnumber=9359464&amp;isnumber=9349230&amp;ref=" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/fb/1a/fb1a72824f28fc60da252b65af7d7d8942e5433e.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/ojcs.2021.3060658"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="unlock alternate icon" style="background-color: #fb971f;"></i> ieee.com </button> </a>

SPARC: Simulation Package for Ab-initio Real-space Calculations

Qimen Xu, Abhiraj Sharma, Benjamin Comer, Hua Huang, Edmond Chow, Andrew J. Medford, John E. Pask, Phanish Suryanarayana
<span title="">2021</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/xayqhkyjsncwvogxxusqncax6q" style="color: black;">SoftwareX</a> </i> &nbsp;
number of processors grows.  ...  It is straightforward to install/use and highly competitive with state-of-the-art planewave codes, demonstrating comparable performance on a small number of processors and increasing advantages as the  ...  We thank Donald Hamann for use of and assistance with a development version of the ONCVPSP code.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.softx.2021.100709">doi:10.1016/j.softx.2021.100709</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/yv42bmyag5gark2tt5zlj5cj5u">fatcat:yv42bmyag5gark2tt5zlj5cj5u</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20210527043113/https://pdf.sciencedirectassets.com/312019/1-s2.0-S2352711021X00039/1-s2.0-S2352711021000546/main.pdf?X-Amz-Security-Token=IQoJb3JpZ2luX2VjEJT%2F%2F%2F%2F%2F%2F%2F%2F%2F%2FwEaCXVzLWVhc3QtMSJIMEYCIQCpt%2Bh82e0M7X0oNk%2BP01Bo53bp0athpZO6TO0FNEPOyAIhALOauT71p6l0sFh5MKT4ItYZItm%2FAnP49ox897hWWikRKvoDCD0QAxoMMDU5MDAzNTQ2ODY1IgyPdgaAOSkKVt5FzFsq1wNJCXydrkoMtifQCIoiGfBglcmcf3nL92gl9ndetxnNpQXHwKjs1wvjGRa38IjAe03gAKp2Ozsxm3Jz9GyQzBjHQxOigU2nGm2E%2BY0KT24AkS%2BGw6BZZkoFM9QClfflZSICqUKryGGePhAELS6xGa%2BUPnnPJZk6RNiIUH0YUIQB%2Fu7JZ1j1VNQpPSGNVg2dNY%2BSM%2BzsMxccHnFQe4aJKac8x5IqNfnINKf8a4OEi9eK85jicBgQ9Y3YrhV%2FnOv1K22iNKtYj7y0Cpwwas6fV3%2BR6WTai9VIsmcSHdSnX5pwPFlYmL2CBGeNQuRoFJVAU4ynFNWGIY7Da%2B40c1W6XhtRbhHxdj%2BpLJn4bJhPu6kRAdQadfFHADra1rgBUpIoN9Caj4JaJrvqAun9XYh8NE1QKntKL5Rig5iAwKRObWxHiV65PyA1s3dyLED81kQuOjRIJwzLWdsUraiyI0y1%2FSs7Hf2gI2iftKhrK%2F%2BcZfRSxc8tV0Y5LwRNnE%2BGEDL1cwuzx%2F2uPgI5EgiWuOwdNAStE6vdA%2BA1pTMDPtauMpPEzYYe4fLUvGFgKWqzDC%2FYTVyG7WnP0C0GcfHo2ijeb716PKtqGmWuj6f1VODRtVA0GZM2e6AGR7Mwp6e8hQY6pAEltRNT95H9ioeFgVBbYI2VouRo3eQBNGSyZYdP8tsBNbWtEPu%2FRG0W0GOP7SPjBmBg5GYkOwyOgRqWE8Tf7QIdxMovgDq9eT%2FIEz9UgD9eeiSPJ3HnaDdrtL0fc6xXYJ6tQI90LHzcDKvLZLY2SjLhdpUu5SSaRbuXfmyPA01oOMrD62eIXPW5dPMfoQE5BxcDg0DhZgMU%2FWO1y8gnOhaczDA8fw%3D%3D&amp;X-Amz-Algorithm=AWS4-HMAC-SHA256&amp;X-Amz-Date=20210527T043107Z&amp;X-Amz-SignedHeaders=host&amp;X-Amz-Expires=300&amp;X-Amz-Credential=ASIAQ3PHCVTYWBNCBNNA%2F20210527%2Fus-east-1%2Fs3%2Faws4_request&amp;X-Amz-Signature=fc71f7317ca4f50bc760447e9a35ad8d4d67cf4911f6911837517a4982871693&amp;hash=8b7050e3d360d79a52b910fa4fb3adb83857f513e9467aeaf6fbb625639c3cd9&amp;host=68042c943591013ac2b2430a89b270f6af2c76d8dfd086a07176afe7c76c2c61&amp;pii=S2352711021000546&amp;tid=spdf-03666780-f587-4fda-aee6-4af41cffccac&amp;sid=775b6dfd12df484d450b79379df41748754dgxrqa&amp;type=client" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/b9/da/b9dafe30ad9f8467faeddaf7964cebb08a46c483.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.softx.2021.100709"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="unlock alternate icon" style="background-color: #fb971f;"></i> elsevier.com </button> </a>

UltraSPARC T2: A highly-treaded, power-efficient, SPARC SOC

Manish Shah, Jama Barreh, Jeff Brooks, Robert Golla, Gregory Grohoski, Nils Gura, Rick Hetherington, Paul Jordan, Mark Luttrell, Christopher Olson, Bikram Saha, Denis Sheahan (+2 others)
<span title="">2007</span> <i title="IEEE"> 2007 IEEE Asian Solid-State Circuits Conference </i> &nbsp;
Each SPARC core includes two integer execution units and a dedicated floating point and graphics unit, which delivers a peak floating point throughput of 11.2 GFLOPS/sec at 1.4 GHz.  ...  It delivers twice the throughput performance of the first generation UltraSPARC T1 processor in essentially the same power envelope.  ...  UltraSPARC T2 ARCHITECTURE The block diagram of UltraSPARC T2 is shown in Fig. 1 . UltraSPARC T2 is a single chip, multi-threaded processor consisting of eight 64-bit SPARC processor cores.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/asscc.2007.4425786">doi:10.1109/asscc.2007.4425786</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ydv35souhrashozmbctto6jn4q">fatcat:ydv35souhrashozmbctto6jn4q</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200709182615/https://www.oracle.com/technetwork/systems/opensparc/02-t2-a-sscc2007-1530395.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/1e/f5/1ef593d1d50035e9abf98ad64da9095b2ecde95b.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/asscc.2007.4425786"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

SPARC: Simulation Package for Ab-initio Real-space Calculations [article]

Qimen Xu, Abhiraj Sharma, Benjamin Comer, Hua Huang, Edmond Chow, Andrew J. Medford, John E. Pask, Phanish Suryanarayana
<span title="2020-05-21">2020</span> <i > arXiv </i> &nbsp; <span class="release-stage" >pre-print</span>
number of processors grows.  ...  It is straightforward to install/use and highly competitive with state-of-the-art planewave codes, demonstrating comparable performance on a small number of processors and increasing advantages as the  ...  We thank Donald Hamann for use of and assistance with a development version of the ONCVPSP code.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/2005.10431v1">arXiv:2005.10431v1</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/nvhvoqr7ynem7i5vsrsk26svhi">fatcat:nvhvoqr7ynem7i5vsrsk26svhi</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200528103907/https://arxiv.org/pdf/2005.10431v1.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/24/24/242483deb4e6eace5cbe095476db80532eb186b5.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/2005.10431v1" title="arxiv.org access"> <button class="ui compact blue labeled icon button serp-button"> <i class="file alternate outline icon"></i> arxiv.org </button> </a>

Memory Consistency and Process Coordination for SPARC Multiprocessors [chapter]

Lisa Higham, Jalal Kawash
<span title="">2000</span> <i title="Springer Berlin Heidelberg"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a> </i> &nbsp;
Their definition of RMO is taken unchanged from the SPARC Architecture Manual v9 .  ...  Weakening the memory consistency model of a multiprocess system improves its performance and scalability.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/3-540-44467-x_32">doi:10.1007/3-540-44467-x_32</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/2rqzfbnadvgfbhgx4uub6hq2ka">fatcat:2rqzfbnadvgfbhgx4uub6hq2ka</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20050430224256/http://pages.cpsc.ucalgary.ca:80/~kawash/papers/hipc00.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/55/49/55495256c499ea13e466ff52947ebb98d3dbedef.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/3-540-44467-x_32"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> springer.com </button> </a>

SPARC: Accurate and efficient finite-difference formulation and parallel implementation of Density Functional Theory: Isolated clusters

Swarnava Ghosh, Phanish Suryanarayana
<span title="">2017</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/wfenstutwram7ghf2w6rgf5gyu" style="color: black;">Computer Physics Communications</a> </i> &nbsp;
Through selected examples consisting of a variety of elements, we demonstrate that SPARC obtains exponential convergence in energy and forces with domain size; systematic convergence in the energy and  ...  but with a significantly reduced prefactor.  ...  Therefore, incorporating efficient and scalable parallel eigendecomposition techniques into SPARC is currently being undertaken by the authors.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.cpc.2016.09.020">doi:10.1016/j.cpc.2016.09.020</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/kmgdjkpskzdgdgbhup37tunyt4">fatcat:kmgdjkpskzdgdgbhup37tunyt4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200914072758/https://arxiv.org/pdf/1603.04334v2.pdf" title="fulltext PDF download [not primary version]" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <span style="color: #f43e3e;">&#10033;</span> <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/1a/83/1a830c56112570f51a8b570a0e4e7e131184d98f.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.cpc.2016.09.020"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> elsevier.com </button> </a>

SPARC: Accurate and efficient finite-difference formulation and parallel implementation of Density Functional Theory: Extended systems

Swarnava Ghosh, Phanish Suryanarayana
<span title="">2017</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/wfenstutwram7ghf2w6rgf5gyu" style="color: black;">Computer Physics Communications</a> </i> &nbsp;
We demonstrate using a wide variety of materials systems that SPARC achieves high convergence rates in energy and forces with respect to spatial discretization to reference plane-wave result; exponential  ...  a significantly reduced prefactor.  ...  For SPARC, we select 4, 8, 27, 128, 384, and 512 cores. In Fig. 7a , we plot the wall time taken by SPARC and ABINIT as a function of the number of processors.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.cpc.2017.02.019">doi:10.1016/j.cpc.2017.02.019</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/cfs3ijeyljg4tcpepp6wwhqilm">fatcat:cfs3ijeyljg4tcpepp6wwhqilm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200905133328/https://arxiv.org/pdf/1603.04339v2.pdf" title="fulltext PDF download [not primary version]" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <span style="color: #f43e3e;">&#10033;</span> <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/82/0a/820ad18f9ae929b4a57cbe4fc47abbcca2cf98eb.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.cpc.2017.02.019"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> elsevier.com </button> </a>

A scalable register file architecture for dynamically scheduled processors

S. Wallace, N. Bagherzadeh
<i title="IEEE Comput. Soc. Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/i2tihayjsjhmhmrqaqe2apcipy" style="color: black;">Proceedings of the 1996 Conference on Parallel Architectures and Compilation Technique</a> </i> &nbsp;
By using a multiple banked register file and performing dynamic result renaming, a scalable register file architecture can be implemented without performance degradation.  ...  A major obstacle in designing dynamically scheduled processors is the size and port requirement of the register file.  ...  Conclusion A new scalable register file architecture was introduced that is suitable for wide-issue, dynamically scheduled processors.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/pact.1996.552666">doi:10.1109/pact.1996.552666</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/IEEEpact/WallaceB96.html">dblp:conf/IEEEpact/WallaceB96</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/mlswkuzairf7dj3nntjerruw5u">fatcat:mlswkuzairf7dj3nntjerruw5u</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170809070557/http://gram.eng.uci.edu/students/swallace/papers_wallace/pdf/PACT-96-ScalableRF.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/4c/1f/4c1f614ae1fcff400ced5eb89cc6581b74b435d8.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/pact.1996.552666"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>
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