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Faucou Sebastien.Faucou@univ-nantes.fr Embedded Computing Systems) research unit, where he currently leads activities in, among others, real-time parallel programming models, scheduling of real-time parallel ... Mohaqeqi, Mitra Nasri, Yang Xu, Anton Cervin, and Karl-Erik Årzén, is about the design of digital control systems, where the period of tasks can be chosen within a certain range without impairing the B Sébastien ... Publisher's Note Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.Sébastien Faucou has a M.Sc. (1999) in Automatic Control and Applied ...doi:10.1007/s11241-018-9317-8 fatcat:tmoek5fw3jh7vlzk5pm27piy64
This paper discusses an implementation of runtime verification for embedded software running on a System-on-Programmable-Chip (SoPC) composed of a micro-controller and a FPGA. The goal is to verify at runtime that the execution of the software on the micro-controller conforms to a set of properties. To do so, a minimal instrumentation of the software is used to send events to a set of monitors implemented in the FPGA. These monitors are synthesised from a formal specification of the expecteddoi:10.1109/sies.2016.7509425 dblp:conf/sies/SoletBBFP16 fatcat:brg3xmsvqzfzjnizbl6hq4wdoi
more »... avior of the system expressed as a set of past-time linear temporal logic (ptLTL) formulas.
In order to satisfy timing constraints, modern real-time applications require massively parallel accelerators such as General Purpose Graphic Processing Units (GPGPUs). Generation after generation, the number of computing clusters made available in novel GPU architectures is steadily increasing, hence, investigating suitable scheduling approaches is now mandatory. Such scheduling approaches are related to mapping different and concurrent compute kernels within the GPU computing clusters, hencearXiv:2105.10312v1 fatcat:tzqjyi664bekfhh5ygb2a7y7g4
more »... rouping GPU computing clusters into schedulable partitions. In this paper we propose novel techniques to define GPU partitions; this allows us to define suitable task-to-partition allocation mechanisms in which tasks are GPU compute kernels featuring different timing requirements. Such mechanisms will take into account the interference that GPU kernels experience when running in overlapping time windows. Hence, an effective and simple way to quantify the magnitude of such interference is also presented. We demonstrate the efficiency of the proposed approaches against the classical techniques that considered the GPU as a single, non-partitionable resource.
IEEE design & test
When testing a time-critical system, some scenarios can be hard to run when acting only on the input sequence. The proper execution of a given scenario might require for instance a minimal execution time for a given piece of software. Execution times are notoriously difficult to control because they depend not only on the inputs, but also on the state of the micro-architecture. In this paper, we propose a method, based on runtime enforcement, which forces a system to run such a scenario. Wedoi:10.1109/mdat.2018.2791801 fatcat:276fxo3jt5chrfftprnvhovli4
more »... describe an implementation in the context of a RTOS for embedded control systems. Our method starts with a parametric formal model of the system where the parameters are delays that can be added to simulate longer execution times. The domain of acceptable parameter values to run the target scenario is computed offline. Online, a framework plugged in the RTOS observes the execution of the system and injects delays when needed.
Gcc Cosmic -O0 -O1 -O2 -O3 -no default 8.8 13 11.8 12.1 11.9 12 © Armel Mangean, Jean-Luc Béchennec, Mikaël Briday and Sébastien Faucou; licensed under Creative Commons License CC-BY Available ... Faucou 7:3 MainMemStart? MainMemEnd! t = 0 t ≤ MAINMEMTRANS t == MAINMEMTRANS Figure 1 Simple modeling of a memory using Uppaal. ...doi:10.4230/oasics.wcet.2016.7 dblp:conf/wcet/MangeanBBF16 fatcat:jak5mpflqnbz5dz6hlicos35nq
Audio Mostly 2021
This position paper advocates for digital sobriety in the design and usage of wireless acoustic sensors. As of today, these devices all rely on batteries, which are either recharged by a human operator or via solar panels. Yet, batteries contain chemical pollutants and have a shorter lifespan than electronic components: as such, they hinder the autonomy and sustainability of the Internet of Sounds at large. Against this problem, our radical answer is to avoid the use of batteries altogether;doi:10.1145/3478384.3478408 fatcat:x3rvdpimwne6ngw7cym733xtji
more »... instead, to harvest ambient energy in real time and store it in a supercapacitor allowing a few minutes of operation. We show the inherent limitations of battery-dependent technologies for acoustic sensing. Then, we describe how a lowcost Micro-Controller Unit (MCU) could serve for audio acquisition and feature extraction on the edge. In particular, we stress the advantage of storing intermediate computations in ferroelectric random-access memory (FeRAM), which is nonvolatile, fast, endurant and consumes little. As a proof of concept, we present a simple-minded detector of sine tones in background noise, which relies on a fixed-point implementation of the fast Fourier transform (FFT). We outline future directions towards bioacoustic event detection and urban acoustic monitoring without batteries nor wires. CCS CONCEPTS • Hardware → Sound-based input / output; Digital signal processing; Power estimation and optimization; Impact on the environment; • Computer systems organization → Real-time systems; • Networks → Sensor networks.
On the one hand, a major aspect of dependability for real-time embedded systems is the respect of timing requirements. On the other hand, the complexity of modern realtime embedded system implies the need for new design process focusing on high-level features, such as architecturebased design. In this paper, we show how to integrate a timing fault detection technique in such a design process. Our approach is based upon the CLARA ADL (Architecture Description Language). This language allows todoi:10.1145/1133373.1133425 dblp:conf/sigopsE/FaucouDT02 fatcat:7c42rq3hunc4jinc674qs4lmq4
more »... scribe applications which can be easily implemented thanks to a distributed middleware designed on top of the OSEK/VDX real-time kernel.
This paper describes a simulation platform for embedded software named ViPER (Virtual Platform and Environment Runtime). ViPER is oriented toward (but not limited to) systems of the automotive domain. It allows to model and simulate distributed embedded hardware platforms in order to ease the early development stages of the embedded software. Each node of the system is virtualized in a process that runs an ad-hoc port of the real-time operating system Trampoline. ViPER manages global time,doi:10.4108/icst.simutools2010.8712 dblp:conf/simutools/BechennecBFPJ10 fatcat:hfcsoacbifb2bgdmukntuqtsmm
more »... are interrupt and offers a quick and easy way to model hardware devices. In order to close the loop, relevant parts of the environment can be simulated. Once a platform is modeled, ViPER generates description files for each node that ensure the conformance of the hardware abstraction layer to the virtual hardware. ViPER and Trampoline are available as free software.
With the first approach (operator + on fig. 1 , see (Faucou, 2002) ), the mapping is made so as to "preserve the structure" of the FA. It targets especially the OSEK/VDX-based RP 3 . ... In (Faucou et al., 2004) (extended version of this paper), a comparison is done between CLARA and some related projects (all of them being discussed in other papers included in this volume): MetaH/AADL ...doi:10.1007/0-387-24590-1_5 dblp:conf/ifip/FaucouDT04 fatcat:znp7sjc54fch5nkfew24gxco5q
de Louis-Sébastien Mercier apparaît bien avec son second tome mentionnant l'aérostat. 37 -une trentaine de photographies, à compléter par celles du fonds Nadar de Carnavalet dues non seulement à Nadar, ... L'Intermédiaire des chercheurs et des curieux, tenu en 1885 par Charles Read, conservateur à Carnavalet, et Lucien Faucou, fils spirituel de Jules Cousin et bibliothécaire quelques mois à la Bibliothèque ...doi:10.4000/insitu.16768 fatcat:4qmxeofrprejxcdipw24i6at2u
Mixed criticality support for automotive embedded systems Yasmina Abdeddaim (Université Paris-Est, LIGM UMR CNRS 8049, ESIEE Paris, FR) Sébastien Faucou (University of Nantes, FR) Emmanuel Grolleau ( ... Davis Present: Sébastien Faucou, Leandro Indrusiak, Chris Gill, Gabe Parmer, Roman Ober- maisser, Links TACLeBench: http://tacle.knossosnet.gr/activities/taclebench Debie: http://www.irit.fr/wiki/ ...fatcat:vcq3pksyfrh53ncx6r5rsxabyu
© Armel Mangean, Jean-Luc Béchennec, Mikaël Briday and Sébastien Faucou; licensed under Creative Commons License CC-BY 16th International Workshop on Worst-Case Execution Time Analysis (WCET 2016 ... Faucou 7:9 These results confirm that slicing is an effective abstraction technique for our use case. ...doi:10.4230/oasics.wcet.2016 fatcat:2smyzkdh7rdndcptwasq4qsfue
This conference could not take place without the great investment in time and energy of our General Chair, Sébastien Faucou, from IRCCyN lab in Nantes. ... Sébastien Faucou, Université de Nantes, France Introduction The widespread adoption of multicore technologies in the computing industry has prompted research in a wide variety of computing fields with ...dblp:conf/rtns/AltenberndELG11 fatcat:gh4qe3npgfg4ncejm53oqo75py
Mixed Criticality in Multicore Automotive Embedded Systems Sebastien Faucou . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... Mixed criticality support for automotive embedded systems Yasmina Abdeddaim (Université Paris-Est, LIGM UMR CNRS 8049, ESIEE Paris, FR) Sébastien Faucou (University of Nantes, FR) Emmanuel Grolleau ( ...doi:10.4230/dagrep.5.3 fatcat:frrv4bul5rhfhh3jo4hv5l5uoi