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Rule-based Reasoning on Massively Parallel Hardware

Martin Peters, Christopher Brink, Sabine Sachweh, Albert Zündorf
2013 International Semantic Web Conference  
To address this issue, in this paper we propose a rule-based reasoning algorithm which explores the highly parallel hardware of modern processors.  ...  In contrast to other approaches of parallel reasoning, our algorithm works with rules that can be defined depending on the application scenario and thus is able to apply different semantics.  ...  In this paper we present an approach which uses the massively parallel hardware of a modern graphic processor unit (GPU) to apply a set of freely defined rules to an RDF-based ontology.  ... 
dblp:conf/semweb/PetersBSZ13 fatcat:spnkq7ifkfaodnxjwjepiez7jm

Scaling Parallel Rule-Based Reasoning [chapter]

Martin Peters, Christopher Brink, Sabine Sachweh, Albert Zündorf
2014 Lecture Notes in Computer Science  
In previous work we described a rulebased reasoner implementation that uses massively parallel hardware to derive new facts based on a given set of rules.  ...  Based on the introduced concepts, additional levels of parallelization can be proposed that benefit from the use of multiple parallel devices.  ...  In [1] we described first results of a rule-based and highly parallel reasoner running on massively parallel hardware like GPUs. Unlike many other parallel reasoner implementations (e.g.  ... 
doi:10.1007/978-3-319-07443-6_19 fatcat:6zqfiuzemvgavbsquu2xacg6te

RDFS Reasoning on Massively Parallel Hardware [chapter]

Norman Heino, Jeff Z. Pan
2012 Lecture Notes in Computer Science  
Different from previous work on parallel RDFS reasoning, we assume a shared memory architecture.  ...  Recent developments in hardware have shown an increase in parallelism as opposed to clock rates.  ...  Patel-Schneider for the fruitful discussion on properties of our approach. Parts of this work have been funded by the K-Drive project.  ... 
doi:10.1007/978-3-642-35176-1_9 fatcat:6cuyxzzpxbajdgznbt3gj2ulyq

Computers and Thought Award : Challenges of Massive Parallelism

Hiroaki Kitano
1993 International Joint Conference on Artificial Intelligence  
Although the AI community has yet to make a quantum leap, there are attempts to make use of the opportu nities offered by massively parallel computers, such as memory-based reasoning, genetic algorithms  ...  Even within the traditional AI approach, researchers have begun to realize that the needs for high per formance computing and very large knowledge bases to develop intelligent systems requires massively  ...  Massively parallel memory-based reasoning and massively parallel VLKB search use explicit symbols and do not involve strong learning and adaptation mechanisms by them selves.  ... 
dblp:conf/ijcai/Kitano93 fatcat:om4ldmkow5buxbjokixwzlnjt4

Abstraction in hardware system design

Rishiyur S. Nikhil
2011 Communications of the ACM  
This parallelism results in increased speed, which is often the main reason to implement something in hardware.  ...  Hardware systems typically have parallelism that is massive, fine-grain, heterogeneous, and reactive. (Unlike some authors, I make no distinction between the terms concurrency and parallelism).  ... 
doi:10.1145/2001269.2001284 fatcat:sxakrhfiefggvhgjs7nltcsj7q

Connectionist models for natural language processing

David L. Waltz
1986 Proceedings of the 24th annual meeting on Association for Computational Linguistics -  
based on the use of associative memory and hardware support for interprocessor communication.  ...  PANELIST STATEMENT After an almost twenty year lull, there has been a dramatic upsurge of interest in massively parallel models for computation, descendants of perceptron and pandemonium models, now dubbed  ... 
doi:10.3115/981131.981170 dblp:conf/acl/Waltz86 fatcat:yfdtzhanvjck7pverks7tbidoe

The Rewrite Rule Machine node architecture and its performance [chapter]

Patrick Lincoln, José Meseguer, Livio Ricciulli
1994 Lecture Notes in Computer Science  
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules.  ...  In a parallel machine this is implemented by communication on a network, on which messages travel to reach their destination objects.  ...  Rewrite rules are surprisingly well-suited to massively parallel computation.  ... 
doi:10.1007/3-540-58430-7_45 fatcat:btpgwvpicngxfbpzks7dxpyhvm

Massively Parallel Memory-Based Parsing

Hiroaki Kitano, Tetsuya Higuchi
1991 International Joint Conference on Artificial Intelligence  
Most parsing schemes are rule-based or principle-based which involves extensive serial rule application.  ...  Thus, this paper focuses on discussion of the feasibility and problems of the approach based on actual massively parallel implementation using real data.  ...  Massively parallel memory-based parsing was inspired from ideas of the memory-based reasoning and case-based reasoning which place memory as the basis of reasoning.  ... 
dblp:conf/ijcai/KitanoH91 fatcat:ejmed4rupjfc7mwpw6mj5dsjcq

ELIPS: toward a sensor fusion processor on a chip

Taher Daud, Adrian Stoica, Tyson Thomas, Wei-te Li, James A. Fabunmi, Belur V. Dasarathy
1999 Sensor Fusion: Architectures, Algorithms, and Applications III  
The paper presents the concept and initial tests from the hardware implementation of a low-power, high-speed signals are then broadcast down each column for each of the 64 inputs so that all the synapses  ...  provide high-speed computation on massive amounts of data in parallel mode.  ...  fuzzy logic; (2) rule-based expert systems; and (3) massively parallel artificial neural network, In its initial demon-stration ELIPS will perform various DITP functions of discrimination, recognition  ... 
doi:10.1117/12.341343 fatcat:u55n2wlrqne7lodhvx2udoh3h4

Automatic Generation of S-LAM Descriptions from UML/MARTE for the DSE of Massively Parallel Embedded Systems [chapter]

Manel Ammar, Mouna Baklouti, Maxime Pelcat, Karol Desnos, Mohamed Abid
2015 Studies in Computational Intelligence  
Massively Parallel Multi-Processors System-on-Chip (MP2SoC) architectures require efficient programming models and tools to deal with the massive parallelism present within the architecture.  ...  This trend draws attention to the effectiveness of Massively Parallel Multi-Processors System-on-Chip (MP2SoC) architectures in the HPC domain.  ...  Multidimensional parallel resources of massively parallel MP2SoC architectures are specified using the RSM sub-profile.  ... 
doi:10.1007/978-3-319-23509-7_14 fatcat:vaiwdsuhuvcejjuw6bptlw3jwu

Observer-invariant histopathology using genetics-based machine learning

Xavier Llorà, Anusha Priya, Rohit Bhargava
2007 Natural Computing  
This paper proposes and validates and efficient GBML technique-NAX-based on an incremental genetics-based rule learner that exploits massive parallelisms-via the message passing interface (MPI)-and efficient  ...  rule-matching using hardware-implemented operations.  ...  A modified version of an incremental genetics-based rule learner that exploits massive parallelisms-via the message passing interface (MPI)-and efficient rule-matching using hardware-oriented operations  ... 
doi:10.1007/s11047-007-9056-6 fatcat:6rumjgyervd6lgqe2vigjbn24y

Mapping high level algorithms onto massively parallel reconfigurable hardware

I. Damaj, J. Hawkins, A. Abdallah
2003 ACS/IEEE International Conference on Computer Systems and Applications, 2003. Book of Abstracts.  
Handle-C is a programming language based on C and extended by parallelism and communication primitives taken from CSP.  ...  The main focus of this paper is on implementing high level functional algorithms in reconfigurable hardware.  ...  Handel-C uses much of the syntax of conventional C with the addition of explicit parallelism. Handel-C relies on the parallel constructs in CSP to model concurrent hardware resources.  ... 
doi:10.1109/aiccsa.2003.1227451 fatcat:kckwvs6ugzdw3oaammihgjrlp4

On the limitations of Memory Based Reasoning [chapter]

Pádraig Cunningham, Barry Smyth, Tony Veale
1995 Lecture Notes in Computer Science  
Whereas work in symbolic AI is based on inference and knowledge representation MBR depends on using a large memory of examples as a reasoning base.  ...  Memory-Based Reasoning (MBR) represents a radical new departure in AI research.  ...  However MBR on its own is not an architecture for general intelligence.  ... 
doi:10.1007/3-540-60364-6_28 fatcat:eun7apjx7bdtho46sumyneqgdu

Cellular Automata and Randomization: A Structural Overview [chapter]

Monica Dascălu
2018 From Natural to Artificial Intelligence - Algorithms and Applications  
The chapter overviews the methods, algorithms, and architectures for random number generators based on cellular automata, as presented in the scientific literature.  ...  Successful applications of cellular automata random number/signal generators (both software and hardware) reported in the scientific literature are also reviewed.  ...  Parallelism: hardware vs. simulation Massive parallelism is one of the definitory features of cellular automata.  ... 
doi:10.5772/intechopen.79812 fatcat:enrbvyep55fdnhjxsr23gsqhty

Building fast Bayesian computing machines out of intentionally stochastic, digital parts [article]

Vikash Mansinghka, Eric Jonas
2014 arXiv   pre-print
We find that by connecting stochastic digital components according to simple mathematical rules, one can build massively parallel, low precision circuits that solve Bayesian inference problems and are  ...  We evaluate circuits for depth and motion perception, perceptual learning and causal reasoning, each performing inference over 10,000+ latent variables in real time - a 1,000x speed advantage over commodity  ...  Acknowledgements The authors would like to acknowledge Tomaso Poggio, Thomas Knight, Gerald Sussman, Rakesh Kumar and Joshua Tenenbaum for numerous helpful discussions and comments on early drafts, and  ... 
arXiv:1402.4914v1 fatcat:mnjmxywzyrgo5avrttcvsxosri
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