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Register Pressure Sensitive Redundancy Elimination [chapter]

Rajiv Gupta, Rastislav Bodík
1999 Lecture Notes in Computer Science  
In this paper we develop a redundancy elimination algorithm that is sensitive to register pressure: our novel technique first sets upper limits on allowed register pressure and then performs redundancy  ...  An increase in register pressure may in turn trigger generation of spill code which can more than offset the gains derived from redundancy elimination.  ...  In order to address the above issues we have developed a new register pressure sensitive redundancy elimination algorithm with the following characteristics: -Our algorithm sets upper limits on allowed  ... 
doi:10.1007/978-3-540-49051-7_8 fatcat:mtu7d2fuu5fprjaqdcn7mc62ne

An approach toward profit-driven optimization

Min Zhao, Bruce R. Childers, Mary Lou Soffa
2006 ACM Transactions on Architecture and Code Optimization (TACO)  
In this paper, we target scalar optimizations and, in particular, describe the models for partial redundancy elimination (PRE), loop invariant code motion (LICM), and value numbering (VN).  ...  Another related work is the register pressure-sensitive PRE [Gupta and Bodík 1999] . It sets upper limits on allowable register pressure and then performs redundancy elimination within these limits.  ...  Previous work has focused on developing heuristics to decide when to apply optimizations, such as register pressure-sensitive redundancy elimination, which sets upper limits on allowable register pressure  ... 
doi:10.1145/1162690.1162691 fatcat:ghtqlxl45vcirgcibbvbho2lo4

Continuous Optimization [chapter]

2017 Evolutionary Algorithms  
The continuous optimizer reduces dataflow height by performing constant propagation, reassociation, redundant load elimination, store forwarding, and silent store removal.  ...  However, because of value feedback and early execution, physical register pressure almost always decreases, often significantly (physical register pressure increased for 2 of 23 benchmarks, g721 decode  ...  Load and store reduction is provided by redundant load elimination, store forwarding, and silent store removal.  ... 
doi:10.1002/9781119136378.ch2 fatcat:2ylj4jb7ffcllmnnbrhom2qdc4

Continuous optimization

B. Fahs, T. Rafacz, S.J. Patel, S.S. Lumetta
2005 32nd International Symposium on Computer Architecture (ISCA'05)  
The continuous optimizer reduces dataflow height by performing constant propagation, reassociation, redundant load elimination, store forwarding, and silent store removal.  ...  However, because of value feedback and early execution, physical register pressure almost always decreases, often significantly (physical register pressure increased for 2 of 23 benchmarks, g721 decode  ...  Load and store reduction is provided by redundant load elimination, store forwarding, and silent store removal.  ... 
doi:10.1109/isca.2005.19 dblp:conf/isca/X05a fatcat:rkco4wjh3fau3jgwomvojrievm

Research of Register Pressure Aware Loop Unrolling Optimizations for Compiler

Xuehua Liu, Liping Ding, Yanfeng Li, Guangxuan Chen, Jin Du, G. Lee
2018 MATEC Web of Conferences  
Too heavy register pressure may results in register spilling and then leads to performance degradation.  ...  Register pressure problem has been a known problem for compiler because of the mismatch between the infinite number of pseudo registers and the finite number of hard registers.  ...  Effort has been paid to fight register pressure at some specific transformations, such as register pressure sensitive redundancy elimination [8] , register pressure guided unroll-and-jam, a framework  ... 
doi:10.1051/matecconf/201822803008 fatcat:ruwobkf7wvdd3ju6mkbub5xfvi

Redundancy elimination revisited

Keith Cooper, Jason Eckhardt, Ken Kennedy
2008 Proceedings of the 17th international conference on Parallel architectures and compilation techniques - PACT '08  
This work proposes and evaluates improvements to previously known algorithms for redundancy elimination.  ...  Classic redundancy elimination techniques operate on an intermediate representation of the program in which operand association and order is of fixed shape.  ...  This implies that more redundancies can be eliminated before exhausting the supply of physical registers.  ... 
doi:10.1145/1454115.1454120 dblp:conf/IEEEpact/CooperEK08 fatcat:2ltjbl32x5hephcb35pnrcly7i

Partial Redundancy Elimination using Lazy Code Motion [article]

Sandeep Dasgupta, Tanmay Gangwani
2019 arXiv   pre-print
Partial Redundancy Elimination (PRE) is a compiler optimization that eliminates expressions that are redundant on some but not necessarily all paths through a program.  ...  We chose PRE because it is a powerful technique that subsumes Common Subexpression Elimination (CSE) and Loop Invariant Code Motion (LICM), and hence has the potential to greatly improve performance.  ...  The performance of LCM-PRE is sensitive to register allocation (because of increased register pressure), and this causes the performance dip over BASE as presented in the S-curves.  ... 
arXiv:1905.08178v1 fatcat:iwspipgchnc5bnfshjoi3rqv2y

Prematerialization

Ivan D. Baev, Richard E. Hank, David H. Gross
2006 Proceedings of the 15th international conference on Parallel architectures and compilation techniques - PACT '06  
Modern compiler transformations that eliminate redundant computations or reorder instructions, such as partial redundancy elimination and instruction scheduling, are very effective in improving application  ...  Typically the task of dealing with the increased register pressure is left to the register allocator.  ...  Gupta and Bodik propose a register pressure sensitive redundancy elimination method, which first sets upper limits on allowed register pressure and then performs redundancy elimination within these limits  ... 
doi:10.1145/1152154.1152197 dblp:conf/IEEEpact/BaevHG06 fatcat:b2uwe6tejzc25l22nfvzf755mm

Unified Analysis of Array and Object References in Strongly Typed Languages [chapter]

Stephen Fink, Kathleen Knobe, Vivek Sarkar
2000 Lecture Notes in Computer Science  
These results illustrate the benefits obtained by performing redundant load and dead store elimination on Java programs.  ...  In the second part of this paper, we present two new sparse analysis algorithms using the heap array representation; one identifies redundant loads, and the other identifies dead stores.  ...  Most importantly, the Jalapeño optimizing compiler still lacks many classical scalar optimizations, which are especially important to eliminate the register copies and reduce register pressure introduced  ... 
doi:10.1007/978-3-540-45099-3_9 fatcat:pegvuszo2zagroz4cvsjrnazvq

Link-time smart card code hardening

Ronald De Keulenaer, Jonas Maebe, Koen De Bosschere, Bjorn De Sutter
2015 International Journal of Information Security  
pressure was detected (see Section 3.2.4); 56 are inner loops with register pressure; 11 are non-inner loops without register pressure; 15 loops are non-inner loops with register pressure.  ...  First, optimizing compilers risk undoing the protection by eliminating the inserted redundancy, e.g., by means of common subexpression elimination [38] .  ... 
doi:10.1007/s10207-015-0282-0 fatcat:7odgrcqfpref7dagdnzwm4rfve

A compiler framework for speculative optimizations

Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai, Sun Chan
2004 ACM Transactions on Architecture and Code Optimization (TACO)  
We use SSAPRE as one example to illustrate how to incorporate data speculation in partial redundancy elimination, register promotion, and strength reduction.  ...  Several compiler optimizations, such as redundancy elimination, strength reduction, and register promotion, have been modeled and resolved as partial redundancy elimination (PRE) problems.  ...  Hence, register pressure has not been an issue in our speculative optimizations in these experiments.  ... 
doi:10.1145/1022969.1022970 fatcat:7lmwykb7zjfcrd4pfijkweto44

A compiler framework for speculative analysis and optimizations

Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai, Sun Chan
2003 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation - PLDI '03  
We use SSAPRE [21] as one example to illustrate how to incorporate data speculation in those important compiler optimizations such as partial redundancy elimination (PRE), register promotion, strength  ...  We present experimental data on some SPEC2000 benchmark programs to demonstrate the usefulness of this framework and how data speculation benefits partial redundancy elimination.  ...  Many optimizations problems, such as redundancy elimination, strength reduction, and register promotion, have been modeled and resolved as PRE problems.  ... 
doi:10.1145/781131.781164 dblp:conf/pldi/LinCHYJNC03 fatcat:3clw4zvpg5hrjeaxsihayjycui

A compiler framework for speculative analysis and optimizations

Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai, Sun Chan
2003 SIGPLAN notices  
We use SSAPRE [21] as one example to illustrate how to incorporate data speculation in those important compiler optimizations such as partial redundancy elimination (PRE), register promotion, strength  ...  We present experimental data on some SPEC2000 benchmark programs to demonstrate the usefulness of this framework and how data speculation benefits partial redundancy elimination.  ...  Many optimizations problems, such as redundancy elimination, strength reduction, and register promotion, have been modeled and resolved as PRE problems.  ... 
doi:10.1145/780822.781164 fatcat:5iy3onk5afbr3kyykratz7qzte

A compiler framework for speculative analysis and optimizations

Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai, Sun Chan
2003 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation - PLDI '03  
We use SSAPRE [21] as one example to illustrate how to incorporate data speculation in those important compiler optimizations such as partial redundancy elimination (PRE), register promotion, strength  ...  We present experimental data on some SPEC2000 benchmark programs to demonstrate the usefulness of this framework and how data speculation benefits partial redundancy elimination.  ...  Many optimizations problems, such as redundancy elimination, strength reduction, and register promotion, have been modeled and resolved as PRE problems.  ... 
doi:10.1145/781163.781164 fatcat:agkz3x7ie5h7zm7vecmy57fxci

A practical data flow framework for array reference analysis and its use in optimizations

Evelyn Duesterwald, Rajiv Gupta, Mary Lou Soffa
1993 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation - PLDI '93  
Applications of our framework are discussed for register allocation, load/store optimizations, and con~olled loop unrolling.  ...  Example of a l-redundant store across one iteration (i) and the transformed loops with the redundancy eliminated (ii).  ...  Using this information, redundant loads carI be eliminated in a similar way as available subexpressions are eliminated for scalars [1] .  ... 
doi:10.1145/155090.155097 dblp:conf/pldi/DuesterwaldGS93 fatcat:gthnm75s5fdenksopep7elpkoe
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