2,672 Hits in 6.1 sec

Regional congestion awareness for load balance in networks-on-chip

Paul Gratz, Boris Grot, Stephen W. Keckler
2008 High-Performance Computer Architecture  
To improve load balance in adapting routing, we propose Regional Congestion Awareness (RCA), a lightweight technique to improve global network balance.  ...  Interconnection networks-on-chip (NOCs) are rapidly replacing other forms of interconnect in chip multiprocessors and system-on-chip designs.  ...  Li-Shiuan Peh and Amit Kumar for their contribution of the SPLASH-2 benchmark traces.  ... 
doi:10.1109/hpca.2008.4658640 dblp:conf/hpca/GratzGK08 fatcat:sko6ai7e2ban5bbxalynmfhrty

Transport-layer assisted vertical traffic balanced routing for thermal-aware three-dimensional Network-on-Chip systems

Kun-Chih Chen, Chih-Hao Chao, Shu-Yen Lin, Hui-Shun Hung, An-Yeu Wu
2012 Proceedings of Technical Program of 2012 VLSI Design, Automation and Test  
ABSTRACTION The thermal problem of three-dimensional Network-on-Chip (3D NoC) is severer than 2D NoC because chip stacking.  ...  However, it still suffers significant traffic congestion in the bottom chip layer and extremely traffic unbalance between vertical chip layers.  ...  For network topology, we use the cases of one 2x2x2 throttling region and two 2x2x2 throttling regions (as shown in Fig. 8 ).  ... 
doi:10.1109/vlsi-dat.2012.6212626 dblp:conf/vlsi-dat/ChenCLHW12 fatcat:oxjy6k4hhveefcd4dlp4kc52ti

Traffic-Balanced Topology-Aware Multiple Routing Adjustment for Throttled 3D NOC Systems

Kun-Chih Chen, Shu-Yen Lin, Hui-Shun Hung, An-Yeu Wu
2012 2012 IEEE Workshop on Signal Processing Systems  
The thermal issue is important for 3D Network-on-Chip systems.  ...  However, it still suffers significant traffic congestion in the bottom chip layer due to the insufficient lateral path diversities.  ...  [13] and 1-dimensional Regional Congestion Awareness (RCA) [14] .  ... 
doi:10.1109/sips.2012.13 dblp:conf/sips/ChenLHW12 fatcat:52dfp6dq4rhh7pfb2qi3syclp4

Traffic- and Thermal-aware Adaptive Beltway Routing for three dimensional Network-on-Chip systems

Kun-Chih Chen, Che-Chuan Kuo, Hui-Shun Hung, An-Yeu Andy Wu
2013 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)  
In this paper, a Traffic-and Thermal-aware Adaptive Beltway Routing (TTABR) is proposed to balance both the distribution of the traffic and temperature in the network.  ...  The distribution of traffic and temperature in a highperformance three dimensional Network-on-Chip (3D NoC) system become more unbalanced because of chip stacking and applied minimal routing algorithms  ...  INTRODUCTION As the complexity of System-on-Chip (SoC) grows with Moore's law, the three dimensional Network-on-Chip (3D NoC) is promising to reduce wire complexity problems and provide larger bandwidth  ... 
doi:10.1109/iscas.2013.6572182 dblp:conf/iscas/ChenKHW13 fatcat:h67jvr3k2fgs5b2v2sejn666wq

Q-Function-Based Traffic- and Thermal-Aware Adaptive Routing for 3D Network-on-Chip

Seung Chan Lee, Tae Hee Han
2020 Electronics  
The 3D network-on-chip (NoC), a combination of die-stacking technology and systematic on-chip communication infrastructure, suffers from increased thermal density and unbalanced heat dissipation across  ...  Subsequently, Q-learning-based decision making (through the learning of regional traffic information) is deployed for performance improvement with more balanced inter-layer traffic.  ...  Initially, a 2D network-on-chip (NoC) was proposed for mitigating the complexities in the on-chip interconnection network [3] .  ... 
doi:10.3390/electronics9030392 fatcat:j343dxjjiffu7hydih7qj26pmy

Thermal-aware Dynamic Buffer Allocation for Proactive routing algorithm on 3D Network-on-Chip systems

Yuan-Sheng Lee, Hsien-Kai Hsin, Kun-Chih Chen, En-Jui Chang, An-Yeu Andy Wu
2014 Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test  
Based on the proposed PTDBA, we can redistribute traffic load by means of buffer occupancy.  ...  In addition, we reduce the frequency of packets switching in overheated router regions. By doing so, we can slow down the rate of temperature increment.  ...  INTRODUCTION As the complexity of System-on-Chip ( SoC) grows with the advance technology scaling, three-dimensional Network-on-Chip (3D NoC) emerges as a scalable on-chip communication paradigm for integrating  ... 
doi:10.1109/vlsi-dat.2014.6834908 dblp:conf/vlsi-dat/LeeHCCW14 fatcat:kbyvig3p4fgmjc3kqqs2v2azma

ACO-based fault-aware routing algorithm for Network-on-Chip systems

Chia-An Lin, Hsien-Kai Hsin, En-Jui Chang, An-Yeu Andy Wu
2013 SiPS 2013 Proceedings  
With the shrinking size of circuits and the scaling of Network-on-Chip (NoC), the on-chip components will have a higher chance to fail.  ...  Also, this routing method improves the reachable packet ratio to 99.50%-99.98% and the distribution of traffic load in the faulty network.  ...  INTRODUCTION For Multiprocessor System-on-Chip (MPSoC), Network-on-Chip (NoC) provides flexible, reliable, and scalable on-chip communication architecture and has advantages of low latency and high throughput  ... 
doi:10.1109/sips.2013.6674530 dblp:conf/sips/LinHCW13 fatcat:d7mfdmby5nd2vkk3dvcwssb7km

A novel low-latency regional fault-aware fault-tolerant routing algorithm for Wireless NoC

Yiming Ouyang, Qi Wang, Mengxuan Ru, Huaguo Liang, Jianhua Li
2020 IEEE Access  
In this paper, we propose a novel fault-tolerant routing algorithm based on regional fault-aware techniques for link failures in WiNoC.  ...  INDEX TERMS Wireless network-on-chip, fault-tolerant routing, fault-aware mechanism. This work is licensed under a Creative Commons Attribution 4.0 License.  ...  The additional congestion awareness scheme balances the network load in one faulty network.  ... 
doi:10.1109/access.2020.2970215 fatcat:3j45mlayznez5bt4oethlo7b6y

Traffic-and thermal-aware routing for throttled three-dimensional Network-on-Chip systems

Shu-Yen Lin, Tzu-Chu Yin, Hao-Yu Wang, An-Yeu Wu
2011 Proceedings of 2011 International Symposium on VLSI Design, Automation and Test  
Network-on-Chip (NoC) has been viewed as a practical communication infrastructure in 3D IC.  ...  TTAR can balance the network traffic and detour the throttled tiles.  ...  consumption, and thermal profile of on-chip networks.  ... 
doi:10.1109/vdat.2011.5783639 fatcat:vftpcyswdzedthswwt227qitkq

Proactive Thermal-Budget-Based Beltway Routing algorithm for thermal-aware 3D NoC systems

Che-Chuan Kuo, Kun-Chih Chen, En-Jui Chang, An-Yeu Wu
2013 2013 International Symposium on System on Chip (SoC)  
Besides, for high-performance requirement, the minimal adaptive routing algorithms result in unbalanced traffic load and worse temperature distribution in the system.  ...  The thermal problems of three-dimensional Network on-Chip (3D NoC) systems become more serious because of die stacking.  ...  INTRODUCTION As the complexity of System-on-Chip (SoC) grows with the continuing advances in technology scaling, three-dimensional Network-on-Chip (3D NoC) emerges as a scalable on-chip communication paradigm  ... 
doi:10.1109/issoc.2013.6675281 dblp:conf/issoc/KuoCCW13 fatcat:mirwa7qqfrfmtamby3ttzauafu

ParRouting: An Efficient Area Partition-Based Congestion-Aware Routing Algorithm for NoCs

Juan Fang, Di Zhang, Xiaqing Li
2020 Micromachines  
Regional congestion awareness routing algorithms have shown great potential in improving the performance of NoC.  ...  Routing algorithms is a key factor that determines the performance of NoC (Networks-on-Chip) systems.  ...  The authors would like to thank the reviewers for their efforts and for providing helpful suggestions that have led to several important improvements in our work.  ... 
doi:10.3390/mi11121034 pmid:33255727 fatcat:y3n7emrcmzfdjlph2zmiot3ipm

Collaborative thermal- and traffic-aware adaptive routing scheme for 3D Network-on-Chip systems

Lili Shen, Ning Wu, Gaizhen Yan, Fen Ge
2021 IEICE Electronics Express  
region.  ...  Adaptive routing can alleviate the thermal issues, but current routing algorithms either suffer from the thermal balance or traffic congestion.  ...  Introduction With the advance in the semiconductor technology, the Network-on-Chip (NoC) as an efficient solution for multicore chips has attracted wide attention [1, 2] .  ... 
doi:10.1587/elex.18.20200425 fatcat:eumvy7tsg5eyvbc3iasz5n4nm4

Congestion-Aware Multistage Packet-Switch Architecture for Data Center Networks

Fadoua Hassen, Lotfi Mhamdi
2016 2016 IEEE Global Communications Conference (GLOBECOM)  
Yet, it is still difficult to predict loads fluctuation and congestion spikes in the network switching fabric.  ...  In this paper, we propose a flexible design of a scalable multistage switch with crossconnected UniDirectional Network-on-Chip based central blocs (UDNs).  ...  In [19] , Smiljanić suggested some load-balancing algorithms for a three-stage Clos network.  ... 
doi:10.1109/glocom.2016.7841681 dblp:conf/globecom/HassenM16 fatcat:sc5dndargzg7fcdpbklax3j7xu

Thermal-aware Dynamic Weighted Adaptive Routing Algorithm for 3D Network-on-Chip

Muhammad Kaleem, Ismail Fauzi Bin Isnin
2021 International Journal of Advanced Computer Science and Applications  
Network-on-Chip NoC based systems have severe thermal problems due to the stacking of dies and disproportionate cooling efficiency of different layers.  ...  In this work a novel thermal aware dynamic weighted adaptive routing algorithm has been proposed that takes traffic and temperature information into account and prevents packets being routed across congested  ...  The authors appreciate greatly for the support.  ... 
doi:10.14569/ijacsa.2021.0121139 fatcat:mjry25fpcjhrzjcyaelkdlcd6i

GCA: Global congestion awareness for load balance in Networks-on-Chip

Mukund Ramakrishna, Paul V. Gratz, Alexander Sprintson
2013 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS)  
This paper proposes a new, light-weight, adaptive routing algorithm for on-chip routers based on global link state and congestion information, Global Congestion Awareness (GCA).  ...  In particular GCA outperforms local adaptive routing by 26%, Regional Congestion Awareness (RCA) by 15%, and a recent competing adaptive routing algorithm, DAR, by 8% on average on realistic workloads.  ...  CONCLUSION In this paper we present a novel routing adaptive routing technique for on-chip networks, which aims to make routing decisions based on global knowledge of network state, Global Congestion Awareness  ... 
doi:10.1109/nocs.2013.6558405 dblp:conf/nocs/RamakrishnaGS13 fatcat:duvmkmxz2rfwzkx3rt77bzuj64
« Previous Showing results 1 — 15 out of 2,672 results