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Design and implementation of sigma–delta digital to analog converter

Sonika, D D Neema, R N Patel
2018 Sadhana (Bangalore)  
One of the drawbacks in a multi-bit cascaded sigma delta modulator is the un-cancelled noise and the nonlinearity error.  ...  In order to achieve high-order noise shaping without the stability problem inherent in the design of higher order loop, cascade structure may be used.  ...  Such circuits reduce the circuit complexity. This section shows the proposed cascaded digital noise shaping loop using error feedback structure.  ... 
doi:10.1007/s12046-018-0868-0 fatcat:szn3cvdztbbn5lwn2bn3oadroq

Oversampling A/D And D/A Converters

Gabor C. Temes
1998 Zenodo  
The preservation of the inband spectrum in spite of this truncation is made possible by the loop filter, which is (for baseband signal conversion) a low-pass filter containing a cascade of accumulators  ...  In dual truncation, there are two truncations performed: one is a single-bit truncation of the signal, the other a multi-bit truncation of the quantization error due to the 1-bit truncation.  ... 
doi:10.5281/zenodo.36719 fatcat:w7bgabeygzacxdpy5rwzhxblty

A Numerically Controlled Oscillator with a Fine Phase Tuner and a Rounding Processor

In-Gi Lim, Whan-Woo Kim
2004 ETRI Journal  
Logic simulation results of the NCO using these techniques show that the noise spectrum and mean square error (MSE) for eight output bits of a 3.125 MHz sine waveform are reduced by 8.68 dB and 5.5 dB,  ...  In addition, the proposed rounding processor reduces the effects of phase truncation on the output spectrum.  ...  The phase truncation (the difference of L-M) for reducing the size of the LUT yields the phase error.  ... 
doi:10.4218/etrij.04.0204.0026 fatcat:yp644tziznazbex2tacf5situe

Delta-Sigma Modulation in Direct Digital Frequency Synthesis

Dayu Yang, Weining Ni, Foster F. Dai, Yin Shi, Richard C. Jaeger
2006 IEEE Custom Integrated Circuits Conference 2006  
∆Σ modulators such as MASH, feedforward, feedback and error feedback have been implemented in both phase and frequency domains in a CMOS DDS.  ...  In order to reduce the ROM size, one can either truncate the phase accumulator output from L bits to W bits.  ...  to an integer and the frequency error due to frequency word truncation is pe Fr Fr B B B = ⋅ − 2 2 2 (11) As shown in (10), the phase accumulator size can be reduced to W bits if the input frequency word  ... 
doi:10.1109/cicc.2006.320905 dblp:conf/cicc/YangNDSJ06 fatcat:tw2cdgzfc5bx5c2uc6jjvpqkzq

Ribosomal Elongation Factor 4 Promotes Cell Death Associated with Lethal Stress

Liping Li, Yuzhi Hong, Gan Luan, Michael Mosel, Muhammad Malik, Karl Drlica, Xilin Zhao
2014 mBio  
The detrimental action of EF4 required transfer-messenger RNA (tmRNA, which tags truncated proteins for degradation and is known to be inhibited by EF4) and the ClpP protease.  ...  Inhibition of a protective, tmRNA/ClpP-mediated degradative activity would allow truncated proteins to indirectly perturb the respiratory chain and thereby provide a potential link between EF4 and ROS.  ...  That elevates the accumulation of truncated proteins.  ... 
doi:10.1128/mbio.01708-14 pmid:25491353 pmcid:PMC4324249 fatcat:xnibns6wbncihblbikgg33coii

A Direct Digital Frequency Synthesizer With Fourth-Order Phase Domain$DeltaSigma$Noise Shaper and 12-bit Current-Steering DAC

F.F. Dai, W. Ni, S. Yin, R.C. Jaeger
2006 IEEE Journal of Solid-State Circuits  
The 16 interpolator is used to reduce the phase truncation error and the ROM size.  ...  The measured DDFS spurious-free dynamic range (SFDR) is greater than 78 dB using a reduced ROM with 8-bit phase, 12-bit amplitude resolution and a size of 0.09 mm 2 .  ...  DDFS Architecture Using Phase Domain Noise Shapers Various topologies can be used to reduce the phase truncation errors in the proposed DDFS architecture.  ... 
doi:10.1109/jssc.2006.870749 fatcat:q73m5gxnvzbjrbt23p7e3q2feq

Arbitrary Waveform DDFS Utilizing Chebyshev Polynomials Interpolation

A. Ashrafi, R. Adhami, L. Joiner, P. Kaveh
2004 IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications  
The accuracy of the output signal depends on the degree of the reconstructing polynomial, the number of subsections, the wordlength of the truncated phase accumulator output, as well as the word length  ...  This digital system contains digital multipliers and adders to simulate the desired polynomial, as well as a phase accumulator for generating the digital time base.  ...  Truncation Error The major source of error in approximating each section of by the Chebyshev polynomials is the truncation error associated with (2) .  ... 
doi:10.1109/tcsi.2004.832802 fatcat:g5kinr53ozd27g4o4tbqsiccfa

High performance DA-Based DWT with High Accuracy ErrorCompensated Adder Tree

2013 IOSR Journal of VLSI and Signal processing  
In this brief, by operating the shifting and addition in parallel, an error-compensated adder-tree (ECAT) is proposed to deal with the truncation errors and to achieve low-error and high-throughput discrete  ...  Image compression is one of the major image processing techniques that are widely used in medical, automotive, consumer and military applications.  ...  Simulation Results Error Compensated Circuit which will helpful in reducing truncation error and its design shown in fig. 7(a) .  ... 
doi:10.9790/4200-0315660 fatcat:nf2hgs4lxzdqnpynsxolmqy65m

Efficient Hardware Accelerators for the Computation of Tchebichef Moments

Kah-Hyong Chang, Raveendran Paramesran, Barmak Honarvar Shakibaei Asli, Chern-Loon Lim
2012 IEEE transactions on circuits and systems for video technology (Print)  
Using a direct method may involve a critically high operating frequency.  ...  Among the features introduced are: a data-shifting means, a filter load distribution method, a reduced set of column filters, sectioned left shifters, a double-line buffer, time-multiplexed and pipelined  ...  Acknowledgment The authors wish to express their heartfelt gratitude to the reviewers for the useful comments and suggestions.  ... 
doi:10.1109/tcsvt.2011.2163980 fatcat:2i4c4mwdj5b5jasfjsnm266gti

Adaptive Algorithms Based Cross Talk Reduction Techniques Using Efficient Multipliers in VerilogHDL

Devi Sivaraman, Neeraj Kr. Shukla
2014 International Journal of Engineering and Technology  
The hardware utilization of a filter using truncated multiplier is efficient as there is a reduction of 73.64% in hardware with respect to FFT method while with normal cascade network multiplier the reduction  ...  This paper discusses the various algorithms and techniques used to reduce cross talk with their trade-offs.  ...  DESIGN SIMULATION AND ANALYSIS We are revisiting and comparing the different multipliers like cascade network, tree network, booth algorithm, pipelined architecture [8] and truncated structure [9] -  ... 
doi:10.7763/ijet.2014.v6.753 fatcat:mu7cgr3btnbf3m3gqd4diddnf4

YihE Kinase Is a Central Regulator of Programmed Cell Death in Bacteria

Angella Dorsey-Oresto, Tao Lu, Michael Mosel, Xiuhong Wang, Tal Salz, Karl Drlica, Xilin Zhao
2013 Cell Reports  
Rifampicin inhibits transcription initiation, which would deplete RNA substrates for MazF-mediated RNA cleavage, reduce the mRNA and protein truncation that triggers the Cpx-Arc-ROS cascade (Kohanski  ...  ., 1997) , which would in turn downregulate MazF function and reduce the generation of truncated mRNAs and proteins.  ... 
doi:10.1016/j.celrep.2013.01.026 pmid:23416055 pmcid:PMC3594398 fatcat:xlavobj5rbeubhpfpevrxrdkiy

Oxidatively Truncated Phospholipids Are Required Agents of Tumor Necrosis Factor α (TNFα)-induced Apoptosis

Calivarathan Latchoumycandane, Gopal K. Marathe, Renliang Zhang, Thomas M. McIntyre
2012 Journal of Biological Chemistry  
Ectopic GPx4 overcame this, reduced peroxidized phospholipid accumulation, blocked Az-PC accumulation, and prevented death.  ...  Az-PC accumulation without affecting phospholipid peroxidation.  ...  cascade (23, 24) .  ... 
doi:10.1074/jbc.m111.300012 pmid:22433871 pmcid:PMC3366783 fatcat:qi5nkbgui5a3lkxf5quo23lozm

An economical class of digital filters for decimation and interpolation

E. Hogenauer
1981 IEEE Transactions on Acoustics Speech and Signal Processing  
The number of cascaded integratorcomb pairs is chosen to meet design requirements for aliasing or imaging error.  ...  They require no multipliers and use limited storage making them an economical alternative to conventional implementations for certain applications.  ...  A conventional implementation consists of a cascade of N stages each requiring Rh storage registers and one accumulator.  ... 
doi:10.1109/tassp.1981.1163535 fatcat:iijsb4a3wzga5lijfg44kv7wsa

Area and energy efficient shift and accumulator unit for object detection in IoT applications

Anakhi Hazarika, Soumyajit Poddar, Moustafa M. Nasralla, Hafizur Rahaman
2021 Alexandria Engineering Journal  
The Multiply-accumulate (MAC) operations, which are used repeatedly in the convolution layers of CNN, hold extreme computational complexity.  ...  In this paper, we have designed an approximate MAC architecture, termed Shift and Accumulator Unit (SAC), for the error-resilient CNN based object detection algorithm targeting embedded platforms.  ...  MT-CNN approach uses a classical feature-based cascade classifier for face detection. Cascaded CNNs require high computational expense for bounding box calibration in the training stage.  ... 
doi:10.1016/j.aej.2021.04.099 fatcat:xoweyhht7nbhfjxconofvavscm

MEGA-MAC: A Merged Accumulation based Approximate MAC Unit for Error Resilient Applications

Vishesh Mishra, Sparsh Mittal, Saurabh Singh, Divy Pandey, Rekha Singhal
2022 Proceedings of the Great Lakes Symposium on VLSI 2022  
This paper proposes a novel merged-accumulation-based approximate MAC (multiply-accumulate) unit, MEGA-MAC, for accelerating error-resilient applications.  ...  ., a MEGA-MAC unit with a chunk size of 6 bits, operating on 8-bit input operands) reduces the power-delay-product (PDP) by 49.4%, while incurring a mean error percentage of only 4.2%.  ...  Truncation reduces the width of input operands, allowing the use of a narrow adder and multiplier, thus saving area and power.  ... 
doi:10.1145/3526241.3530384 fatcat:wda5zb5xqjdbxj5uekhtuchaue
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