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A Dynamically Reconfigurable Device [chapter]

Minoru Watanabe
2010 Advances in Solid State Circuit Technologies  
Currently, field programmable gate arrays (FPGAs) are widely used for many applications (1)-(3). Such FPGAs are always implemented with an external ROM.  ...  As with other rapidly reconfigurable devices, optically reconfigurable gate arrays (ORGAs) have been developed, which combine a holographic memory and an optically programmable gate array VLSI, as portrayed  ...  Readers will be able to familiarize themselves with the latest technologies in the various fields.  ... 
doi:10.5772/8623 fatcat:k2csuwsiovef7akk6pm6cxkeoq

Role of Reconfigurable Devices in High Performance Computing System

Anant Mittal, Sunil Kr. Singh, Asmita Goyal
2012 International Journal of Computer Applications  
Advancements in the field of reconfigurable computing hardware and software provide greater design flexibility and reduced cost.  ...  ASIC are application specific architectures with high performance and limited resource requirement but lacks in flexibility.  ...  Field Programmable Gate Arrays (FPGAs) Field Programmable Gate Arrays are very useful in prototyping ASICs as they are designed very much like ASIC.  ... 
doi:10.5120/5554-7627 fatcat:z7pqvc74y5dtvb7fogrdbvzlqy

Fault Tolerance of Programmable Devices [chapter]

Minoru Watanabe
2010 Parallel and Distributed Computing  
In the earliest use of field programmable gate arrays (FPGAs) (3)-(5), FPGAs were anticipated as defect-tolerant devices that accommodate inclusion of defective areas on the gate array because of their  ... Prototype ORGA-VLSI chip The basic functionality of an ORGA-VLSI is fundamentally identical to that of currently available field programmable gate arrays (FPGAs).  ...  Particularly, the topics that are addressed are programmable and reconfigurable devices and systems, dependability of GPUs (General Purpose Units), network topologies, cache coherence protocols, resource  ... 
doi:10.5772/9451 fatcat:guq57wdpvffltgq7v4yjg4a7la

Programmable nano-switch array using SiN/GaAs interface traps on a GaAs nanowire network for reconfigurable BDD logic circuits

Yuta Shiratori, Kensuke Miura, Seiya Kasai
2011 Microelectronic Engineering  
We experimentally demonstrated correct and stable operation of a four-input reconfigurable BDD circuit integrating the switch array with HCl treatment. *  ...  Programmable nano-switch arrays on GaAs-based nanowire networks are investigated for a reconfigurable binary-decision-diagram (BDD) logic circuit.  ...  We successfully fabricated a four-input reconfigurable BDD circuit integrating the switch array and demonstrated correct and stable operation of the circuit with HCl treatment process.  ... 
doi:10.1016/j.mee.2010.12.007 fatcat:if5pnbnko5cqlcirxfm737edye

Expanding OpenFlow Capabilities with Virtualized Reconfigurable Hardware

Stuart Byma, Naif Tarafdar, Talia Xu, Hadi Bannazadeh, Alberto Leon-Garcia, Paul Chow
2015 Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '15  
• Goal: Expand OpenFlow with versatility of software and performance of reconfigurable hardware Virtualized Reconfigurable Hardware • Infrastructure in place virtualizing physical FPGAs into multiple  ...  blacklisted packets • Blacklisted headers stored in Content Addressable Memory • Processed in Line-Rate April 15, 2015 High-Performance Reconfigurable Computing Group · University of Toronto Conclusion  ...  Application: VxLAN Implementation • Packets encapsulated by VFR and decapsulated by VFR • Processed in Line-Rate  ... 
doi:10.1145/2684746.2689086 dblp:conf/fpga/BymaTXBLC15 fatcat:63uzgcjwznhrhcmbueilvpnj7m

Advancements on crossbar-based nanoscale reconfigurable computing Platforms

Bao Liu
2010 2010 53rd IEEE International Midwest Symposium on Circuits and Systems  
arrays and programmable vias.  ...  Experimental results based on Stanford compact CNFET model show that proper device integration, cell granularity, and logic family (e.g., reconfigurable CMOS static logic in floating-gate transistor arrays  ...  Fig. 2 . 2 A n-type reconfigurable double-gate carbon-nanotube field-effect transistor (RDG-CNFET) (top) and its compact model (bottom).  ... 
doi:10.1109/mwscas.2010.5548550 fatcat:tety4q47prhqrfhgef3xqqgyny

Energy-Efficient Discrete Signal Processing with Field Programmable Analog Arrays (FPAAs)

Yu Bai, Mingjie Lin
2015 Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '15  
Our Idea Probabilistic-Base Computing Field-Programmable Analog Array + = n Prototyping n Resource Constraints n Noise Sensitivity n  ...  Limited Resource Type: No Universal Logic Gate Set, No LUT ….  ... 
doi:10.1145/2684746.2689078 dblp:conf/fpga/YuL15 fatcat:e7v7d2nenbaz3pmnlleyxhgxhm

Performance Evaluation of Hybrid Reconfigurable Computing Architecture over Symmetrical FPGA

Sunil Kr Singh
2012 International Journal of Embedded Systems and Applications  
The two main types of programmable logic devices, field-programmable gate arrays (FPGA) based on LUTs technology and complex programmable logic device (CPLD) based on PLAs technology.  ...  The purpose of this paper is to evaluate the performance of HRCA over regular FPGA device for reconfigurable computing by mixing of Look up tables (LUTs) and Programmable logic arrays (PLAs) architecture  ...  Reconfigurable computing devices agree to assemble both requirements i.e. flexibility and performance. Reconfigurable systems have evolved from Field Programmable Gate Arrays (FPGAs).  ... 
doi:10.5121/ijesa.2012.2312 fatcat:ntyrmdbizza6pl3q546imtgytu

Temporal partitioning for partially-reconfigurable-field-programmable gate [chapter]

John Spillane, Henry Owen
1998 Lecture Notes in Computer Science  
The recent introduction of partially-reconfigurable-field-programmable gate arrays (PRFPGAs) has led to the need for new algorithms suited for use with these devices.  ...  Although algorithms developed for use with field-programmable gate arrays can be applied to PRFPGAs, these algorithms do not take advantage of features available in these new devices.  ...  Introduction Partitioning for field-programmable gate arrays (FPGAs) refers to the process of splitting a large circuit into smaller sub-circuits.  ... 
doi:10.1007/3-540-64359-1_670 fatcat:zzitd24by5fvllu4owil6rhrhq

Emerging application domains

Jason H. Anderson
2009 Proceeding of the ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '09  
Communications infrastructure, data processing and industrial electronics are the cornerstone application areas for programmable logic today. But what are the application domains of tomorrow?  ...  What nascent application areas could explode the growth of programmable logic usage and expand the programmable market?  ...  ; B.7.1 [Integrated Circuits]: Types and Design Styles -Algorithms implemented in hardware General Terms Design, Algorithms Keywords Field-Programmable Gate Array, FPGA, applications, reconfigurable  ... 
doi:10.1145/1508128.1508129 dblp:conf/fpga/Anderson09 fatcat:qti6icykhzhhjfszrhm6yprmiy

Field Programmable Processor Array: Reconfigurable Computing for Space

Gregory W. Donohoe, David M. Buehler, K. Joseph Hass, William Walker, Pen-Shu Yeh
2007 2007 IEEE Aerospace Conference  
The Field Programmable Processor Array (FPPA) is a reconfigurable processor chip developed for NASA for high-throughput, low-power on-board processing of streaming data.  ...  The FPPA implements a synchronous dataflow computational model, with 16 on-board processing elements.  ...  Much early work in reconfigurable computing focused on Field Programmable Gate Arrays (FPGAs).  ... 
doi:10.1109/aero.2007.353105 fatcat:eywqgsx2wvgtzc6u23fkm3fdii

Towards field-programmable photonic gate arrays [article]

D. Perez-Lopez, A. López-Hernandez, A. Macho, P. Das Mahapatra, J. Capmany
2020 arXiv   pre-print
We review some of the basic principles, fundamentals, technologies, architectures and recent advances leading to thefor the implementation of Field Programmable Photonic Field Arrays (FPPGAs).  ...  Reconfigurability is now commonplace in electronics components, circuits, and systems with the Field Programmable Gate Array (FPGA) device being one of the best-known examples [2] .  ...  The Field Programmable Photonic Gate Array (FPPGA) [24] is an integrated photonic device/subsystem that operates in a similar way to a Field Programmable Gate array in electronics.  ... 
arXiv:2002.09681v1 fatcat:7gtbvqx7sfffhcjjfiynghf7vm

Reconfigurable Computing A review of the technology and its architecture

Gagandeep Singh
2013 IOSR Journal of VLSI and Signal processing  
Most commonly and widely used high speed computing fabrics deployed in reconfigurable computing are field-programmable gate arrays (FPGAs).  ...  This paper illustrates the architecture used in reconfigurable computing and also demonstrates the advantages of using reconfigurable computing design over conventional ASIC or a simple microprocessor  ...  FIELD PROGRAMMABLE GATE ARRAYS The Field-Programmable Gate Array (FPGA) is the computational unit for RC systems. The FPGA is a regularly tiled 2-D array of logic blocks.  ... 
doi:10.9790/4200-0340814 fatcat:b57img7vdrcfjic2fp6om6u5c4

An optically differential reconfigurable gate array with a holographic memory

M. Watanabe, M. Miyano, F. Kobayashi
2006 Proceedings 20th IEEE International Parallel & Distributed Processing Symposium  
We developed an Optically Differential Reconfigurable Gate Array (ODRGA-VLSI) with no overhead and fast reconfiguration capability.  ...  Experimental results of the reconfiguration procedure and circuit performance on a gate array are also presented.  ...  This research was supported by the project of development of high-density optically and partially reconfigurable gate arrays under Japan Science and Technology Agency.  ... 
doi:10.1109/ipdps.2006.1639478 dblp:conf/ipps/WatanabeMK06 fatcat:wye7aenuifazxedlpytlmlqdcy

Hardware Cost Analysis for Weakly Programmable Processor Arrays

Dmitrij Kissler, Frank Hannig, Alexey Kupriyanov, Jurgen Teich
2006 2006 International Symposium on System-on-Chip  
In this paper technology-independent hardware cost analysis for a new class of highly parameterizable coarse-grained reconfigurable architectures called weakly programmable processor arrays is performed  ...  The inherent parallelism in these application fields has to be reflected at the hardware level to achieve high performance.  ...  Together with an extremely flexible interconnect network of 1 bit granularity, look-up tables constitute such modern fine-grained reconfigurable architectures, like Field Programmable Gate Arrays (FPGA  ... 
doi:10.1109/issoc.2006.321996 dblp:conf/issoc/KisslerHKT06 fatcat:ira6n7n3qfac7ib5j7vd7gszgm
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