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Spike pattern recognition using artificial neuron and spike-timing-dependent plasticity implemented on a multi-core embedded platform

F. Grassia, T. Levi, E. Doukkali, T. Kohno
2017 Artificial Life and Robotics  
The objective of this work is to use a multi-core embedded platform as computing architectures for neural applications relevant to neuromorphic engineering: e.g. robotics, artificial and spiking neural  ...  networks.  ...  Spike pattern recognition using artificial neuron and Spike-Timing-Dependent Plasticity implemented on a multi-core embedded platform ACKNOWLEDGMENTS This work was financially supported by the "PHC Sakura  ... 
doi:10.1007/s10015-017-0421-y fatcat:i435ocl35jekfiogwpreyf524m

SNAVA—A real-time multi-FPGA multi-model spiking neural network simulation architecture

Athul Sripad, Giovanny Sanchez, Mireya Zapata, Vito Pirrone, Taho Dorta, Salvatore Cambria, Albert Marti, Karthikeyan Krishnamourthy, Jordi Madrenas
2018 Neural Networks  
Spiking Neural Networks (SNN) for Versatile Applications (SNAVA) simulation platform is a scalable and programmable parallel architecture that supports realtime, large-scale, multi-model SNN computation  ...  This has been achieved by using a specialpurpose Processing Elements (PEs) for computing SNNs, and analyzing and customizing the instruction set according to the processing needs to achieve maximum performance  ...  ., neural or synaptic offline or 445 dynamic real-time analysis). For real-time analysis, all the set up files generated by SN AV A Conf are loaded.  ... 
doi:10.1016/j.neunet.2017.09.011 pmid:29054036 fatcat:qair4swatvh3rlndbbxh76ootm

Neuromorphic architectures for spiking deep neural networks

Giacomo Indiveri, Federico Corradi, Ning Qiao
2015 2015 IEEE International Electron Devices Meeting (IEDM)  
The deep network comprises an event-based convolutional stage for feature extraction connected to a spike-based learning stage for feature classification.  ...  We present a full custom hardware implementation of a deep neural network, built using multiple neuromorphic VLSI devices that integrate analog neuron and synapse circuits together with digital asynchronous  ...  In general, these types of neuromorphic architectures are useful for real-time sensory processing applications [3] and for being integrated in embedded systems.  ... 
doi:10.1109/iedm.2015.7409623 fatcat:4olpx74x55gv7i3edrcslowbze

A Hardware/Software Framework for Real-Time Spiking Systems [chapter]

Matthias Oster, Adrian M. Whatley, Shih-Chii Liu, Rodney J. Douglas
2005 Lecture Notes in Computer Science  
It is desirable to explore these functions in physical neural network systems operating in real-time.  ...  This new approach incorporating feedback from active software agents to aVLSI hardware allows the exploration of a large variety of dynamic real-time spiking network models by adding the flexibility of  ...  Acknowledgments We would like to acknowledge Vittorio Dante and Paolo Del Giudice (Istituto Superiore di Sanità, Rome, Italy) for the original design of the PCI-AER board, and Gerd Dietrich and other members  ... 
doi:10.1007/11550822_26 fatcat:hmwcgg2q5jcfzpxprcuw6esgjm

Biomimetic neural network for modifying biological dynamics during hybrid experiments

Matthieu Ambroise, Stefano Buccelli, Filippo Grassia, Antoine Pirog, Yannick Bornat, Michela Chiappalone, Timothée Levi
2017 Artificial Life and Robotics  
We adopted a neuromorphic board which is able to perform real-time event detection and trigger an electrical stimulation of the BNN.  ...  Here we present closed-loop biohybrid experiment using in vitro Biological Neuronal Network (BNN) with an Artificial Neural Network (ANN) implemented in a neuromorphic board.  ...  Architecture of the Spiking Neural Network The architecture of the network implementation is based on RAM blocks (that store all parameters needed to define a network), two computation cores (one used  ... 
doi:10.1007/s10015-017-0366-1 fatcat:aehudp76nnh33o7ahm4qlzrnva

Programmable Spike-Timing-Dependent Plasticity Learning Circuits in Neuromorphic VLSI Architectures

Mostafa Rahimi Azghadi, Saber Moradi, Daniel B. Fasnacht, Mehmet Sirin Ozdas, Giacomo Indiveri
2015 ACM Journal on Emerging Technologies in Computing Systems  
Hardware implementations of spiking neural networks offer promising solutions for computational tasks that require compact and low-power computing technologies.  ...  As these solutions depend on both the specific network architecture and the type of learning algorithm used, it is important to develop spiking neural network devices that offer the possibility to reconfigure  ...  performance at runtime on real-time custom analog/ digital hardware, and implementing robust perceptron-like neural network to carry out real-time classifications tasks.  ... 
doi:10.1145/2658998 fatcat:2qi46cgx4nbxtpyqqyngzz5d64

Integration of nanoscale memristor synapses in neuromorphic computing architectures

Giacomo Indiveri, Bernabé Linares-Barranco, Robert Legenstein, George Deligeorgis, Themistoklis Prodromakis
2013 Nanotechnology  
Conventional neuro-computing architectures and artificial neural networks have often been developed with no or loose connections to neuroscience.  ...  block for implementing brain-inspired probabilistic computing paradigms that are robust to variability and fault-tolerant by design.  ...  Acknowledgment This work was supported by the European CHIST-ERA program, via the "Plasticity in NEUral Memristive Architectures" (PNEUMA) project.  ... 
doi:10.1088/0957-4484/24/38/384010 pmid:23999381 fatcat:6isdvp5f4vhgddskpmlx2xq5ra

Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100× Speedup in Time-to-Solution and ~100,000× Reduction in Energy-to-Solution

Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Filipp Akopyan, Jun Sawada, John V. Arthur, Paul A. Merolla, Pallab Datta, Marc Gonzalez Tallada, Brian Taba, Alexander Andreopoulos, Arnon Amir, Steven K. Esser (+26 others)
2014 SC14: International Conference for High Performance Computing, Networking, Storage and Analysis  
Breaking path with the von Neumann architecture, TrueNorth is a 4,096 core, 1 million neuron, and 256 million synapse brain-inspired neurosynaptic processor, that consumes 65mW of power running at real-time  ...  network simulations.  ...  networks are deployed on our real-time and energy-efficient neural-processor, TrueNorth.  ... 
doi:10.1109/sc.2014.8 dblp:conf/sc/CassidyAASAMDTTAAEKAHBMBBMSCIMIMNVGNLAFJFRMM14 fatcat:6ujlnfomhzd3bcyfxyjj25pwgm

Computing spike-based convolutions on GPUs

J.M. Nageswaran, N. Dutt, Yingxue Wang, T. Delbrueck
2009 2009 IEEE International Symposium on Circuits and Systems  
In our experiment we interface a 128times128 pixel AER vision sensor to a spiking neural network implemented on a GPU for real-time convolution-based nonlinear feature extraction with convolution kernel  ...  In our experiment we interface a 128x128 pixel AER vision sensor to a spiking neural network implemented on a GPU for real-time convolution-based nonlinear feature extraction with convolution kernel sizes  ...  We also thank NVIDIA for donating the 9800GX2 and GTX280 boards under the Professor Partnership Program.  ... 
doi:10.1109/iscas.2009.5118157 dblp:conf/iscas/NageswaranDWD09 fatcat:oonndpkk7veoppbk4vyiclwmbq

PAX: A mixed hardware/software simulation platform for spiking neural networks

S. Renaud, J. Tomas, N. Lewis, Y. Bornat, A. Daouzli, M. Rudolph, A. Destexhe, S. Saïghi
2010 Neural Networks  
max 300 words) Many hardware-based solutions now exist for the simulation of bio-like neural networks.  ...  The neurons and networks are configurable, and are computed in "biological real time" by which we mean that the difference between simulated time and simulation time is guaranted lower than 50µs.  ...  Figure 11 : 11 Structure and I/O for a hardware neural element. Figure 12 : 12 Internal architecture of the full-custom PCI board.  ... 
doi:10.1016/j.neunet.2010.02.006 pmid:20434309 fatcat:2dtewzdc3zh3tatompvknggmmq

Artificial neural networks in hardware: A survey of two decades of progress

Janardan Misra, Indranil Saha
2010 Neurocomputing  
Hardware neural network Neurochip Parallel neural architecture Digital neural design Analog neural design Hybrid neural design Neuromorphic system FPGA based ANN implementation CNN implementation RAM based  ...  We specifically discuss, in detail, neuromorphic designs including spiking neural network hardware, cellular neural network implementations, reconfigurable FPGA based implementations, in particular, for  ...  [221] also present real-time simulation architecture for networks of Hodgkin-Huxley spiking neurons using a mix of analog circuits and a host computer.  ... 
doi:10.1016/j.neucom.2010.03.021 fatcat:regzu6sshvekzd5wxcuaiytgqu

A Review of Algorithms and Hardware Implementations for Spiking Neural Networks

Duy-Anh Nguyen, Xuan-Tu Tran, Francesca Iacopi
2021 Journal of Low Power Electronics and Applications  
Many approaches have been investigated, and Spiking Neural Network (SNN) is one of the promising candidates.  ...  SNN is the third generation of Artificial Neural Networks (ANNs), where each neuron in the network uses discrete spikes to communicate in an event-based manner.  ...  SpiNNaker is a very large-scale digital system designed to simulate large spiking neural networks to emulate the human brain in real-time.  ... 
doi:10.3390/jlpea11020023 fatcat:rwhigu6tajeynabghkvszi5xa4

Large-Scale Neuromorphic Spiking Array Processors: A quest to mimic the brain [article]

Chetan Singh Thakur, Jamal Molin, Gert Cauwenberghs, Giacomo Indiveri, Kundan Kumar, Ning Qiao, Johannes Schemmel, Runchun Wang, Elisabetta Chicca, Jennifer Olson Hasler, Jae-sun Seo, Shimeng Yu, Yu Cao, André van Schaik, Ralph Etienne-Cummings
2018 arXiv   pre-print
In this review article, we describe some of the most significant neuromorphic spiking emulators, compare the different architectures and approaches used by them, illustrate their advantages and drawbacks  ...  Building hardware neural emulators can be extremely useful for simulating large-scale neural models to explain how intelligent behavior arises in the brain.  ...  When running at five times slower than real time, it is capable of simulating 100 million to 12.8 billion LIF neurons, which is the maximum network size on the chosen FPGA board, due to memory limitations  ... 
arXiv:1805.08932v1 fatcat:xqtzbpp5ubhfrpfhj6sjffi6ii

Low-Power Neuromorphic Hardware for Signal Processing Applications [article]

Bipin Rajendran, Abu Sebastian, Michael Schmuker, Narayan Srinivasa,, Evangelos Eleftheriou
2019 arXiv   pre-print
Inspired by the time-encoding mechanism used by the brain, third generation spiking neural networks (SNNs) are being studied for building a new class of information processing engines.  ...  In this paper, we review some of the architectural and system level design aspects involved in developing a new class of brain-inspired information processing engines that mimic the time-based information  ...  at run-time, enabling the configuration of recurrent networks, multi-layer networks, and any arbitrary network topology.  ... 
arXiv:1901.03690v3 fatcat:34eavryprvdaxcvuteujwizeia

Neuromorphic Artificial Intelligence Systems [article]

Dmitry Ivanov, Aleksandr Chezhegov, Andrey Grunin, Mikhail Kiselev, Denis Larionov
2022 arXiv   pre-print
Modern AI systems, based on von Neumann architecture and classical neural networks, have a number of fundamental limitations in comparison with the brain.  ...  learning, sparsity, analog and in-memory computing).  ...  num- bers, spikes spikes spikes real num- bers, spikes real num- bers, spikes real num- bers, spikes real num- bers, spikes real num- bers, spikes spikes spikes In-memory computation no near- memory near  ... 
arXiv:2205.13037v1 fatcat:vjbvvtse2jhshc4rniwyqzgbce
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