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Rapid Prototyping for Heterogeneous Multicomponent Systems: An MPEG-4 Stream over a UMTS Communication Link
2006
EURASIP Journal on Advances in Signal Processing
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It illustrates the methodology in the context of real-time distributed executives for multilayer applications based on an MPEG-4 video codec and a UMTS telecommunication link. ...
The aim of our work is to develop a fast and automatic prototyping methodology dedicated to signal processing application implementation on parallel heterogeneous architectures, two major features required ...
The development of an application on TI processors can be hand-coded with TI RTOS (real-time operating system) called DSP/BIOS [17] . ...
doi:10.1155/asp/2006/64369
fatcat:noz2scapoffgpatpofb6yzuxoi
AVSynDEx: A Rapid Prototyping Process Dedicated to the Implementation of Digital Image Processing Applications on Multi-DSP and FPGA Architectures
2002
EURASIP Journal on Advances in Signal Processing
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We present AVSynDEx (concatenation of AVS + SynDEx), a rapid prototyping process aiming to the implementation of digital signal processing applications on mixed architectures (multi-DSP + FPGA). ...
One main advantage is that only a signal processing designer is needed, all the other specialized manual tasks being transparent in this prototyping methodology, hereby reducing the implementation time ...
An Mpeg-2 coder has already been developed and implemented on the multi-C4x-FPGA platform [24] . ...
doi:10.1155/s1110865702205016
fatcat:5wbgcbwkdnbojbfbyrnzse6eey
Video compression with parallel processing
2002
Parallel Computing
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Designing efficient coding algorithms continues to be a prolific area of research. ...
Since video compression is multi-step in nature using various algorithms, parallel processing can be exploited at an individual algorithm or at a complete system level. ...
VLIW style has been introduced mainly into latest DSPs (for example, Trimedia TM-1 of Philips, TI C6X DSP and Chromatic Mpact) for multimedia and networking services. ...
doi:10.1016/s0167-8191(02)00100-x
fatcat:rmudbaphj5cfvowalnziuvwnwu
A Rapid Prototyping Environment for Wireless Communication Embedded Systems
2003
EURASIP Journal on Advances in Signal Processing
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The papers in this special issue span a broad range of topics related to the rapid prototyping of DSP systems. ...
With the increasing complexity of applications, rapid evolution of technology, and intense market competition in DSP consumer markets, the ability to quickly take a product concept to a working hardware ...
ACKNOWLEDGMENTS
ACKNOWLEDGMENT We would like to thank Aptix Corporation (San Jose, Calif, USA) for the technical support during the prototype implementation of our methodology using the Aptix system ...
doi:10.1155/s111086570330304x
fatcat:3ird7hyyzjeb5bmrqa6ztx7574
Digital signal processor fundamentals and system design
[article]
2008
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Digital Signal Processors (DSPs) have been used in accelerator systems for more than fifteen years and have largely contributed to the evolution towards digital technology of many accelerator systems, ...
Several DSP examples are given, in particular on Texas Instruments DSPs, as they are used in the DSP laboratory companion of the lectures this paper is based upon. ...
The core of this application is the decoder, which can be MPEG-2, MPEG-4 or JPEG-2000. ...
doi:10.5170/cern-2008-003.167
fatcat:wmcj4xgvinaodkpi26c7cjiu3q
Design space exploration and synthesis methodologies for coarse-grained reconfigurable coprocessors
[article]
2011
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. regarding to the automated design space exploration methodologies, we model and analyze the basic building blocks of multi-threaded dynamic memory management for multi-core platforms with shared memory ...
code generation of application specific dynamic memory management. in addition, we propose a new approach for defining an extended design space for hardware coprocessor synthesis, which takes into account ...
The tested application has been mapped onto four different computing devices, incorporating an ARM9 processor [25], an ARM11 processor [25] (ARM customized for DSP operations), a C6x VLIW processor from ...
doi:10.26240/heal.ntua.141
fatcat:k7qwcs6lubgzxbdqpsgvuzyc3q
CAS - CERN Accelerator School: Course on Digital Signal Processing
[article]
2008
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Text Processing Service for their dedication and commitment to the production of this document. ...
Half-way through the school, those working on DSPs moved to FPGAs and vice versa. ...
Special thanks go to Glenn Behrmann for valuable help in hunting down (I hope all) clumsy formulations in the text. ...
doi:10.5170/cern-2008-003
fatcat:gz42zmfggffgngh53pkbeqthua