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Randomized PRAM simulation using T9000 transputers [chapter]

Zbigniew J. Czech, Wojciech Mikanik
1996 Lecture Notes in Computer Science  
In this paper we study the randomized simulation of an EREW (exclusive read, exclusive write) PRAM on a module parallel computer (MPC). The simulation is based on utilizing universal hashing.  ...  The parallel random access machine (PRAM) is the most commonly used general-purpose machine model for describing parallel computations.  ...  Conclusions In the paper the problem of the randomized simulation of an EREW PRAM on an MPC was studied.  ... 
doi:10.1007/3-540-61142-8_621 fatcat:lzieatcsijhbrbukxupzlk2koe

Simulating Shared Memory in Real Time: On the Computation Power of Reconfigurable Architectures

Artur Czumaj, Friedhelm Meyer auf der Heide, Volker Stemann
1997 Information and Computation  
In this paper we present a randomized step by step simulation of a CRCW PRAM with arbitrarily large shared memory on an RM-DMM.  ...  We first present a randomized simulation of a CRCW PRAM on a reconfigurable DMM having a complete reconfigurable interconnection. It guarantees delay O(log *n), with high probability.  ...  ACKNOWLEDGMENT We are grateful to Assaf Schuster for pointing out the problem of simulations on a reconfigurable mesh. Received February 22, 1996; final manuscript received March 25, 1997  ... 
doi:10.1006/inco.1997.2642 fatcat:6p23hty4wvdqhoeq5az2c4hxp4

Page 415 of Mathematical Reviews Vol. , Issue 91A [page]

1991 Mathematical Reviews  
We de- scribe several new results for the simulation of an n-processor PRIORITY PRAM on weaker machines: (1) on an n-processor TOLERANT PRAM: slowdown O(,/logn); (2) on an n-processor COLLISION*+ PRAM:  ...  (PL-WASW-I); Diks, Krzysztof (PL-WASW-I); Hagerup, Torben (D-SAAR-I); Radzik, Tomasz (1-STF-C) New simulations between CRCW PRAMs.  ... 

An Optical Simulation of Shared Memory

Leslie Ann Goldberg, Yossi Matias, Satish Rao
1999 SIAM journal on computing (Print)  
We present a work-optimal randomized algorithm for simulating a shared memory machine (pram) on an optical communication parallel computer (ocpc).  ...  Our algorithm simulates each step of an n lg lg n-processor erew pram on an n-processor ocpc in O(lg lg n) expected delay. (The probability that the delay is longer than this is at most n ?  ...  Simulating PRAM on OCPCs Valiant described a simulation of an erew pram on an ocpc in 40].  ... 
doi:10.1137/s0097539795290507 fatcat:4jzbk2jqdrggtgrpgselyempqi

An optical simulation of shared memory

Leslie Ann Goldberg, Yossi Matias, Satish Rao
1994 Proceedings of the sixth annual ACM symposium on Parallel algorithms and architectures - SPAA '94  
We present a work-optimal randomized algorithm for simulating a shared memory machine (pram) on an optical communication parallel computer (ocpc).  ...  Our algorithm simulates each step of an n lg lg n-processor erew pram on an n-processor ocpc in O(lg lg n) expected delay. (The probability that the delay is longer than this is at most n ?  ...  Simulating PRAM on OCPCs Valiant described a simulation of an erew pram on an ocpc in 40].  ... 
doi:10.1145/181014.181406 dblp:conf/spaa/GoldbergMR94 fatcat:hjomdnekgrflhgzjr7xabrqbo4

CREW PRAMS and decision trees

N. Nisan
1989 Proceedings of the twenty-first annual ACM symposium on Theory of computing - STOC '89  
This paper gives a full characterization of the time needed to compute a boolean function on a CREW PRAM with an unlimited number of processors.  ...  The block sensitivity is also shown to relate to the boolean decision tree complexity, and the implication is that the decision tree complexity also fully characterizes the CREW PRAM complexity.  ...  We can actually show that a CROW PRAM can not simulate a CREW PRAM step is a constant time! We exhibit a problem on a partial domain which separates these two models.  ... 
doi:10.1145/73007.73038 dblp:conf/stoc/Nisan89 fatcat:uzzmpa3ldbcdvl4mcj4l75z34q

CREW PRAMs and Decision Trees

Noam Nisan
1991 SIAM journal on computing (Print)  
This paper gives a full characterization of the time needed to compute a boolean function on a CREW PRAM with an unlimited number of processors.  ...  The block sensitivity is also shown to relate to the boolean decision tree complexity, and the implication is that the decision tree complexity also fully characterizes the CREW PRAM complexity.  ...  We can actually show that a CROW PRAM can not simulate a CREW PRAM step is a constant time! We exhibit a problem on a partial domain which separates these two models.  ... 
doi:10.1137/0220062 fatcat:umsq3apnvvcurhas76wu2wee4m

Algorithms for the parallel alternating direction access machine

Bogdan S. Chlebus, Artur Czumaj, Leszek Ga̧sieniec, Mirosław Kowaluk, Wojciech Plandowski
2000 Theoretical Computer Science  
to all memory blocks, and general simulations of shared memory machines.  ...  We study the issues of inter-processor communication and of e cient use of memory on the PADAM, and develop: an optimal routing scheme among memory modules, algorithms enhancing random access of processors  ...  Randomized simulation In this subsection a randomized shared memory simulation is presented. We assume the strongest CRCW model of computation on the PRAM.  ... 
doi:10.1016/s0304-3975(99)00280-7 fatcat:ihxdlp7mobg3nkuij3lwszh3c4

More Graph Drawing in the Cloud: Data-Oblivious st-Numbering, Visibility Representations, and Orthogonal Drawing of Biconnected Planar Graphs [chapter]

Michael T. Goodrich, Joseph A. Simons
2013 Lecture Notes in Computer Science  
We give a new efficient data-oblivious PRAM simulation and several new data-oblivious graph-drawing algorithms with application to privacy-preserving graph-drawing in a cloud computing context.  ...  Then one can simulate A sequentially in a data-oblivious fashion in O(T N log N ) time without the use of random oracles. Proof: (sketch).  ...  The best existing data-oblivious RAM simulation which does not require random oracles [1] increases the running time by O(log 3 n) factor.  ... 
doi:10.1007/978-3-642-36763-2_56 fatcat:g6fk5433erba3omclya7vmxpfa

Characterizing and mitigating the impact of process variations on phase change based memory systems

Wangyuan Zhang, Tao Li
2009 Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture - Micro-42  
Dynamic Random Access Memory (DRAM) has been used in main memory design for decades.  ...  Compared to conventional DRAM, emerging phase change random access memory (PRAM) demonstrates superior power efficiency and processing scalability as VLSI technologies and integration density continue  ...  In this work, we model both random and systematic effects of the PV. random variables that follow a normal distribution through Monte-Carlo simulation and assign one random variable for each individual  ... 
doi:10.1145/1669112.1669116 dblp:conf/micro/ZhangL09 fatcat:tjkpak7v4fbi5d467jlxbpgtxm

A content-aware block placement algorithm for reducing PRAM storage bit writes

Brian Wongchaowart, Marian K. Iskander, Sangyeun Cho
2010 2010 IEEE 26th Symposium on Mass Storage Systems and Technologies (MSST)  
Phase-change random access memory (PRAM) is a promising storage-class memory technology that has the potential to replace flash memory and DRAM in many applications.  ...  Because individual cells in a PRAM can be written independently, only data cells whose current values differ from the corresponding bits in a write request need to be updated.  ...  random Trace In this trace the PRAM initially has 128 MB of free space containing uniformly distributed random data.  ... 
doi:10.1109/msst.2010.5496996 dblp:conf/mss/WongchaowartIC10 fatcat:e4xt2daef5dtliadvoxw7kg55a

Oblivious Network RAM and Leveraging Parallelism to Achieve Obliviousness [chapter]

Dana Dachman-Soled, Chang Liu, Charalampos Papamanthou, Elaine Shi, Uzi Vishkin
2015 Lecture Notes in Computer Science  
We present new constructions for obliviously simulating general or parallel programs in the Network RAM model.  ...  Then, any P -parallel OPRAM simulating PRAM must incur Ω(t log N ) parallel time.  ...  Recently, Boyle, Chung and Pass [7] proposed Oblivious Parallel RAM, and presented a construction for oblivious simulation of PRAMs in the PRAM model.  ... 
doi:10.1007/978-3-662-48797-6_15 fatcat:zxmytox75rfzrkobd5errdzzne

Data Oblivious Algorithms for Multicores [article]

Vijaya Ramachandran, Elaine Shi
2021 arXiv   pre-print
Using our sorting algorithm as a core primitive, we show how to data-obliviously simulate general PRAM algorithms in the binary fork-join model with non-trivial efficiency.  ...  Most prior works on data-oblivious algorithms adopt the classical PRAM model to capture parallelism.  ...  Data-oblivious simulation of PRAM in CREW binary fork-join.  ... 
arXiv:2008.00332v2 fatcat:fpj5e7tqjfbe7audobaqj7xv3y

Page 6444 of Mathematical Reviews Vol. , Issue 2004h [page]

2004 Mathematical Reviews  
The simulating PRAM has 7 processors and m memory cells, and simulates a PRAM with 7 processors and a constant fraction of m memory cells.  ...  Summary: “We consider a parallel random access machine (PRAM) which has some faulty processors and memory cells.  ... 

ERCW PRAMs and optical communication

Philip D. MacKenzie, Vijaya Ramachandran
1998 Theoretical Computer Science  
This paper presents algorithms and lower bounds for several fundamental problems on the Exclusive Read, Concurrent Write Parallel Random Access Machine (ERCW PRAM) and some results for unbounded fan-in  ...  It can also be solved in O(k) time on an n/k processor Arbitrary ERCW PRAM with 1 global memory cell. Randomized We present two results for randomized algorithms for compaction.  ...  random permutations, and computational geometry.  ... 
doi:10.1016/s0304-3975(97)00199-0 fatcat:el4duxqkjrfglcr4ouegge7doq
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