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Design and Analysis of Soft Error Rate in FET/CNTFET Based Radiation Hardened SRAM Cell

Bharathi Raj Muthu, Ewins Pon Pushpa, Vaithiyanathan Dhandapani, Kamala Jayaraman, Hemalatha Vasanthakumar, Won-Chun Oh, Suresh Sagadevan
2021 Sensors  
Aerospace equipages encounter potential radiation footprints through which soft errors occur in the memories onboard.  ...  Additionally, analysis of robustness against radiation in varying memory cells is carried out using standard GPDK 90 nm, GPDK 45 nm, and 14 nm CNTFET.  ...  The funders had no role in the design of the study; in the collection, analyses, or interpretation of data; in the writing of the manuscript, or in the decision to publish the results.  ... 
doi:10.3390/s22010033 pmid:35009576 pmcid:PMC8747695 fatcat:dxdcirbzu5e73isrkyvxby53vm

2020 Index IEEE Transactions on Nuclear Science Vol. 67

2020 IEEE Transactions on Nuclear Science  
Angular Sensitivity of Neutron-Induced Single-Event Upsets in 12-nm Fin-FET SRAMs With Comparison to 20-nm Planar SRAMs. Total-Ionizing-Dose Effects on InGaAs FinFETs With Modified Gate-stack.  ...  ., +, TNS May 2020 762-767 Single Event Upsets Under 14-MeV Neutrons in a 28-nm SRAM-Based FPGA in Static Mode.  ... 
doi:10.1109/tns.2020.3048765 fatcat:zgygdayuenh5nftvetqv3mfxle

SEU Characterization of Three Successive Generations of COTS SRAMs at Ultralow Bias Voltage to 14.2-MeV Neutrons

Juan Antonio Clemente, Guillaume Hubert, Juan Fraire, Francisco J. Franco, Francesca Villa, Solenne Rey, Maud Baylac, Helmut Puchner, Hortensia Mecha, Raoul Velazco
2018 IEEE Transactions on Nuclear Science  
For this purpose, radiation tests with 14.2 MeV neutrons were performed for SRAM power supplies ranging from 0.5 V to 3.15 V.  ...  Large-scale SELs and SEFIs, observed in the 90-nm and 130-nm SRAMs respectively, are also presented and discussed.  ...  rates and contributions induced by neutrons, protons and muons.  ... 
doi:10.1109/tns.2018.2800905 fatcat:vf7a4xa4y5fwlnwkikb5zirva4

Modeling and Optimization of Fringe Capacitance of Nanoscale DGMOS Devices

A. Bansal, B.C. Paul, K. Roy
2005 IEEE Transactions on Electron Devices  
Soft Error Immunity The charge stored in the SRAM cell can be considered a first-order indication of the extent of immunity of the cell to soft errors.  ...  Two other SRAM metrics-write access time and soft error immunity-are elaborated upon in Section IV-F and IV-G, respectively. IV.  ...  /FinFET devices, for high-performance logic and memory applications.  ... 
doi:10.1109/ted.2004.842713 fatcat:ki5vlrqvczegnnbc6kuszrxzky

Confronting the Variability Issues Affecting the Performance of Next-Generation SRAM Design to Optimize and Predict the Speed and Yield

Jeren Samandari-Rad, Matthew Guthaus, Richard Hughey
2014 IEEE Access  
Furthermore, we illustrate and discuss other important reliability and performance issues such as supply voltage (Vdd) fluctuations, static-noise margin (SNM) reduction, soft errors impact, Negative Bias  ...  In this paper, we develop methods for robust and resilient six-transistor-cell static random access memory (6T-SRAM) designs that mitigate the effects of device and circuit parameter variations.  ...  SEU rate (or soft error rate, SER) is the rate at which a device or system encounters or is predicted to encounter soft errors.  ... 
doi:10.1109/access.2014.2323233 fatcat:hsqprvcb2zhalegj2gtletna7e

A Survey of fault models and fault tolerance methods for 2D bus-based multi-core systems and TSV based 3D NOC many-core systems [article]

Shashikiran Venkatesha, Ranjani Parthasarathi
2022 arXiv   pre-print
We examine the state of art fault mitigation techniques at the logical layer for digital CMOS based design and SRAM based FPGA. CMOS SRAM structure is the same for both digital CMOS and FPGA.  ...  At the micro-architectural and architectural layer, error detection and recovery methods are discussed for bus-based multi-core systems.  ...  Proton beam testing of the 22 nm Tri-Gate SRAM and sequential logic devices observed 1.5 -4x reduction in soft error rate compared to 32 nm planner bulk CMOS [87] .  ... 
arXiv:2203.07830v1 fatcat:dsbx3o4v3femhi5d6kfrurzuoi

An Adaptive and High Coding Rate Soft Error Correction Method in Network-on-Chips

Khanh N. Dang, Xuan-Tu Tran
2019 VNU Journal of Science Computer Science and Communication Engineering  
Park, Radiation-induced soft error rate analyses for 14 nmFinFET SRAM devices, in: 2015 IEEE International Reliability Physics Symposium (IRPS), IEEE, CA, USA, 2015, pp. 4B–1.[4] R.  ...  Baumann, Radiation-induced soft errors in advanced semiconductor technologies, IEEETransactions on Device and materials reliability. 5-3 (2005) 305–316.[2] N.  ...  The authors thank colleagues for their helpful discussions and proofreading. Khanh N.  ... 
doi:10.25073/2588-1086/vnucsce.218 fatcat:ygjt4yaigfhqndv2s3kxzpmptu

Superimposed In-Circuit Fault Mitigation for Dynamically Reconfigurable FPGAs

Alexandra Kourfali, David Merodio Codinachs, Dirk Stroobandt
2017 2017 17th European Conference on Radiation and Its Effects on Components and Systems (RADECS)  
Predictive simulation applications to radiation hardened analog circuits design are discussed.  ...  SRISA RAS, National Research Nuclear University ""MEPhI""", 4 OKB Fifth Generation LLC, 5 Tomsk Polytechnic University, 6 National Research Nuclear University "MEPhI", 7 Novosibirsk State University Radiation  ...  The thermal neutron contribution to the atmospheric soft error rate is investigated for 3 devices with feature sizes below 65nm.  ... 
doi:10.1109/radecs.2017.8696242 fatcat:frcrfuza2fdstitbsjoda5sn4y

Power/Energy Minimization Techniques for Variability-Aware High-Performance 16-nm 6T-SRAM

Jeren Samandari-Rad, Richard Hughey
2016 IEEE Access  
variations (PVT), electromigration (EM), negative bias temperature instability (NBTI), and soft-errors, among others] on top of deploying the most recent state of the art effective mitigation techniques  ...  Power and energy minimization is a critical concern for the battery life, reliability, and yield of many minimum-sized SRAMs.  ...  In contrast, soft faults (also called soft-errors) are dynamic and are typically caused by the proton-induced, neutron, and most importantly alpha particle radiation coming from the operating environment  ... 
doi:10.1109/access.2016.2521385 fatcat:vowwzjai7jhg3iezcclnpdph3e

Accurate Resolution of Time-Dependent and Circuit-Coupled Charge Transport Equations: 1-D Case Applied to 28-nm FD-SOI Devices

Victor Malherbe, Gilles Gasiot, Thomas Thery, Jean-Luc Autran, Philippe Roche
2018 IEEE Transactions on Nuclear Science  
Owing to its computational speed and circuitcoupling ability, the module is embedded in our soft error rate simulation platform, enabling projections on logic cells in 28 nm FD-SOI.  ...  We present a 1D drift-diffusion solver for singleevent simulation.  ...  Indeed, CCS has been widely recognized as one of the driving mechanisms for radiation-induced carrier transport given the very high injection levels at play [14] .  ... 
doi:10.1109/tns.2017.2774960 fatcat:qignavjqj5hkrobh4ja3xd2o7m

Reliability Modeling and Mitigation for Embedded Memories

Innocent Okwudili Agbo, Mottaqiallah Taouil, Said Hamdioui
2019 2019 IEEE International Test Conference (ITC)  
The results show that the SA mitigation is more effective for the SRAM read path (i.e., SA) than cell mitigation.  ...  Sixth, on top of the latter, the sensitivity of the SA and its failure rate were analyzed for five process corners (i.e., Nominal, Fast-Fast, Fast-Slow, Slow-Fast, and Slow-Slow).  ...  This is known as a soft error; and the occurrence rate of this error is known as soft error rate [59] .  ... 
doi:10.1109/itc44170.2019.9000175 dblp:conf/itc/AgboTH19 fatcat:kok7bod22rd7bkxa4aizas65de

Radiation Tolerant Electronics

Paul Leroux
2019 Electronics  
Research on radiation tolerant electronics has increased rapidly over the last few years, resulting in many interesting approaches to model radiation effects and design radiation hardened integrated circuits  ...  Acknowledgments: The authors concentrate on the research of radiation effects and are devoted to the academic contributions.  ...  Acknowledgments: Thanks to the the National Centre for Accelerators (CNA)-Spain, and Los Alamos Neutron Science Center (LANSCE)-USA for all the support in the the irradiation campaigns.  ... 
doi:10.3390/electronics8070730 fatcat:wjo5prr5xjeqtlhxlj4kqz5st4

Revisiting Symptom-Based Fault Tolerant Techniques against Soft Errors

Hwisoo So, Moslem Didehban, Yohan Ko, Reiley Jeyapaul, Jongho Kim, Youngbin Kim, Kyoungwoo Lee, Aviral Shrivastava
2021 Electronics  
Therefore, monitoring such infrequent symptoms makes it possible to cover the manifestation of failures caused by soft errors.  ...  The considerable overheads from such full redundancy-based techniques has motivated researchers to propose low-cost soft error protection schemes, such as symptom-based error protection schemes.  ...  Radiation-induced soft error rate analyses for 14 nm FinFET SRAM devices.  ... 
doi:10.3390/electronics10233028 fatcat:6xmgwau25bgxpjm2jdhjop623y

FinFET Inverter Designs: Behavior and Challenges of Process Variability

Leonardo Barlette De Moraes, Alexandra Lackmann Zimpeck, Cristina Minhardt, Ricardo Augusto Da Luz Reis
2021 Journal of Integrated Circuits and Systems  
Schmitt Triggers are traditionally used for noise immunity enhancement, and have been recently applied to mitigate radiation effects and process variability impact.  ...  trace the relationship between transistor sizing, supply voltage, and process variability to get a low energy consumption circuit while still keeping low levels of deviations due to the impact of process-induced  ...  soft errors [2] .  ... 
doi:10.29292/jics.v16i2.222 fatcat:albwc3f455dw5dfv5nud7wxl5i

Design for manufacturability and reliability in extreme-scaling VLSI

Bei Yu, Xiaoqing Xu, Subhendu Roy, Yibo Lin, Jiaojiao Ou, David Z. Pan
2016 Science China Information Sciences  
Keywords design for manufacturability, design for reliability, VLSI CAD Citation Yu B, Xu X Q, Roy S, et al. Design for manufacturability and reliability in extreme-scaling VLSI.  ...  five decades, the number of transistors on a chip has increased exponentially in accordance with the Moore's law, and the semiconductor industry has followed this law as long-term planning and targeting for  ...  The authors would like to thank Meng LI and Wei YE at University of Texas for helpful comments. Conflict of interest The authors declare that they have no conflict of interest.  ... 
doi:10.1007/s11432-016-5560-6 fatcat:lz5ebjqeprbanbkgxqxjeouip4
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