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Minimizing Communication Cost for Reconfigurable Slot Modules

Sandor Fekete, Jan Van Der Veen, Mateusz Majer, Jurgen Teich
2006 2006 International Conference on Field Programmable Logic and Applications  
Bad placement of modules may degrade performance due to increased signal delays and wastes chip space for the reconfigurable multiple bus.  ...  We validate our models by demonstrating their usefulness for a set of realistic benchmarks.  ...  A controller is used to manage the SRAM access. (3) For modules placed in non-adjacent slots, we provide a dynamic signal switching communication architec-ture called Reconfigurable Multiple Bus (RMB)  ... 
doi:10.1109/fpl.2006.311263 dblp:conf/fpl/FeketeVMT06 fatcat:pvmhuavpc5dpxjcrrjub757mr4

The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer

Mateusz Majer, Jürgen Teich, Ali Ahmadinia, Christophe Bobda
2007 Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology  
Computer architects have been studying the dynamically reconfigurable computer [1] for a number of years.  ...  The uniqueness of this computer stems from a) a new slot-oriented hardware architecture, b) a set of novel inter-module communication paradigms, and c) concepts for dynamic and partial reconfiguration  ...  Fig. 6 . 6 Inter-module communication possibilities on the ESM: a) bus-macro, b) shared memory, c) reconfigurable multiple bus (RMB), d) external crossbar.  ... 
doi:10.1007/s11265-006-0017-6 fatcat:i4dbkxtwlvapvby5jttulh3o3m

Communication Architectures for Dynamically Reconfigurable FPGA Designs

Thilo Pionteck, Carsten Albrecht, Roman Koch, Erik Maehle, Michael Hubner, Jurgen Becker
2007 2007 IEEE International Parallel and Distributed Processing Symposium  
Four different architectures are compared in terms of reconfiguration capabilities, performance, flexibility and hardware requirements.  ...  The analysis takes a minimal communication system for connecting four hardware modules as a common basis for the comparison of the diverse data given in the papers on the different architectures.  ...  RMBoC: Reconfigurable Multiple Bus on Chip RMBoC [4, 5] bases on a modified version of Reconfigurable Multiple Bus (RMB) Networks [7] proposed for multi-processor systems.  ... 
doi:10.1109/ipdps.2007.370364 dblp:conf/ipps/PionteckAKMHB07 fatcat:ncpwwenguva4bo5ppr6lct3hqa

Sorting n Numbers on n × n Reconfigurable Meshes with Buses

M. Nigam, S. Sahni
1994 Journal of Parallel and Distributed Computing  
We show how column sort [LEIG85] and rotate sort [MARB88] can be implemented on the different reconfigurable mesh with buses (RMB) architectures that have been proposed in the literature.  ...  Furthermore, our sorting algorithms use fewer bus broadcasts. For the RMESH RMB architecture [MILL88abc], our algorithms are the first to sort n numbers on an n × n configuration in O(1) time.  ...  [MILL88abc] , the processor array with a reconfigurable bus system (PARBUS) of Wang and Chen [WANG90], and the reconfigurable network (RN) of Ben-Asher et al. [BENA91] .  ... 
doi:10.1006/jpdc.1994.1117 fatcat:qk4isy6qsjespflppdoaacdda4

Run-Time Partial Reconfiguration for Removal, Placement and Routing on the Virtex-II Pro

Stefan Raaijmakers, Stephan Wong
2007 2007 International Conference on Field Programmable Logic and Applications  
Reconfigurable computing entails the utilization of a generalpurpose processor augmented with a reconfigurable hardware structure (usually an FPGA).  ...  In addition, bus macros are no longer necessary and we use the Xilinx tools only for generating the modules.  ...  One is based on vertical slots for the modules, which are connected using a reconfigurable multiple bus (RMB).  ... 
doi:10.1109/fpl.2007.4380744 dblp:conf/fpl/RaaijmakersW07 fatcat:6tv5n47bdzckdjr25ilg2tjbhq

Composable and Persistent-State Application Swapping on FPGAs Using Hardwired Network on Chip

Muhammad Aqeel Wahlah, Kees Goossens
2009 2009 International Conference on Reconfigurable Computing and FPGAs  
We envision that future FPGA will use a hardwired network on chip (HWNoC) [14] as a unified interconnect for functional communications (data and control) as well as configuration (bitstream for soft IPs  ...  In this paper we present a reconfiguration methodology which makes use of such a platform to realize composable inter-application communication and persistent-state intra-application when run-time partial  ...  To connect the modules [2] uses a reconfigurable multiple bus (RMB), [3] uses an NOC, [4] uses lookup tables and [5] uses bus macros.  ... 
doi:10.1109/reconfig.2009.64 dblp:conf/reconfig/WahlahG09 fatcat:mbs7trw4vvc45kvoualv7gtxwi

Symbolic design space exploration for multi-mode reconfigurable systems

Stefan Wildermann, Felix Reimann, Daniel Ziener, Jürgen Teich
2011 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '11  
We develop a symbolic encoding of this novel system specification, which allows to perform a unified system synthesis for allocation, binding, placement of partially reconfigurable modules, and routing  ...  The proposed encoding enables the use of sophisticated optimization techniques, coupling a SAT solver with a Multi-objective Evolutionary Algorithm.  ...  PR regions are provided for run-time reconfiguration. Fig. 3 . 3 Examples of circuit switching techniques for (a) RMB and (c) I/O bar.  ... 
doi:10.1145/2039370.2039393 dblp:conf/codes/WildermannRZT11 fatcat:w2b6iwn57bhdbovygz7x5z54bu

Mapping Recursive Functions to Reconfigurable Hardware

George Ferizis, Hossam Gindy
2006 2006 International Conference on Field Programmable Logic and Applications  
Reconfigurable computing is a design methodology that provides a developer with the ability to reprogram a hardware device.  ...  can provide through parallelism and arbitrary-depth pipelining in a transparent and automated way. • iv ies into a polynomial problem of matrix multiplication has also resulted in an increase in performance  ...  Network The network used contains toroidal segmented multiple buses that run across each column. This network is based on the Reconfigurable Mesh Bus(RMB) network [29] .  ... 
doi:10.1109/fpl.2006.311226 dblp:conf/fpl/FerizisE06 fatcat:xwvkiwrcwbegjmfrat6wb7ewnm

A reconfigurable multifunction computing cache architecture

Huesung Kim, A.K. Somani, A. Tyagi
2001 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
Our simulations indicate that a reconfigurable cache does not take a significant delay penalty compared with a dedicated cache memory.  ...  Therefore, the cache can perform computations when it is reconfigured as a function unit.  ...  The modules can communicate with each other as well as the main memory and the host processor using the Reconfigurable Multiple Bus networks (RMB) [7] .  ... 
doi:10.1109/92.931228 fatcat:ew3tcd3vqrgc7nvj2nlizphejm

A reconfigurable multi-function computing cache architecture

Hue-Sung Kim, Arun K. Somani, Akhilesh Tyagi
2000 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays - FPGA '00  
Our simulations indicate that a reconfigurable cache does not take a significant delay penalty compared with a dedicated cache memory.  ...  Therefore, the cache can perform computations when it is reconfigured as a function unit.  ...  The modules can communicate with each other as well as the main memory and the host processor using the Reconfigurable Multiple Bus networks (RMB) [7] .  ... 
doi:10.1145/329166.329185 dblp:conf/fpga/KimST00 fatcat:ametua7cbzezbjc4phdynizeoe

RISPP: A run-time adaptive reconfigurable embedded processor

Lars Bauer, Muhammad Shafique, Jorg Henkel
2009 2009 International Conference on Field Programmable Logic and Applications  
. ____________________________________ L a r s B a u e r i Acknowledgements I want to thank my advisor Prof.  ...  Working with him was a nice experience and it definitely had a strong influence on my independent approach to work.  ...  Reconfigurable Multiple Bus (RMB) [ESS+96] or (in rare cases) via the external crossbar.  ... 
doi:10.1109/fpl.2009.5272323 dblp:conf/fpl/BauerSH09 fatcat:736cxiivxfetdfqvirrgdmbwma

Application of the Fuzzy Optimal Model in the Selection of the Startup Hub

Xinman Zhu, Jie Dai, Haoran Wei, Debing Yang, Weilun Huang, Zhang Yu, Jorge E. Macias-Diaz
2021 Discrete Dynamics in Nature and Society  
infrastructure; (2) potentiality—promoted by a regional network or value chain of startups.  ...  This paper integrates nominal group technique (NGT), analytical hierarchy process (AHP), and fuzzy technique for order preference by similarity to an ideal solution (TOPSIS) approach, and a case study  ...  (the full amount in three years), the subsidy of enterprise financing (up to RMB a million dollars), the equity investment of the maker (up to RMB a million dollars), and the startup project support fund  ... 
doi:10.1155/2021/6672178 fatcat:wvkyjsbgz5b7zk3shewazxjvn4

The Zero-Fee Tour: Price Competition and Network Downgrading in Chinese Tourism

Dev Nathan, Yang Fuquan, Yu Yin
2013 Social Science Research Network  
Network degradation or downgrading is likely to be more with single-service providers than with multiple-service providers.  ...  The result could be that the restaurant gets an effective price of, say, RMB 6 per person for a set meal, while RMB 4 of the customer price of RMB 10 goes to the tour guide and the LO (Dai et al. 2011  ... 
doi:10.2139/ssrn.2247510 fatcat:ku76pljdazfalbv5jbnzunui6q

Taxis, Traffic, and Thoroughfares: The Politics of Transportation Infrastructure in China's Rapid Urbanization in the Reform Era

JUN ZHANG
2016 City & Society  
In present-day China, infrastructural projects are regarded as technological solutions to a wide range of social and political issues in the process of urbanization; yet their result as part of a material  ...  Yet, under the official ideology of urban development, these structural tensions are de-humanized and rendered a mere technical issue of supply and shortage.  ...  I focus on taxis and taxi drivers not because I prioritize the taxi network over the bus or subway network, but rather my accidental access to the taxi hearing provided a rare opportunity to observe and  ... 
doi:10.1111/ciso.12099 fatcat:274jnjcomvfxffdajh3xcexexm

Energy Management of Combined Cooling, Heating and Power Micro Energy Grid Based on Leader-Follower Game Theory

Kaijun Lin, Junyong Wu, Di Liu, Dezhi Li, Taorong Gong
2018 Energies  
Yet, usually, the non-inferior solution front produces a set multiple optimal solutions for managers to choose from.  ...  Ref. [7] presents a highly integrated and reconfigurable microgrid testbed containing various distributed generation units and diverse energy storage systems, which can provide energy both electrically  ...  This paper takes RMB as the currency unit, and $1 USD is about ¥6.30 RMB.  ... 
doi:10.3390/en11030647 fatcat:vk3w4age7fhudhawbwyv2riwva
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