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Performance Evaluation of Scientific Applications on POWER8 [chapter]

Andrew V. Adinetz, Paul F. Baumeister, Hans Böttiger, Thorsten Hater, Thilo Maurer, Dirk Pleiter, Wolfram Schenck, Sebastiano Fabio Schifano
2015 Lecture Notes in Computer Science  
The high-performance processing capabilities are integrated with a rich memory hierarchy providing high bandwidth through a large set of memory chips.  ...  It may be that though the L3 prefetcher kicks in, it does not provide the data further referenced by the algorithm.  ...  L1$ L2$ L3$ Reg←L1$ L1$←L3$ L1$←L2$ L1$←Mem We use the OpenMP micro-benchmark suite (version 3.X) from EPCC to quantify these overheads [8] .  ... 
doi:10.1007/978-3-319-17248-4_2 fatcat:upzjxnqi4vaudcog7w2pxrpqtu

McPAT

Sheng Li, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi
2009 Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture - Micro-42  
McPAT has a flexible XML interface to facilitate its use with many performance simulators.  ...  Combined with a performance simulator, McPAT enables architects to consistently quantify the cost of new ideas and assess tradeoffs of different architectures using new metrics like energy-delay-area 2  ...  ACKNOWLEDGMENTS The authors would like to thank Victor Zyuban and Shyamkumar Thoziyoor at IBM for answering our questions on circuit implementation and the anonymous reviewers for their constructive comments  ... 
doi:10.1145/1669112.1669172 dblp:conf/micro/LiASBTJ09 fatcat:grtv5brsxzgwxdiqjcdhkfkqwa

Processing Panorama Video in Real-time

Håkon Kvale Stensland, Vamsidhar Reddy Gaddam, Marius Tennøe, Espen Helgedagsrud, Mikkel Næss, Henrik Kjus Alstad, Carsten Griwodz, Pål Halvorsen, Dag Johansen
2014 International Journal of Semantic Computing (IJSC)  
When programing multimedia workloads, it is very important to know how the algorithms perform on the target architecture.  ...  , a programmer must completely rewrite the application to obtain the best performance on the new architecture.  ...  In addition to Intel, IBM is using SMT on the PPE PowerPC processing core in the CBE. SMT does not always improve performance.  ... 
doi:10.1142/s1793351x14400054 fatcat:hafewx3ekrcfpat2osb67fjugi

Weak heterogeneity as a way of adapting multicores to real workloads

Erik Tomusk, Michael O'Boyle
2013 Proceedings of the 3rd International Workshop on Adaptive Self-Tuning Computing Systems - ADAPT '13  
However, adjusting the weights of the E and D terms simply shifts the point in the design space where the metric is minimized; it does not introduce a spread of points.  ...  The effect of the gaps between cores is quantified as overhead with respect to the Y -resource.  ... 
doi:10.1145/2484904.2484909 fatcat:tx2anau7knbmpbkga6w4lx47kq

Efficient Master/Worker Parallel Discrete Event Simulation

Alfred Park, Ric Fujimoto
2009 2009 ACM/IEEE/SCS 23rd Workshop on Principles of Advanced and Distributed Simulation  
It has truly been an honor and a blessing to perform research under the supervision of one of the pioneers in the parallel and distributed simulation field.  ...  I am extremely grateful to have had the opportunity to study as one of his students.  ...  Although the master is logically centralized, it does not mean it must adhere to a centralized design physically.  ... 
doi:10.1109/pads.2009.9 dblp:conf/pads/ParkF09 fatcat:6aiga6uc6jdy5adfzhujiqab3a

Datacenter Architectures for the Microservices Era [article]

Seyedamirhossein Mirhosseininiri, University, My
2021
In chapters III-IV, I comprehensively investigate the problem of tail latency in the context of microservices and address multiple aspects of it.  ...  Duplexity is able to achieve 1.9× higher core utilization and 2.7× lower iso-throughput 99th-percentile tail latency over an SMT-based server design, on average.  ...  The core does not prioritize the latency-critical thread. (3) SMT+: Similar to SMT but prioritizes the latency-sensitive microservice over its corunner unless the microservice thread is stalled.  ... 
doi:10.7302/1405 fatcat:bgtlhrc4dbagrayj5cawxxaopi

Sentiment Analysis [chapter]

2017 Encyclopedia of Machine Learning and Data Mining  
The description given above explains how it works, but not why it does.  ...  However, MAPLMG imposes very high training time overheads on AODE, while SR imposes no extra training time S overheads and only modest test time overheads on AODE.  ...  Synaptic Efficacy Weight  ... 
doi:10.1007/978-1-4899-7687-1_100512 fatcat:ce4yyqo2czftzcx2kbauglh3fu

Spike-Timing-Dependent Plasticity [chapter]

2017 Encyclopedia of Machine Learning and Data Mining  
The description given above explains how it works, but not why it does.  ...  However, MAPLMG imposes very high training time overheads on AODE, while SR imposes no extra training time S overheads and only modest test time overheads on AODE.  ...  Synaptic Efficacy Weight  ... 
doi:10.1007/978-1-4899-7687-1_774 fatcat:2jprihjaxfbtpb3ttwuuz3u34y

Overcoming the Intuition Wall: Measurement and Analysis in Computer Architecture

John David Demme
2017
No one architect can now understand all the complexities of many systems and reason about the full impact of changes or new applications.  ...  Today there is significant demand to improve the performance and energy-efficiency of emerging, transformative applications which are being hammered out by the hundreds for new computing platforms and  ...  Accordingly, a first reaction to defeat these attacks is to simply turn off SMT. Does this indeed eliminate cache side channels? Figure 4 .7 demonstrates that it does not, though it helps.  ... 
doi:10.7916/d8x0652n fatcat:ypxoqhjfuff7deexy5uxrlryze

FUTURE COMPUTING 2014 The Sixth International Conference on Future Computational Technologies and Applications FUTURE COMPUTING 2014 Editors FUTURE COMPUTING 2014 Foreword FUTURE COMPUTING 2014 Committee FUTURE COMPUTING Advisory Chairs

Kendall Nygard, Dan Tamir, Cristina Seceleanu, Mälardalen University, Sweden Sato, Miriam Capretz, Wail Mardini, Jordan, Alexander Gegov, Cristina Seceleanu, Mälardalen University, Sweden Sato (+71 others)
The Sixth International Conference on Future Computational Technologies and Applications (FUTURE COMPUTING 2014), held between   unpublished
We take here the opportunity to warmly thank all the members of the FUTURE COMPUTING 2014 Technical Program Committee, as well as all of the reviewers.  ...  The target was to cover (i) the advanced research on computational techniques that apply the newest human-like decisions, and (ii) applications on various domains.  ...  ACKNOWLEDGMENT This research was partially supported by a grant from the Semiconductor Research Consortium.  ... 
fatcat:phzhoi3dnjdlboitqs66ww2adq

Local Arrangement Chairs & Webmasters Publication Chair Steering Committee Program Committee Additional Reviewers

Sean Safarpour, Synopsys Divjyot, Sethi Cisco, Jens Katelaan, Keshav Kini, Florian Zuleger, Armin Biere, Alan Hu, Warren Hunt, Vigyan Singhal, Oski Tech, Pranav Real (+126 others)
Proceedings of the 16th Conference on Formal Methods in Computer-Aided Design (FMCAD 2016)   unpublished
Sean in particular worked with Synopsys management to host FMCAD at its facilities and ultimately save us quite a bit of expenses.  ...  The final set of accepted papers ranged from protocol verification, architectural specification capture, traditional hardware, software verification, SMT solvers, program synthesis, and verification of  ...  of Defense or the U.S.  ... 
fatcat:6gmwf4yr6zbvzomhwj7atm6gq4

Security and cooperation in wireless networks: thwarting malicious and selfish behavior in the age of ubiquitous computing

2008 ChoiceReviews  
It is now clear that the security solutions devised for wired networks cannot be used as such to protect the wireless ones.  ...  We believe this textbook to be the first of its kind regarding the treatment of security and cooperation in wireless networks.  ...  of Chapter 12; Tamás Holczer and Péter Schaffer, whose research shaped the first part of Chapter 11; Hossein Manshaei for his contributions to the clarification of Bianchi's model and for some of the  ... 
doi:10.5860/choice.46-1524 fatcat:3bkyxjix2vcabcn3f45pqd4vn4

An Exhaustive Survey on P4 Programmable Data Plane Switches: Taxonomy, Applications, Challenges, and Future Trends [article]

Elie F. Kfoury, Jorge Crichigno, Elias Bou-Harb
2021 arXiv   pre-print
and drastically improving the performance of applications that are offloaded to the data plane.  ...  Despite the impressive advantages of programmable data plane switches and their importance in modern networks, the literature has been missing a comprehensive survey.  ...  data pulled from the gateway.  ... 
arXiv:2102.00643v2 fatcat:izxi645kozdc5ibfsqp2y2foau

Microkernel Mechanisms for Improving the Trustworthiness of Commodity Hardware

Yanyan Shen, Kevin Elphinstone
2015 2015 11th European Dependable Computing Conference (EDCC)  
We run synthetic benchmarks and system benchmarks to evaluate the performance overhead of the approach, observe that the overhead varies based on the characteristics of workloads and the variants (LC-RCoE  ...  the sphere of replication (SoR).  ...  LC-RCoE does not preempt a thread and its replicas precisely at exact the same instruction to reduce performance overhead and implementation complexity.  ... 
doi:10.1109/edcc.2015.16 dblp:conf/edcc/ShenE15 fatcat:xq65e72x7zcnjbbmrwpgebqnxa

An Exhaustive Survey on P4 Programmable Data Plane Switches: Taxonomy, Applications, Challenges, and Future Trends

Elie F. Kfoury, Jorge Crichigno, Elias Bou-Harb
2021 IEEE Access  
and drastically improving the performance of applications that are offloaded to the data plane.  ...  Despite the impressive advantages of programmable data plane switches and their importance in modern networks, the literature has been missing a comprehensive survey.  ...  ACKNOWLEDGEMENT This material is based upon work supported by the National Science Foundation under grant numbers 1925484 and 1829698, funded by the Office of Advanced Cyberinfrastructure (OAC).  ... 
doi:10.1109/access.2021.3086704 fatcat:2jgbxj2cbfbp7fawkxwrztbbia
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