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Design, Analysis and Simulation of memristor Emulator based Anti-aliasing filter for Biomedical Applications

E. Preethi, A. Mohamed Abbas, S. Prabhu Kumar, J. T. Arun Raghesh
2016 Indian Journal of Science and Technology  
The proposed timing storage circuit stores and reproduces timing information in analog manner without performing quantization.  ...  Application/Improvements: It extends its benefits of storing and reproducing the CT digital signals, wide range of memristance, and anti aliasing processing.  ...  The design considerations for Continuous Time-Digital Signal processing system, CT-FIR filter and memristor emulator are described.  ... 
doi:10.17485/ijst/2016/v9i5/87152 fatcat:xw2xisxtinf3bnrc7vpenn2thq

Real-time Analog Pixel-to-pixel Dynamic Frame Differencing with Memristive Sensing Circuits [article]

Olga Krestinskaya, Alex Pappachen James
2018 arXiv   pre-print
In this paper, we propose an analog pixel differencing circuit for differentiating pixels between frames directly from CMOS pixels.  ...  The analog information processing at sensor is a topic of growing appeal to develop edge AI devices. The proposed circuit is integrated into a pixel-parallel and pixel-column architectures.  ...  CONCLUSION In this paper, we proposed a near pixel analog signal processing circuit for high speed object detection task in realtime settings.  ... 
arXiv:1808.06780v1 fatcat:uxjdjrbtzrddvcttud3athguai

Multichannel parallel processing of neural signals in memristor arrays

Zhengwu Liu, Jianshi Tang, Bin Gao, Xinyi Li, Peng Yao, Yudeng Lin, Dingkun Liu, Bo Hong, He Qian, Huaqiang Wu
2020 Science Advances  
In this work, we propose a previously unexplored approach for parallel processing of multichannel neural signals in memristor arrays, taking advantage of their rich dynamic characteristics.  ...  This work suggests that memristor arrays could be a promising multichannel signal processing module for future implantable neural interfaces.  ...  (B) The proposed memristor-based system, which uses a memristor array for parallel processing of multichannel neural signals where the biomarker extraction is achieved by memristor conductance modulations  ... 
doi:10.1126/sciadv.abc4797 pmid:33036975 pmcid:PMC7546699 fatcat:qn3scf6ecrctxnliyns2dt5rsa

Analog memristive memory with applications in audio signal processing

ShuKai Duan, XiaoFang Hu, LiDan Wang, ChuanDong Li
2013 Science China Information Sciences  
A series of computer simulations and analyses verify the effectiveness of the proposed scheme. [5-9], artificial neural networks [10], chaotic circuits [11] , and signal processing and pattern recognition  ...  In this paper, we present an implementation scheme for analog memristive memory and an application thereof in a record/play system. The memristor model and analog memory capability are demonstrated.  ...  Conclusions and discussions An implementation scheme for analog memristive memory was proposed in this paper. The analog memory capacity of the memristor was demonstrated.  ... 
doi:10.1007/s11432-013-4864-z fatcat:mftoqx7zindefiqmp42t6whegy

Characterizing a standard cell library for large scale design of memristive based signal processing

Abubaker Sasi, Arash Ahmadi, Majid Ahmadi
2021 IET Circuits, Devices & Systems  
Nevertheless, it is perfectly suitable for signal processing applications that require MATLAB functions to produce text files with hex values in order to overcome the limitations of the simulation environment  ...  In particular, it is a proposal for a characterization methodology of memristor-based logic cells to generate a standard cell library file for large-scale simulation.  ...  In the proposed framework, the signal processing applications require a MATLAB encoder and decoder.  ... 
doi:10.1049/cds2.12076 fatcat:dx3yv4licvhgtmxveqpahwedhm

On Learning With Nonlinear Memristor-Based Neural Network and Its Replication

Changju Yang, Shyam Prasad Adhikari, Hyongsuk Kim
2019 IEEE Transactions on Circuits and Systems Part 1: Regular Papers  
To demonstrate the effectiveness of the proposed method, multilayer neural network along with the end-to-end learning architecture is designed in circuit with nonlinear memristors and tested for several  ...  In this study, a novel architecture of a modified memristor bridge synapse is proposed that avoids the boundary effect issue by shifting the programming origin to the middle of the linear region.  ...  Fig. 5(b). 3) Signal Processing Mode: Signal processing is conducted at switch states SW P = o f f , SW I N = on, SW I N I T = o f f , and SW G = on as shown in Fig. 6 . 6 A memristor-bridge synapse  ... 
doi:10.1109/tcsi.2019.2914125 fatcat:olwaxddkebampnnhq27myf6xse

Programming of memristor crossbars by using genetic algorithm

Farnood Merrikh-Bayat, Saeed Bagheri Shouraki
2011 Procedia Computer Science  
It has been demonstrated that this structure can offer the potential of creating configurable electronic devices which can have applications in signal processing and artificial intelligence.  ...  Without loss of generality, crossbar-based arbitrary waveform generating circuit proposed by Mouttet is considered for demonstrating the capabilities of GA.  ...  For yet another application, Mouttet has proposed several programmable crossbar-based innovative circuits [8, 9, 10] overall emphasizing the rule of memristor crossbars in signal processing such as image  ... 
doi:10.1016/j.procs.2010.12.039 fatcat:cmw3uc3rhfd4fbepxjdhwbxere

Neuromorphic crossbar circuit with nanoscale filamentary-switching binary memristors for speech recognition

Son Truong, Seok-Jin Ham, Kyeong-Sik Min
2014 Nanoscale Research Letters  
In this paper, a neuromorphic crossbar circuit with binary memristors is proposed for speech recognition.  ...  In contrast, the analog memristor crossbar loses its recognition rate significantly from 96% to 9% for the same percentage variation in memristance.  ...  In this paper, we propose a binary memristor crossbar circuit for recognizing five different vowels.  ... 
doi:10.1186/1556-276x-9-629 pmid:25489283 pmcid:PMC4256962 fatcat:xdyboq2gdbdt5opj34pe3rzepa

A Configurable Memristor-based Finite Impulse Response Filter [article]

Mohammad Hemmati, Vahid Rashtchi, Ahmad Maleki, Siroos Toofan
2019 arXiv   pre-print
In this work, considering the advantages of software and hardware approaches, a method to implement direct form FIR filters using analog components and memristors is proposed.  ...  Proper operation and usefulness of the proposed structures are all validated via simulation in Cadence.  ...  they are widely used in signal processing applications.  ... 
arXiv:1904.05279v1 fatcat:7ptiib6xzrclxchl2nosqwf6pi

Area-efficient memristor spiking neural networks and supervised learning method

Errui Zhou, Liang Fang, Rulin Liu, Zhensen Tang
2019 Science China Information Sciences  
Detailed simulation results are described in Appendix C. Conclusion. We propose an area-efficient memristor SNN for hardware implementation, the spikes of which are simplified as step signals.  ...  We then derive the gradient descent for the proposed memristor SNNs to implement training.  ... 
doi:10.1007/s11432-018-9607-8 fatcat:7p3cqthqt5gijkzj5mu6z7ofte

Fast IDS Computing System Method and its Memristor Crossbar-based Hardware Implementation [article]

Sajad Haghzad Klidbary, Saeed Bagheri Shouraki, Iman Esmaili Pain Afrakoti
2016 arXiv   pre-print
Our proposed algorithm is fully compatible with memristor-crossbar implementation that leads to a significant decrease in the number of required memristors (from O(n^2) to O(3n)).  ...  Simpler algorithm and higher speed make our algorithm suitable for applications where real-time process, low-cost and small implementation are paramount.  ...  ACKNOWLEDGMENT All the experiments and ideas of this research work have been developed in Artificial Creatures Lab, belonging to the Electrical Engineering Department, Sharif University of Technology,  ... 
arXiv:1602.06787v1 fatcat:azwypeeufvgivjpu5l6shp6x6a

Programmable Memristive Threshold Logic Gate Array [article]

Olga Krestinskaya, Akshay Kumar Maan, Alex Pappachen James
2018 arXiv   pre-print
This paper proposes the implementation of programmable threshold logic gate (TLG) crossbar array based on modified TLG cells for high speed processing and computation.  ...  The proposed TLG array operation does not depend on input signal and time pulses, comparing to the existing architectures. The circuit is implemented using TSMC 180nm CMOS technology.  ...  In previously proposed TLG cell, the memristor R c2 and control signal V c is updated during the cell processing and change according to the input signal, which limits the processing speed, especially  ... 
arXiv:1809.00419v1 fatcat:4vkjemxzofhkthqcfgbsf3dopa

A Multilayer Neural Network Merging Image Preprocessing and Pattern Recognition by Integrating Diffusion and Drift Memristors [article]

Zhiri Tang, Ruohua Zhu, Ruihan Hu, Yanhua Chen, Edmond Q. Wu, Hao Wang, Jin He, Qijun Huang, Sheng Chang
2020 arXiv   pre-print
In this paper, a novel kind of multilayer neural network is proposed, in which diffusion and drift memristor models are applied to construct a system merging image preprocessing and pattern recognition  ...  Moreover, owing to high-efficiency in-memory computing and brief spiking encoding methods, high processing speed, high throughput, and few hardware resources of the entire network are achieved.  ...  FPGA is controlled by clock signals so that it is very suitable to process spiking signals in many applications [34] [35] [36] [37] .  ... 
arXiv:1904.12292v4 fatcat:isoouv4uwvfxvntlxdrvqr4yii

The Implementation of Logic Gates Using Only Memristor Based Neuristor

2021 Informacije midem  
We simulated the proposed gates with SPICE using TSMC 0.18 μm CMOS process models.  ...  One can learn about memristor-based neuron circuits in literature if one wishes to implement more effective circuits, as they are linear, have a high density, and consume little energy.  ...  The authors declare that there is no conflict of interest for this paper. Also, there are no funding supports for this manuscript.  ... 
doi:10.33180/infmidem2021.203 fatcat:yej4bvlzr5bkhjvyji55z2lek4

Training itself: Mixed-signal training acceleration for memristor-based neural network

Boxun Li, Yuzhi Wang, Yu Wang, Yiran Chen, Huazhong Yang
2014 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)  
trained for efficient data processing!  ...  to specific states Data Processing Digital Training Analog Processing  Realize the self-training of memristor-based neural network through mixed-signal system  Analog unit:  work out  ... 
doi:10.1109/aspdac.2014.6742916 dblp:conf/aspdac/LiWWCY14 fatcat:3cmcryyg6rfnlf7kgpqknppkua
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