Filters

4,435 Hits in 2.3 sec

Proof nets and Boolean circuits

K. Terui
2004 Proceedings of the 19th Annual IEEE Symposium on Logic in Computer Science, 2004.
We study the relationship between proof nets for mutiplicative linear logic (with unbounded fan-in logical connectives) and Boolean circuits.  ...  We give simulations of each other in the style of the proofs-as-programs correspondence; proof nets correspond to Boolean circuits and cutelimination corresponds to evaluation.  ...  Acknowledgments We would like to thank Noriko Arai, Harry Mairson and the anonymous referees for helpful suggestions.  ...

Sublogarithmic uniform Boolean proof nets

Clément Aubert
2012 Electronic Proceedings in Theoretical Computer Science
Using a proofs-as-programs correspondence, Terui was able to compare two models of parallel computation: Boolean circuits and proof nets for multiplicative linear logic.  ...  This paper presents a novel translation in AC0 and focuses on a simpler restricted notion of uniform Boolean proof nets.  ...  Boolean proof nets In order to compare the complexities of proof nets and of Boolean circuits, we need to define how proof nets represent Boolean values (definition 12) and Boolean functions (definition  ...

Non-deterministic Boolean Proof Nets [chapter]

Virgile Mogbil
2010 Lecture Notes in Computer Science
With the restriction of proof nets to Boolean types, we prove that the cut-elimination procedure corresponds to Non-deterministic Boolean circuit evaluation and reciprocally.  ...  We introduce Non-deterministic Boolean proof nets to study the correspondence with Boolean circuits, a parallel model of computation.  ...  I would like to thank the reviewers for their remarks and the improvements which they suggested.  ...

Page 808 of Neural Computation Vol. 8, Issue 4 [page]

1996 Neural Computation
A circuit corresponds (using the notation of this paper) to a [-net, where [ is a class of Boolean functions and where functions in [ are assigned to the vertices of the net-architecture.  ...  The proof of 1.1 uses techniques of circuit theory.  ...

Image Computation and Predicate Refinement for RTL Verilog using Word Level Proofs

Daniel Kroening, Natasha Sharygina
2007 2007 Design, Automation & Test in Europe Conference & Exhibition
Existing algorithms use a net-list-level circuit model for computing predicate images. 1) This paper describes a proof-based algorithm that computes an over-approximation of the predicate image at the  ...  wordlevel, and thus, scales to larger circuits. 2) The previous work relies on the computation of the weakest preconditions in order to refine the set of predicates.  ...  [9] introduce a SAT-based technique for predicate abstraction of circuits given in Verilog. The circuit is synthesized and transformed into net-list level.  ...

Page 3489 of Mathematical Reviews Vol. , Issue 94f [page]

1994 Mathematical Reviews
The proof uses circuit techniques along the lines of those of T. Gundermann, N. A. Nasser and G.  ...  The proofs are well-presented and elementary. Rodney G. Downey (NZ-VCTR; Wellington) 94f:68083 68Q15 03G05 06E30 68Q25 Beynon, W.  ...

Page 404 of Neural Computation Vol. 8, Issue 2 [page]

1996 Neural Computation
[This is also the input convention followed in standard Boolean circuit complexity theory (Wegener 1987).]  ...  Since a recurrent net of s units converging in time f may be “un- wound” into a feedforward circuit of size s-t, the class of Boolean func- tions computed by polynomial size, polynomial time asymmetric  ...

Universal Boolean Systems

Denis Béchet, Sylvain Lippi
2008 Electronical Notes in Theoretical Computer Science
Boolean interaction systems and hard interaction systems define nets of interacting cells.  ...  With boolean nets, it is not possible to create or destroy cells or links between existing cells.  ...  Introduction Interaction nets [6] are a programming paradigm inspired by Girard's proof nets for linear logic [3] .  ...

Error diagnosis for transistor-level verification

Andreas Kuehlmann, David I. Cheng, Arvind Srinivasan, David P. LaPotin
1994 Proceedings of the 31st annual conference on Design automation conference - DAC '94
The method eciently propagates mismatched p atterns from erroneous outputs backward into the network and calculates circuit regions which most likely contain the error(s).  ...  Therefore, it is more general and especially suitable for transistor-level circuits, which have a broader variety of possible design errors than gate-level implementations.  ...  Additional thanks are extended to IBM designers Christopher Durham and David Appenzeller for contributing circuit examples.  ...

Page 1450 of Mathematical Reviews Vol. 52, Issue 4 [page]

1976 Mathematical Reviews
Chen, Chuan 10244 Realizability of communication nets: an application of the Zadeh criterion. IEEE Trans. Circuits and Systems CAS-21 (1974), 150-151.  ...  The authors consider the decomposition of Boolean functions, presenting a method that uses Boolean matrix algebra and has been realized with a computer program.  ...

Page 8764 of Mathematical Reviews Vol. , Issue 99m [page]

1999 Mathematical Reviews
We then look at the Boolean circuit satisfiability problem and give non-interactive zero-knowledge proofs and argu- ments with preprocessing.  ...  We prove that Boolean circuits, algebraic circuits, programs over nondeterministic finite automata, and programs over constant integer matrices yield equivalent definitions of the latter three classes.  ...

Positive Versions of Polynomial Time

C. Lautemann, T. Schwentick, I.A. Stewart
1998 Information and Computation
Perhaps the best known is in the context of boolean circuits where Razborov [25] proved that there exist monotone boolean functions which are computable by polynomial-size sequences of boolean circuits  ...  Grigni and Sipser [17] considered positive versions of a variety of computational models such as boolean circuits, branching programs, and nondeterministic Turing machines and, in a natural way, made them  ...  Proof. The construction of a random-access ATM to evaluate a boolean circuit is standard (see, for example, Theorem 4.4 of [3] ).  ...

Mapping finite state machines to zk-SNARKS Using Category Theory [article]

Fabrizio Genovese, Andre Knispel, Joshua Fitzgerald
2019 arXiv   pre-print
We provide a categorical procedure to turn graphs corresponding to state spaces of finite state machines into boolean circuits, leveraging on the fact that boolean circuits can be easily turned into zk-SNARKS  ...  Our circuits verify that a given sequence of edges and nodes is indeed a path in the graph they represent. We then generalize to circuits verifying paths in arbitrary graphs.  ...  Instead, we deem a wiser course of action turning boolean circuits in B G Graph into boolean circuits, and feed them to an already implemented and audited solution.  ...