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Progressive Generation of Canonical Irredundant Sums of Products Using a SAT Solver [chapter]

Ana Petkovska, Alan Mishchenko, David Novo, Muhsen Owaida, Paolo Ienne
2017 Advanced Logic Synthesis  
We present an algorithm that progressively generates canonical irredundant Sums Of Products (SOPs) for completely-and incompletely-specified Boolean functions using a satisfiability (SAT) solver.  ...  Experiments with global circuit restructuring using SAT-based SOPs show that area-delay product can be improved up to 27%, compared to global restructuring using BDD-based SOPs.  ...  "SAT-based Methods for Scalable Synthesis and Verification".  ... 
doi:10.1007/978-3-319-67295-3_8 fatcat:alrawfwgqfdgresrpwk624lmme

Symbolic Decision Procedures for QBF [chapter]

Guoqiang Pan, Moshe Y. Vardi
2004 Lecture Notes in Computer Science  
Our first solver, QMRES, maintains a set of clauses represented by a ZDD and eliminates quantifiers via multi-resolution.  ...  Our second solver, QBDD, maintains a set of OBDDs, and eliminate quantifier by applying them to the underlying OBDDs. We compare our symbolic solvers to several competitive search-based solvers.  ...  Acknowledgement We would like to thank Laurent Simon for making available to us his ZRes package, which served as the basis for QMRES.  ... 
doi:10.1007/978-3-540-30201-8_34 fatcat:qh6tulx5mrelfj2cm6abw5qkty

Faster SAT solving with better CNF generation

B. Chambers, P. Manolios, D. Vroon
2009 2009 Design, Automation & Test in Europe Conference & Exhibition  
These applications tend to be most naturally encoded using arbitrary Boolean expressions, but to use modern SAT solvers, one has to generate expressions in Conjunctive Normal Form (CNF).  ...  This process can significantly affect SAT solving times. In this paper, we introduce a new linear-time CNF generation algorithm.  ...  CNF is then generated for the cuts of the nodes in the domain of the final mapping, using their irredundant sum-of-products representation.  ... 
doi:10.1109/date.2009.5090918 dblp:conf/date/ChambersMV09 fatcat:hzaf7fzlzjc7fdmq6cqob4il4q

Using simulation and satisfiability to compute flexibilities in Boolean networks

A. Mishchenko, J.S. Zhang, S. Sinha, J.R. Burch, R. Brayton, M. Chrzanowska-Jeske
2006 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
The experimental results confirm that the combination of simulation and SAT offers a computation engine that outperforms binary decision diagrams, which are traditionally used in such applications.  ...  Simulation and Boolean satisfiability (SAT) checking are common techniques used in logic verification.  ...  Satisfiability The SAT solver used in these applications was implemented using an "extensible SAT solver," MiniSat [8] .  ... 
doi:10.1109/tcad.2005.860955 fatcat:qfd6n32sczdndh7msjnij65voy

Logic Synthesis for Established and Emerging Computing

Eleonora Testa, Mathias Soeken, Luca Gaetano Amar, Giovanni De Micheli
2019 Proceedings of the IEEE  
A recent push toward further formalization of synthesis problems has shown to be very useful toward both attempting to solve some logic problems exactly-which is computationally possible for instances  ...  | Logic synthesis is an enabling technology to realize integrated computing systems, and it entails solving computationally intractable problems through a plurality of heuristic techniques.  ...  The optimum problem can be cast in terms of satisfiability (SAT), and a SAT solver is used to attempt its solution.  ... 
doi:10.1109/jproc.2018.2869760 fatcat:e2fqalmxlfg65lsewf5c26qwry

Fast algorithms, modular methods, parallel approaches and software engineering for solving polynomial systems symbolically

Yuzhen Xie
2007 ACM Communications in Computer Algebra  
A component-level parallelization of triangular decompositions by the Triade algorithm is realized using this framework.  ...  The implementation of symbolic solvers is, however, a highly difficult task due to the extremely high time and space complexity of the problem.  ...  The tools for efficient computation of irredundant components and verifying the output of solvers are useful for both developers and users.  ... 
doi:10.1145/1358190.1358195 fatcat:qck42ui4rzcgti62umwt2njmje

Complexity of two-level logic minimization

C. Umans, T. Villa, A.L. Sangiovanni-Vincentelli
2006 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
This recent activity has classified some logic optimization problems of high practical relevance, such as finding the minimal sum-of-products (SOP) form and maximal term expansion and reduction.  ...  This paper surveys progress in the field with self-contained expositions of fundamental early results, an account of the recent advances, and some new classifications.  ...  Johnson for kindly providing a hardcopy of Masek's technical report. T. Villa thanks R. Brayton, K. Keutzer, and A. Oliveira for related discussions.  ... 
doi:10.1109/tcad.2005.855944 fatcat:gugijsvw4zcqrbc7dzhyy7zvgu

Exploiting Satisfiability Solvers for Efficient Logic Synthesis

Ana Petkovska
Next, we present a new SAT-based algorithm that progressively generates irredundant sums of products (SOPs), which still play a crucial role in many logic synthesis tools.  ...  We show that LEXSAT can bring canonicity, which guarantees the generation of unique results, when using SAT solvers in EDA applications.  ...  Progressive Generation of Canonical Irredundant Sums of Products Using SOPs in a variety of applications Minimisation of the two-level sum of products (SOP) representation is well-studied due to the wide  ... 
doi:10.5075/epfl-thesis-7866 fatcat:ed6wrfa42jaqxlduioc77d2vvy

Logic synthesis in a nutshell [chapter]

Jie-Hong (Roland) Jiang, Srinivas Devadas
2009 Electronic Design Automation  
As the name itself suggests, logic synthesis is the process of automatic production of logic components, in particular digital circuits.  ...  This chapter covers classic elements of logic synthesis for combinational circuits.  ...  Alan Mishchenko of the University of California at Berkeley, and Prof. Jianwen Zhu of the University of Toronto for valuable feedback on the manuscript.  ... 
doi:10.1016/b978-0-12-374364-0.50013-8 fatcat:zuz2226qfjcgzlgni2vtqc4fnu

Constraint satisfaction problems in clausal form [article]

Oliver Kullmann
2011 pre-print
This is the report-version of a mini-series of two articles on the foundations of satisfiability of conjunctive normal forms with non-boolean variables, to appear in Fundamenta Informaticae, 2011.  ...  The second part considers translations to boolean clause-sets and irredundancy as well as minimal unsatisfiability.  ...  by boolean SAT solvers.  ... 
doi:10.3233/fi-2011-428; arXiv:1103.3693v1 fatcat:x6ncma7xo5bhndbmfhmjeyeqty

SAT-Based Exact Synthesis for Multi-Level Logic Networks

Winston Jason Haaswijk
My time in Switzerland would not have been the same without a great social support system. I would like to thank all of my friends in Switzerland, from EPFL and beyond.  ...  possible without the kind help of many people. Unfortunately, there is no way for me to do justice to all of them here. Nevertheless, I will do my best.  ...  Acknowledgements Writing a PhD thesis is not an easy task. It is clear to me that this work would not have been  ... 
doi:10.5075/epfl-thesis-9404 fatcat:yu37vmn6zffmrgzydvoou2zzla

Report from Dagstuhl Seminar 13331 Exponential Algorithms: Algorithms and Complexity Beyond Polynomial Time

Thore Husfeldt, Ramamohan Paturi, Gregory Sorkin, Ryan Williams
It also presents a compendium of open problems.  ...  The report provides a rationale for the workshop and chronicles the presentations at the workshop. The report notes the progress on the open problems posed at the past workshops on the same topic.  ...  Drucker, "Nondeterministic Direct Product Reductions and the Success Probability of SAT Solvers," to appear in Proc. of IEEE FOCS 2013.  ... 

Constraint satisfaction problems in clausal form: Autarkies, minimal unsatisfiability, and applications to hypergraph inequalities

Oliver Kullmann, Nadia Creignou, Phokion Kolaitis, Heribert Vollmer
Generalised CNFs are considered using such literals, which exclude exactly one possible value from the domain of the variable.  ...  First we consider poly-time SAT decision (and fixed-parameter tractability) exploiting matching theory.  ...  Computing van der Waerden numbers has been considered in [14, 25] , and it seems that SAT solvers are performing quite well on them, and that possibly SAT solvers could help to compute new van der Waerden  ... 
doi:10.4230/dagsemproc.06401.4 fatcat:hheqc43kujavngl2arrdvxouje

Reinforcement Learning (Dagstuhl Seminar 13321) The Critical Internet Infrastructure (Dagstuhl Seminar 13322) Coding Theory (Dagstuhl Seminar 13351) Interaction with Information for Visual Reasoning (Dagstuhl Seminar 13352)

Peter Auer, Marcus Hutter, Laurent, Georg Carle, Jochen Schiller, Steve Uhlig, Walter Willinger, Matthias Wählisch, Thore Husfeldt, Ramamohan Paturi, Gregory Sorkin, Ryan Williams (+14 others)
Mark: Progress in the field will require multidisciplinary. Alex: Flow Cytometry data analysis is a real case of Big-Data robots producing much larger data than can be processed at the moment.  ...  They use the same technology as IBM's ink-jet printer from 50 years ago, high dimensional and high throughput, measuring the intensity of the fluorescence (proportional to the number of certain proteins  ...  No such progress has been made for general Circuit Sat.  ... 

Program Verification Using Polynomials Over Modular Arithmetic

Thomas Seed
a compact SAT instance.  ...  One fundamental operation used in the domain construction applies a propagation technique that suggests how the satisfiability the SMT formulae can be reduced to that of deciding the satisfiability of  ...  Thanks also to my family and Georgia's family who have been a great support to me throughout. Acknowledgements iv  ... 
doi:10.22024/unikent/01.02.90261 fatcat:i5dx7nuqhnahpdvsyofitjyaeu