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Programs for instruction machines

Z. Pawlak, G. Rozenberg, W.J. Savitch
1979 Information and Control  
Formal models for a computer and for programs are introduced. These models are used to develop a theory for programs based on the underlying computational structure of the computer to be programmed.  ...  Several notions of "well-behaved" programs are introduced. Necessary and sufficient conditions for converting arbitrary programs to "well-behaved" programs are derived.  ...  Having defined I machines, we now go on to define programs for I machines.  ... 
doi:10.1016/s0019-9958(79)80003-0 fatcat:2fj3fkiefjbtbmgsi24t6rzwvq

Modeling operational semantics of machine instructions

V. A. Padaryan, M. A. Soloviev, A. I. Kononov
2018 Proceedings of the Institute for System Programming of RAS  
This paper offers a model which allows describe operational semantics of machine instructions for various target architectures.  ...  We present a prototype subsystem for interpretation of the described model.  ... 
doaj:affde065d6594532a6ad5b80105f7084 fatcat:bnezvztv4ffc3dpcpjdjas53ee

Automated generation of machine instruction decoders
Автоматизированная генерация декодеров машинных команд

N.Yu. Fokina, M.A. Solovev
2018 Proceedings of the Institute for System Programming of RAS  
DOI: 10.15514/ISPRAS-2018-30(2)-4 For citation: Fokina N.Yu., Solovev M.A. Automated generation of machine instruction decoders. Trudy ISP RAN/Proc.  ...  This paper proposes a method of automated generation of machine instruction decoders for various processor architectures, mainly microcontrollers. Only minimal, high-Fokina N.Yu., Solovev M.A.  ...  Automated generation of machine instruction decoders  ... 
doi:10.15514/ispras-2018-30(2)-4 fatcat:spjcv426ifavng6wz4d34bok2q

Global instruction scheduling for superscalar machines

David Bernstein, Michael Rodeh
1991 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation - PLDI '91  
A scheme for global (intra-loop) scheduling is proposed, which uses the control and data dependence information summarized in a Program Dependence Graph, to move instructions well beyond basic block boundaries  ...  To improve the utilization of machine resources in superscalar processors, the instructions have to be carefully scheduled by the compiler.  ...  Instruction Word (VLIW) machines [EIEJ While for machines with n functional units the idea is to be able to execute as many as n instructions each cycle, for pipelined machines the goal is to  ... 
doi:10.1145/113445.113466 dblp:conf/pldi/BernsteinR91 fatcat:obxxbwsovncyjcg7zx2bgaz6nu

Available instruction-level parallelism for superscalar and superpipelined machines

N. P. Jouppi, D. W. Wall
1989 Proceedings of the third international conference on Architectural support for programming languages and operating systems - ASPLOS-III  
Our simulations suggest that this metric is already high for many machines.  ...  Su erscalar machines can issue several instructions per Ip cyc e.  ...  For most programs, further optimization has little effect on the instruction-level parallelism (although of course it has a large effect on the performance).  ... 
doi:10.1145/70082.68207 dblp:conf/asplos/JouppiW89 fatcat:vqttpr2d75c4bpgsjij2w5r33a

Decoding of machine instructions for abstract interpretation of binary code
Декодирование машинных команд в задаче абстрактной интерпретации бинарного кода

M.A. Solovev, M.G. Bakulin, S.S. Makarov, D.V. Manushin, V.A. Padaryan
2019 Proceedings of the Institute for System Programming of RAS  
Decoding machine instructions for abstract interpretation of binary code. Trudy ISP RAN/Proc.  ...  Decoding machine instructions for abstract interpretation of binary code. Trudy ISP RAN/Proc. ISP RAS, vol. 31, issue 6, 2019. pp. 65-88  ... 
doi:10.15514/ispras-2019-31(6)-4 fatcat:vwl3kigbanedhigv3x4ifv5yna

A semantic model of types and machine instructions for proof-carrying code

Andrew W. Appel, Amy P. Felty
2000 Proceedings of the 27th ACM SIGPLAN-SIGACT symposium on Principles of programming languages - POPL '00  
Proof-carrying code is a framework for proving the safety of machine-language programs with a machinecheckable proof. Such proofs have previously defined type-checking rules as part of the logic.  ...  We move the machine instruction semantics from the verification-condition generator to the safety policy; this simplifies the trusted computing base at the expense of complicating the proofs, which is  ...  We thank Neophytos Michael for assistance in implementing the toy-machine decode function in Twelf; Robert Harper, Frank Pfenning, Carsten Schürmann for advice about encoding logics in Twelf; Doug Howe  ... 
doi:10.1145/325694.325727 dblp:conf/popl/AppelF00 fatcat:pctc54rdyzbmlndujheubpu63m

Space-time scheduling of instruction-level parallelism on a raw machine

Walter Lee, Rajeev Barua, Matthew Frank, Devabhaktuni Srikrishna, Jonathan Babb, Vivek Sarkar, Saman Amarasinghe
1998 Proceedings of the eighth international conference on Architectural support for programming languages and operating systems - ASPLOS-VIII  
Compilation for instruction-level parallelism (ILP) on such distributed-resource machines requires both spatial instruction scheduling and traditional temporal instruction scheduling.  ...  Section 2 motivates the need for NURA machines, and it introduces the Raw machine as one such machine. Section 3 describes RAWCC, a compiler for NURA machines.  ...  We believe instruction partitioning should be accomplished at compile time for several reasons: first, it requires sophisticated analysis of the structure of the program dependence graph, for which the  ... 
doi:10.1145/291069.291018 dblp:conf/asplos/LeeBFSBSA98 fatcat:bwsn74jmxbd6baz3y7hwi4p7cy

Aufgaben des programmierten Unterrichts und Entwicklung eines Lehrgerätes für Einzelschulung = Buts de l'enseignement scolaire programmé et développement d'une machine d'enseignement pour l'entrainement individuel = Aims of programmed instruction and development of a teaching machine for individual schooling

Jürgen Jaehnert, Axel Lintener
1971
individuel Aims of programmed instruction and development of a teaching machine for individual schooling Jürgen Jaehnert/Axel Lintener, Paderborn.  ...  Aufgaben des programmierten Unterrichts und Entwicklung eines Lehrgerätes für Einzelschulung Buts de l'enseignement scolaire programmé et développement d'une machine d'enseignement pour l'entrainement  ... 
doi:10.5169/seals-333958 fatcat:hf555t62t5gbbln2ueza3gfagq

The effect of instruction set complexity on program size and memory performance

Jack W. Davidson, Richard A. Vaughan
1987 SIGARCH Computer Architecture News  
One potential disadvantage of a machine with a reduced instruction. set is that object programs may be substantially larger than those for a machine with a richer, more complex instruction set.  ...  Three high-level language compilers were constructed for machines with instruction sets of varying degrees of complexity.  ...  " code for a machine with a simple instruction set.  ... 
doi:10.1145/36177.36184 fatcat:hfkz3t7pgzejfnt6dthw6sv57m

The Design and Realization of Virtual Machine of Embedded Soft PLC Running System

Qingzhao Zeng, Suzhuo Wu, Zheng Li
2014 Sensors & Transducers  
of the input sampling program, the realization of the instruction execution program and the realization of output refresh program.  ...  Besides, an operation code matching method was put forward in the instruction execution program design.  ...  Acknowledgements This work was financially supported by National High Technology Research and Development Program 863 (2011AA11A102), The Natural Science Foundation of Tianjin (Grant 13JCYBJC39000), The  ... 
doaj:99c09456ef5f46c1a2e69253487d8ca8 fatcat:6ios42wlsbh4bhixlizjyfm3yy

Discovering Nontrivial and Functional Behavior in Register Machines

Anthony Joseph
2013 Complex Systems  
A simple two-register, four-instruction register machine was analyzed using soft and hard analytical techniques.  ...  Further analysis of this register machine configuration yields opportunities for synthesizing multiple functions into a single register machine and optimizing functional register machines by brute-force  ...  The author is very grateful for the assistance and guidance provided by Dr. Stephen Wolfram, Dr. Todd Rowland, Dr.  ... 
doi:10.25088/complexsystems.22.2.101 fatcat:bbs6ylykavfvdmceawehrx4g4i

Combining programs and state machines

Jan A. Bergstra, Alban Ponse
2002 The Journal of Logic and Algebraic Programming  
State machines can be combined with several natural operators, thus giving rise to a state machine calculus. State machines are used for abstract data type modeling.  ...  As state machines offer a service to programs, their interface is also called a service interface.  ...  "Apply" refers to the fact that the program issues instructions to the state machine only for the sake of state machine transformation.  ... 
doi:10.1016/s1567-8326(02)00020-6 fatcat:6vtwe6rvwvethbkop5cisnnfjy

Limits of control flow on parallelism

Monica S. Lam, Robert P. Wilson
1992 SIGARCH Computer Architecture News  
Finally, without speculative execution to allow instructions to execute before their control dependences are resolved, only modest amounts of parallelism can be obtained for programs with complex control  ...  We evaluate these techniques by using trace simulations to find the limits of parallelism for machines that employ different combinations of these techniques. We have three major results.  ...  For the SP-CD and SP-CD-MF machines, an instruction must wait for its last mispredicted control dependence branch.  ... 
doi:10.1145/146628.139702 fatcat:rxukdhahjffezc4vq72my5vimi

Limits of control flow on parallelism

Monica S. Lam, Robert P. Wilson
1992 Proceedings of the 19th annual international symposium on Computer architecture - ISCA '92  
Finally, without speculative execution to allow instructions to execute before their control dependences are resolved, only modest amounts of parallelism can be obtained for programs with complex control  ...  We evaluate these techniques by using trace simulations to find the limits of parallelism for machines that employ different combinations of these techniques. We have three major results.  ...  For the SP-CD and SP-CD-MF machines, an instruction must wait for its last mispredicted control dependence branch.  ... 
doi:10.1145/139669.139702 dblp:conf/isca/LamW92 fatcat:mcrgkh2kund4djg7kk5ucgdznu
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