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FPGA-based prototyping systems for emerging memory technologies

Taemin Lee, Dongki Kim, Hyunsun Park, Sungjoo Yoo, Sunggu Lee
2014 2014 25nd IEEE International Symposium on Rapid System Prototyping  
We built two different FPGA-based evaluation boards to evaluate hardware and software designs for new-memory based main memory; one with a DRAM subsystem having parameterizable latency and non-volatility  ...  As DRAM faces scaling limit, several new memory technologies are considered as candidates for replacing or complementing DRAM main memory.  ...  ACKNOWLEDGMENT This work was supported by the IT R&D program MKE/KEIT (No.10041608, Embedded System Software for New Memorybased Smart Devices) and Samsung Electronics.  ... 
doi:10.1109/rsp.2014.6966901 dblp:conf/rsp/LeeKPYL14 fatcat:zzjltv4zabhfnfqgicpzphopqa

Flash memory-based development platform for homecare devices

Joon Ho Um, Bryan Kim, Sung Gab Lee, Eyee Hyun Nam, Sang Lyul Min
2008 Conference Proceedings / IEEE International Conference on Systems, Man and Cybernetics  
In addition to its special emphasis on support for flash memory-based storage, the platform is designed to provide fast prototyping and easy evaluation for a wide range of embedded systems.  ...  Flash memory is increasingly being used in embedded systems because of its small size, low power consumption, fast access time, and high shock and vibration resistance.  ...  Flash Memory Flash memory, a type of non-volatile solid state memory, is gaining popularity as a storage medium for embedded devices because of its small size, low power consumption, and high shock and  ... 
doi:10.1109/icsmc.2008.4811629 dblp:conf/smc/UmKLNM08 fatcat:cyqpnx5gm5b5rbzkss5diehjpa

Analysis of Various Memory Circuits Used In Digital VLSI

Tanvi Upaskar, Ganesh Thorave, Prof. Sumita G, Mayuresh Yerandekar, Siddhesh Mahadik
2019 Zenodo  
This paper presents comparison of semiconductor memory circuits such as volatile memories like SRAM, DRAM and non-volatile memories like ROM, PROM, EPROM, EEPROM, FLASH (NOR based & NAND based).  ...  This paper presents the appropriate choice for selecting memory circuit with the read-write speed, capacity, power consumption.  ...  NAND flash is used for data storage due to non-volatility and high density while NOR flash is used for code storage due to non-volatility and fast random access speed.  ... 
doi:10.5281/zenodo.2652716 fatcat:jhfhvxuoibe5ppe4rmr5ic4ypa

Low-End Memory Subsystem Optimization Process

2019 International Journal of Smart Home  
For this reason, it is expected to replace DRAM, flash memory, and hard disk in the future. However, Non-volatile memory is not enough to replace DRAM.  ...  Non-volatile memory is a memory that has both higher integration density than DRAM, and low energy consumption, high-speed operation of SRAM, and non-volatile nature of flash memory, which is advantage  ...  Low-End Memory Subsystem Optimization Process  ... 
doi:10.21742/ijsh.2019.13.2.02 fatcat:reby7smjtngbll77l2xusd2fxa

Architecture of a Self-Checkpointing Microprocessor that Incorporates Nanomagnetic Devices

Love Kothari, Nicholas P. Carter
2007 IEEE transactions on computers  
This causes a number of problems for computer systems, including data loss from power failures, the need to load operating systems from non-volatile storage each time the system is powered on, and high  ...  Magnetoelectronic devices that combine ferromagnetic elements with semiconductor structures have the potential to overcome this limitation by providing high-performance non-volatile storage that can be  ...  on-chip non-volatile memories.  ... 
doi:10.1109/tc.2007.21 fatcat:rgyv5tw7nbgsteplvoi4xr4qsq

Design of Efficient Index Management for Column-based Big Databases

Siwoo Byun
2017 International Journal of Internet of Things and Big Data  
The conventional hard disk has been the dominant database storage system for over 25 years. Currently, flash memories are one of the best media to support database storage areas.  ...  However, PRAM is better than flash memory in the respects of read and write performance.  ...  Acknowledgement This research was supported by Basic Science Research Program through the NRF of Korea(NRF-2016938908).  ... 
doi:10.21742/ijitbd.2017.2.1.06 fatcat:busrmybk25d6tk3lb7cbr2lzcm

Optimal Checkpointing for Secure Intermittently-Powered IoT Devices [article]

Zahra Ghodsi, Siddharth Garg, Ramesh Karri
2017 arXiv   pre-print
Prior work has advocated for checkpointing the intermediate state to off-chip non-volatile memory (NVM).  ...  Energy harvesting is a promising solution to power Internet of Things (IoT) devices.  ...  An RRAM based non-volatile main memory is assumed, and NVSim [30] is used to derive power and performance parameters for an 8 MB non-volatile memory.  ... 
arXiv:1711.01454v1 fatcat:wc3auu2ehrbc5klwlho2ribk3m

Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation

Jingtong Hu, Chun Jason Xue, Wei-Che Tseng, Yi He, Meikang Qiu, Edwin H.-M. Sha
2010 Proceedings of the 47th Design Automation Conference on - DAC '10  
Meanwhile, the finish time of programs is reduced by 31.81% on average.  ...  In this paper, we target embedded Chip Multiprocessors (CMPs) with Scratch Pad Memory (SPM) and non-volatile main memory.  ...  Memory address space is partitioned between the on-chip SPMs and off-chip non-volatile memory. In this paper, "main memory" refers to non-volatile memory.  ... 
doi:10.1145/1837274.1837363 dblp:conf/dac/HuXTHQS10 fatcat:mhkinop4jvdzxnq5mju2gkz7y4

Time-sensitive Intermittent Computing Meets Legacy Software

Vito Kortbeek, Kasim Sinan Yildirim, Abu Bakar, Jacob Sorber, Josiah Hester, Przemysław Pawełczak
2020 Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems  
We present Time-sensitive Intermittent Computing System (TICS), a new platform for intermittent computing, which provides simple programming abstractions for handling the passing of time through intermittent  ...  Unfortunately, state-of-the-art systems ask the programmer to solve these challenges, and have high memory overhead, lack critical programming features like pointers and recursion, and are only dimly aware  ...  This research was supported by Netherlands Organisation for Scientific Research, partly funded by the Dutch Ministry of Economic Affairs, through TTW Perspectief program ZERO (P15-06) within Project P4  ... 
doi:10.1145/3373376.3378476 dblp:conf/asplos/KortbeekYBSHP20 fatcat:fyrg2j64hrekda4ili657hutlu

Memory Forensic: Acquisition And Analysis Of Memory And Its Tools Comparison

Mital Parekh, Snehal Jani
2018 Zenodo  
However, it is always tough to analyze volatile memory as it stays for a very short period.  ...  The three main steps followed in memory forensic are acquiring, analyzing and recovering.  ...  Conclusions Memory Forensic is widely used to analyze, acquire, report generation of memory.  ... 
doi:10.5281/zenodo.1198968 fatcat:7jsd2zqbprgjrmoepih5sauf5u

NV-Heaps

Joel Coburn, Adrian M. Caulfield, Ameen Akel, Laura M. Grupp, Rajesh K. Gupta, Ranjit Jhala, Steven Swanson
2011 Proceedings of the sixteenth international conference on Architectural support for programming languages and operating systems - ASPLOS '11  
Persistent, user-defined objects present an attractive abstraction for working with non-volatile program state.  ...  Fast, byte-addressable, non-volatile technologies, such as phase change memory, will remove this constraint and allow programmers to build high-performance, persistent data structures in non-volatile storage  ...  Acknowledgements The authors would like to thank Geoff Voelker for his valuable feedback, Michael Swift and Haris Volos for their comments, and Amir Roth for his encouragement.  ... 
doi:10.1145/1950365.1950380 dblp:conf/asplos/CoburnCAGGJS11 fatcat:6w5xtiax2bezbhawcew6lm46l4

High Performance Data Persistence in Non-Volatile Memory for Resilient High Performance Computing [article]

Yingchao Huang, Kai Wu, Dong Li
2017 arXiv   pre-print
In this paper we explore how to build resilient HPC with non-volatile memory (NVM) as main memory and address the dilemmas.  ...  Resilience is a major design goal for HPC. Checkpoint is the most common method to enable resilient HPC.  ...  Given NVM as main memory and its non-volatility nature, is it possible to change or even remove checkpoint to enable data persistence frequently, thus fundamentally addressing the above two dilemmas in  ... 
arXiv:1705.00264v2 fatcat:mzpzrwpaqbaevgqxzvqbmcgt7a

NV-Heaps

Joel Coburn, Adrian M. Caulfield, Ameen Akel, Laura M. Grupp, Rajesh K. Gupta, Ranjit Jhala, Steven Swanson
2012 SIGPLAN notices  
Persistent, user-defined objects present an attractive abstraction for working with non-volatile program state.  ...  Fast, byte-addressable, non-volatile technologies, such as phase change memory, will remove this constraint and allow programmers to build high-performance, persistent data structures in non-volatile storage  ...  Acknowledgements The authors would like to thank Geoff Voelker for his valuable feedback, Michael Swift and Haris Volos for their comments, and Amir Roth for his encouragement.  ... 
doi:10.1145/2248487.1950380 fatcat:ylep75ky55duvionhsilfzrzga

NV-Heaps

Joel Coburn, Adrian M. Caulfield, Ameen Akel, Laura M. Grupp, Rajesh K. Gupta, Ranjit Jhala, Steven Swanson
2011 SIGARCH Computer Architecture News  
Persistent, user-defined objects present an attractive abstraction for working with non-volatile program state.  ...  Fast, byte-addressable, non-volatile technologies, such as phase change memory, will remove this constraint and allow programmers to build high-performance, persistent data structures in non-volatile storage  ...  Acknowledgements The authors would like to thank Geoff Voelker for his valuable feedback, Michael Swift and Haris Volos for their comments, and Amir Roth for his encouragement.  ... 
doi:10.1145/1961295.1950380 fatcat:uvasunu7ofch7juy7fmfk3nceu

NV-Heaps

Joel Coburn, Adrian M. Caulfield, Ameen Akel, Laura M. Grupp, Rajesh K. Gupta, Ranjit Jhala, Steven Swanson
2011 SIGPLAN notices  
Persistent, user-defined objects present an attractive abstraction for working with non-volatile program state.  ...  Fast, byte-addressable, non-volatile technologies, such as phase change memory, will remove this constraint and allow programmers to build high-performance, persistent data structures in non-volatile storage  ...  Acknowledgements The authors would like to thank Geoff Voelker for his valuable feedback, Michael Swift and Haris Volos for their comments, and Amir Roth for his encouragement.  ... 
doi:10.1145/1961296.1950380 fatcat:knenlt3q3va2bl5wpdxlydufsm
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