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Profile-based dynamic voltage scheduling using program checkpoints
Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition
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In this paper we introduce a novel intra-task DVS technique under compiler control using program checkpoints. ...
Calculate optimal frequencies and create a schedule for changing frequencies and voltages. Case 1: Only two checkpoints, frequency limit is high enough. ...
Slack-based DVS using Program Checkpoints Our original DVS algorithm in Section 2 calculates the clock frequency and voltage using the maximum profiled cycle counts. ...
doi:10.1109/date.2002.998266
dblp:conf/date/AzevedoICGDVN02
fatcat:zqrs5tillvc4fmaev3jadmd72y
Architectural and compiler strategies for dynamic power management in the COPPER project
2001
Innovative Architecture for Future Generation High-Performance Processors and Systems IWIA-01
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In particular, we discuss our techniques for compiler controlled dynamic register file reconfiguration and profile-driven dynamic clock frequency and voltage scaling. ...
We evaluate the effectiveness of power scheduling heuristics based on these techniques in complying with desired power and performance constraints for a given application. ...
Acknowledgments This research is supported by DARPA PAC/C program under contract number F336-15-00-C-1632. ...
doi:10.1109/iwia.2001.955194
fatcat:l6oyaaycqfbzzg76icbo6sdeti
Eliminating voltage emergencies via software-guided code transformations
2010
ACM Transactions on Architecture and Code Optimization (TACO)
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at the same program location. ...
A checkpoint-recovery mechanism rectifies errors when voltage violates maximum tolerance settings, while a run-time software layer reschedules the program's instruction stream to prevent recurring violations ...
Fig. 11 : 11 This figure justifies the use of three program points for resolving voltage emergencies. ...
doi:10.1145/1839667.1839674
fatcat:uxznhy2dzfd5pbpqjvbxd5j6em
Software-assisted hardware reliability
2009
Proceedings of the 46th Annual Design Automation Conference on ZZZ - DAC '09
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Power constrained designs are becoming increasingly sensitive to supply voltage noise. ...
program's instruction stream to prevent recurring margin crossings at the same program location. ...
Design and implementation of a dynamic compiler-based system for suppressing recurring voltage emergencies. 2. ...
doi:10.1145/1629911.1630114
dblp:conf/dac/ReddiGSWBC09
fatcat:2znymncztnaf7nqv4l7m2emu7q
Single Region vs. Multiple Regions: A Comparison of Different Compiler-Directed Dynamic Voltage Scheduling Approaches
[chapter]
2003
Lecture Notes in Computer Science
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This paper discusses the design and implementation of a profile-based power-aware compiler using dynamic voltage scaling. ...
for the remaining program at the slowdown up to 21%. ...
Implementation The prototype of the dynamic voltage scheduling based on program regions is implemented as part of SUIF2 [24] using the profile-driven approach. ...
doi:10.1007/3-540-36612-1_13
fatcat:grnxssjgfbbbvnq2uvbgmf2gxm
Detailed author index
2007
2007 IEEE International Conference on Cluster Computing
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476
Measurement-Based Power Profiling of Data Center Equipment
Rychkov, Vladimir
568
Building the Communication Performance Model of Heterogeneous Clusters Based on a
Switched Network
[Search ...
Malleable Applications in Multicluster Systems
Mohan, Tushar
187
The Software Interface for a Cluster Interconnect Based on the Kautz Digraph
Mukherjee, Tridib
476
Measurement-Based Power Profiling ...
doi:10.1109/clustr.2007.4629206
fatcat:dsvfpa7uffc75e4iotlu2vjrqe
Efficient Algorithms for Extracting Pareto-optimal Hardware Configurations in DEPS Framework
2012
IPSJ Transactions on System LSI Design Methodology
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A dynamic energy performance scaling (DEPS) framework has been proposed as a generalization of dynamic voltage frequency scaling (DVFS). ...
We propose two exact algorithms to reduce the number of calculations in DEPS profiling. These algorithms can be used with common search algorithms. ...
Azevedo et al. first proposed a method using a checkpoint function for voltage scheduling [5] . ...
doi:10.2197/ipsjtsldm.5.133
fatcat:atz6o5txnngy3py4mlnbltusnm
System-level power-aware design techniques in real-time systems
2003
Proceedings of the IEEE
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profile, and then they use voltage scaling for distributed real-time systems. ...
The term checkpoints refers to statically determined program epoch points where processor frequency and voltage can be changed. ...
doi:10.1109/jproc.2003.814617
fatcat:jdhfjwawuvetrjngqhliysufwq
Energy-Efficient Intra-task DVFS Scheduling Using Linear Programming Formulation
2019
IEEE Access
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Based on the profile information of a task, we first formulate the problem in terms of integer linear programming (ILP) regarding different assumptions of transition overhead. ...
Intra-task dynamic voltage and frequency scaling (DVFS) has been the subject of much research in the task boundary of time-constrained applications for energy reduction. ...
The profiled information provides hints about the locations to change the CPU speed; for example, a sequence of instructions can be inserted into the target program as a checkpoint or voltage/frequency ...
doi:10.1109/access.2019.2902353
fatcat:fyrafrn7vjaybppv5h3zc4ebze
Energy Efficient Task Scheduling of Send-Receive Task Graphs on Distributed Multi-Core Processors with Software Controlled Dynamic Voltage Scaling
2011
International Journal of Computer Science & Information Technology (IJCSIT)
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In this paper we propose a model of distributed multi-core processors with software controlled dynamic voltage scaling. ...
We consider the problem of energy efficient task scheduling with a given deadline on this model. ...
[5] proposed a profile-based dynamic voltage scheduling heuristic using program checkpoints. ...
doi:10.5121/ijcsit.2011.3215
fatcat:nijl5vzxxfadta2nyhczjqt4uq
PAStime: Progress-Aware Scheduling for Time-Critical Computing
2020
Euromicro Conference on Real-Time Systems
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The LO-mode budget of a high-criticality task is adjusted according to the delay observed at execution checkpoints. ...
This paper describes the integration of PAStime with Adaptive Mixed-criticality (AMC) scheduling. ...
., via Dynamic Voltage Frequency Scaling) based on progress. Application of PAStime to domains outside real-time computing will also be considered in future work. ...
doi:10.4230/lipics.ecrts.2020.3
dblp:conf/ecrts/SinhaWG20
fatcat:d7grwu4t3vdy7fbvv4ur67j45a
LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing
2020
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)
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The LEGaTO project leverages task-based programming models to provide a software ecosystem for Made in-Europe heterogeneous hardware composed of CPUs, GPUs, FPGAs and dataflow engines. ...
., supply voltage underscaling below the nominal level is one of the most efficient techniques to reduce the power consumption of the chip, because dynamic power is quadratic in voltage. ...
The model is used for the profiling of nodes. The scores are computed by normalizing the predictions and adding the demanded weights. ...
doi:10.23919/date48585.2020.9116362
dblp:conf/date/0001PCUMCCBJANM20
fatcat:dnwv4t72yfee5ojpnt7agawpuu
LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing
[article]
2019
arXiv
pre-print
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The LEGaTO project leverages task-based programming models to provide a software ecosystem for Made in-Europe heterogeneous hardware composed of CPUs, GPUs, FPGAs and dataflow engines. ...
., supply voltage underscaling below the nominal level is one of the most efficient techniques to reduce the power consumption of the chip, because dynamic power is quadratic in voltage. ...
The model is used for the profiling of nodes. The scores are computed by normalizing the predictions and adding the demanded weights. ...
arXiv:1912.01563v1
fatcat:fnaovxczgzbqlbidh6rj5qynuy
PAStime: Progress-aware Scheduling for Time-critical Computing
[article]
2019
arXiv
pre-print
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Note that this fulltext copy is not of the "primary" version of this work. The version it corresponds to is:
2021 accepted arXiv:1908.06211v2 fatcat:3g4ywpghhvfo7niq5dwtnwniiq
In this paper, we integrate PAStime with Adaptive Mixed-criticality (AMC) scheduling. ...
The LO-mode budget of a high-criticality task is adjusted according to the delay observed at execution checkpoints. ...
., via Dynamic Voltage Frequency Scaling) based on progress. Application of PAStime to domains outside real-time computing will also be considered in future work. ...
arXiv:1908.06211v1
fatcat:vw2vmro3v5cpvglboyv5yhxdee
Voltage Noise in Production Processors
2011
IEEE Micro
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Voltage droops correspond to program activity Voltage noise activity varies according to program characteristics. ...
Due to the lack of existing resilient architectures, we investigated the usefulness of a software-aided solution via analytical modeling and oracle-based analysis. ...
doi:10.1109/mm.2010.104
fatcat:l25lsepuljdmpkvrmemszjg52a
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