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Process control and scheduling issues for multiprogrammed shared-memory multiprocessors

A. Tucker, A. Gupta
1989 Proceedings of the twelfth ACM symposium on Operating systems principles - SOSP '89  
We also discuss implications of the proposed scheme for multiprocessor schedulers, and how the scheme should interface with parallel programming languages.  ...  Shared-memory multiprocessors are frequently used in a timesharing style with multiple parallel applications executing at the same time.  ...  Acknowledgments We would like to thank David Cheriton, Hugh Lauer, Edward Lazowska, and Susan Owicki for their helpful comments on this paper and the work it describes.  ... 
doi:10.1145/74850.74866 dblp:conf/sosp/TuckerG89 fatcat:htcdxdqopvedvhfccdvoyhmt6q

Process control and scheduling issues for multiprogrammed shared-memory multiprocessors

A. Tucker, A. Gupta
1989 ACM SIGOPS Operating Systems Review  
We also discuss implications of the proposed scheme for multiprocessor schedulers, and how the scheme should interface with parallel programming languages.  ...  Shared-memory multiprocessors are frequently used in a timesharing style with multiple parallel applications executing at the same time.  ...  Acknowledgments We would like to thank David Cheriton, Hugh Lauer, Edward Lazowska, and Susan Owicki for their helpful comments on this paper and the work it describes.  ... 
doi:10.1145/74851.74866 fatcat:xf6ofe4ftbezzp2c5w7k4nz4fa

Processor allocation policies for message-passing parallel computers

Cathy McCann, John Zahorjan
1994 Proceedings of the 1994 ACM SIGMETRICS conference on Measurement and modeling of computer systems - SIGMETRICS '94  
When multiple jobs compete for processing resources qThis materiaf is  ...  Acknowledgements The authors thank Martin Tompa for valuable discussions regarding the analysis of the Folding rotation scheme.  ...  Process control and scheduling issues for multiprogrammed shared-memory multipro- cessors. In Proceedings of the 1 f?  ... 
doi:10.1145/183018.183022 dblp:conf/sigmetrics/McCannZ94 fatcat:zi3jy5wq3baelpwdzw76n4dszm

Processor allocation policies for message-passing parallel computers

Cathy McCann, John Zahorjan
1994 Performance Evaluation Review  
When multiple jobs compete for processing resources qThis materiaf is  ...  Acknowledgements The authors thank Martin Tompa for valuable discussions regarding the analysis of the Folding rotation scheme.  ...  Process control and scheduling issues for multiprogrammed shared-memory multipro- cessors. In Proceedings of the 1 f?  ... 
doi:10.1145/183019.183022 fatcat:hlhwokoafra23ed4z67wl4hizy

Scheduler-Activated Dynamic Page Migration for Multiprogrammed DSM Multiprocessors

Dimitrios S. Nikolopoulos, Constantine D. Polychronopoulos, Theodore S. Papatheodorou, Jesús Labarta, Eduard Ayguadé
2002 Journal of Parallel and Distributed Computing  
The performance of multiprogrammed shared-memory multiprocessors suffers often from scheduler interventions that neglect data locality.  ...  On cachecoherent distributed shared-memory (DSM) multiprocessors, such scheduler interventions tend to increase the rate of remote memory accesses.  ...  ACKNOWLEDGMENT We thank the journal referees for their insightful comments, which helped us improve the paper considerably.  ... 
doi:10.1006/jpdc.2001.1817 fatcat:mm4g6niwc5e4dn4adqub77grbu

The Architectural and Operating System Implications on the Performance of Synchronization on ccNUMA Multiprocessors

Dimitrios S. Nikolopoulos, Theodore S. Papatheodorou
2001 International journal of parallel programming  
Along with visiting the aforementioned issues, the paper contributes a new methodology for implementing fast synchronization algorithms on ccNUMA multiprocessors.  ...  From the operating system's perspective, the paper evaluates in a unified framework, user-level, kernel-level and hybrid algorithms for implementing scalable synchronization in multiprogrammed execution  ...  the performance of parallel programs on multiprogrammed shared-memory multiprocessors.  ... 
doi:10.1023/a:1011168003859 dblp:journals/ijpp/NikolopoulosP01 fatcat:kggvvrj4c5cphh4ft2b4pkazpu

A quantitative architectural evaluation of synchronization algorithms and disciplines on ccNUMA systems

Dimitrios S. Nikolopoulos, Theodore S. Papatheodorou
1999 Proceedings of the 13th international conference on Supercomputing - ICS '99  
This paper assesses the performance and scalability of several software synchronization algorithms, as well as the interrelationship between synchronization, multiprogramming and parallel job scheduling  ...  We also evaluate different combinations of synchronization algorithms, synchronization disciplines that cope with the effects of multiprogramming and different parallel job scheduling strategies, using  ...  Acknowledgements We would like to thank Constantine Polychronopoulos and David Craig for motivating this work and providing useful advice.  ... 
doi:10.1145/305138.305209 dblp:conf/ics/NikolopoulosP99 fatcat:naadzrmks5fbdc3oiogi77z2b4

Retrospective: the Cedar system

A. Veidenbaum, P.-C. Yew, D. J. Kuck, C. D. Polychronopoulos, D. H. Padua, E. S. Davidson, K. Gallivan
1998 25 years of the international symposia on Computer architecture (selected papers) - ISCA '98  
Another goal was to have the prototype "achieve Cray-1 speeds for programs written in high-level languages and automatically restructured" by a compiler.  ...  Finally, "an integral part of the design... was to allow multiprogramming". 1. The quotes are from the [GKLS83] reference in the 1993 ISCA-20 paper.  ...  Support for multiple levels of program parallelism Eficient synchronization and scheduling support via a processor in memory Memo y hierarchy, with software-controlled data "caching" in cluster memory  ... 
doi:10.1145/285930.285965 dblp:conf/isca/VeidenbaumYKPPDG98 fatcat:obv6ipwmffbh7e27pzrhkzaza4

Converting thread-level parallelism to instruction-level parallelism via simultaneous multithreading

Jack L. Lo, Joel S. Emer, Henry M. Levy, Rebecca L. Stamm, Dean M. Tullsen, S. J. Eggers
1997 ACM Transactions on Computer Systems  
This article explores parallel processing on an alternative architecture, simultaneous multithreading (SMT), which allows multiple threads to compete for and share all of the processor's resources every  ...  Unfortunately, both parallel processing styles statically partition processor resources, thus preventing them from adapting to dynamically changing levels of ILP and TLP in a program.  ...  ACKNOWLEDGMENTS We would like to thank John O'Donnell of Equator Technologies, Inc. and Tryggve Fossum of Digital Equipment Corp. for the source to the Alpha AXP version of the Multiflow compiler.  ... 
doi:10.1145/263326.263382 fatcat:urempgsyi5fmffbfxkr7s6zcju

Exploring the design space for a shared-cache multiprocessor

B. A. Nayfeh, K. Olukotun
1994 SIGARCH Computer Architecture News  
In this paper we investigate the architecture and partitioning of resources between processors and cache memory for single chip and MCM-based multiprocessors.  ...  Combining these results with cost estimates for shared cluster cache implementations leads to two conclusions: 1) For a four cluster multiprocessor with single chip clusters, two processors per cluster  ...  Acknowledgments We would like to thank Kun-Yung Chang for his help in developing the implementation and cost models for the shared cluster caches and Bharadwaj Amurtur for his SRAM design parameters.  ... 
doi:10.1145/192007.192026 fatcat:ntywckvlzfczzmndlob5wd57si

Study of Various Factors Affecting Performance of Multi-Core Processors

Nitin Chaturvedi, Gurunarayanan S
2013 International Journal of Distributed and Parallel systems  
Advances in Integrated Circuit processing allow for more microprocessor design options.  ...  On chip Cache memory is a resource of primary concern as it can be dominant in controlling overall throughput.  ...  Researchers have shown that chip-level integration of caches, memory controllers, cache coherence hardware and routers can improve performance of online transaction processing workloads by a factor of  ... 
doi:10.5121/ijdps.2013.4404 fatcat:ipcaejvdybaipejw5ehavdham4

Evaluation of design alternatives for a multiprocessor microprocessor

Basem A. Nayfeh, Lance Hammond, Kunle Olukotun
1996 Proceedings of the 23rd annual international symposium on Computer architecture - ISCA '96  
In the future, advanced integrated circuit processing and packaging tecbnolog y will allow for several design options for multiprocessor microprocessors.  ...  In this paper we consider three architectures: shared-primary cache, shared-secondary cache, and shared-memory.  ...  Acknowledgments We would like to thank Steve Herrod, Edouard Bugnion and Men-  ... 
doi:10.1145/232973.232982 dblp:conf/isca/NayfehHO96 fatcat:qbw6ybk4ljcapa66vs32osa73e

Evaluation of design alternatives for a multiprocessor microprocessor

Basem A. Nayfeh, Lance Hammond, Kunle Olukotun
1996 SIGARCH Computer Architecture News  
In the future, advanced integrated circuit processing and packaging tecbnolog y will allow for several design options for multiprocessor microprocessors.  ...  In this paper we consider three architectures: shared-primary cache, shared-secondary cache, and shared-memory.  ...  Acknowledgments We would like to thank Steve Herrod, Edouard Bugnion and Men-  ... 
doi:10.1145/232974.232982 fatcat:xbb7j5le5jcifhoa74rw44ive4

Realistic Workload Scheduling Policies for Taming the Memory Bandwidth Bottleneck of SMPs [chapter]

Christos D. Antonopoulos, Dimitrios S. Nikolopoulos, Theodore S. Papatheodorou
2004 Lecture Notes in Computer Science  
Therefore, we present and evaluate two realistic scheduling policies which treat memory bandwidth as a first-class resource.  ...  In this paper we reformulate the thread scheduling problem on multiprogrammed SMPs.  ...  Onassis' public benefit foundation and the European Commission through IST grant No. 2001-33071. The second author is supported by NSF award CARRER/CCF-0346867.  ... 
doi:10.1007/978-3-540-30474-6_33 fatcat:elyq5hocivhazeb54xkn4imndi

Simultaneous multithreading: a platform for next-generation processors

S.J. Eggers, J.S. Emer, H.M. Levy, J.L. Lo, R.L. Stamm, D.M. Tullsen
1997 IEEE Micro  
We also thank Jennifer Anderson of DEC Western Research Laboratory for copies of the SpecFP95 benchmarks, parallelized by the most recent version of the SUIF compiler, and Sujay Parekh for comments on  ...  Acknowledgments We thank John O'Donnell of Equator Technologies, Inc. and Tryggve Fossum of Digital Equipment Corp. for the source to the Alpha AXP version of the Multiflow compiler.  ...  The parallel workload consists of coarse-grained (parallel threads) and medium-grained (parallel loop iterations) parallel programs targeted for shared-memory multiprocessors.  ... 
doi:10.1109/40.621209 fatcat:zmx4yx2flnfazi3b6zdwhavnam
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