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Prefix Computations on Symmetric Multiprocessors

David R. Helman, Joseph JáJá
2001 Journal of Parallel and Distributed Computing  
Our prefix computation algorithm was implemented in C using POSIX threads and run on four symmetric multiprocessors: the HP-Convex Exemplar (S-Class), the IBM SP-2 (High Node), the SGI Power Challenge,  ...  We introduce a new prefix computation algorithm on linked lists which builds upon the sparse ruling set approach of Reid-Miller and Blelloch.  ...  Our prefix computation algorithm was implemented in C using POSIX threads and run on four symmetric multiprocessors: the HP-Convex Exemplar (S-Class), the IBM SP-2 (High Node), the SGI Power Challenge,  ... 
doi:10.1006/jpdc.2000.1678 fatcat:zguouofg4fctdkt37posnx3lka

Prefix computations on symmetric multiprocessors

D.R. Helman, J. JaJa
Proceedings 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing. IPPS/SPDP 1999  
Our prefix computation algorithm was implemented in C using POSIX threads and run on four symmetric multiprocessors: the HP-Convex Exemplar (S-Class), the IBM SP-2 (High Node), the SGI Power Challenge,  ...  We introduce a new prefix computation algorithm on linked lists which builds upon the sparse ruling set approach of Reid-Miller and Blelloch.  ...  Our prefix computation algorithm was implemented in C using POSIX threads and run on four symmetric multiprocessors: the HP-Convex Exemplar (S-Class), the IBM SP-2 (High Node), the SGI Power Challenge,  ... 
doi:10.1109/ipps.1999.760427 dblp:conf/ipps/HelmanJ99 fatcat:ebk3wypt5jhalkob2aoqg5z244

A recursive doubling algorithm for solution of tridiagonal systems on hypercube multiprocessors

Ömer Eǧecioǧlu, Cetin K. Koc, Alan J. Laub
1989 Journal of Computational and Applied Mathematics  
These results are confirmed by numerical experiments obtained on an Intel iPSC/dS hypercube multiprocessor.  ...  The main technique relies on fast parallel prefix algorithms, which can be efficiently mapped on the hypercube architecture using the binary-reflected Gray code.  ...  linear system of equations can be implemented efficiently on hypercube multiprocessors Step 2 of the SP algorithm where the prefixes of the matrices (B,,, B,, . . . , B,,_,) are computed is the bottleneck  ... 
doi:10.1016/0377-0427(89)90362-2 fatcat:kxuexu4sarftpfdodseo6b5gye

Efficiently Computing Tensor Eigenvalues on a GPU

Grey Ballard, Tamara Kolda, Todd Plantenga
2011 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum  
We focus in this work on efficient implementation of their algorithm, known as the shifted symmetric higher-order power method, and on how a GPU can be used to accelerate the computation for an application  ...  In particular, Kolda and Mayo [3] present a generalization of the matrix power method for symmetric tensors.  ...  We would like to thank Fangxiang Jiao, Yaniv Gur, and Chris Johnson of the Scientific Computing and Imaging Institute at the University of Utah for the motivating application and for providing the sample  ... 
doi:10.1109/ipdps.2011.287 dblp:conf/ipps/BallardKP11 fatcat:fx25hkyq7fbuxpbonouy4jrkt4

Information Security in Multiprocessor Systems Based on the X86 Architecture

Andres Torrubia, Francisco J Mora
2000 Computers & security  
It reviews some software protection techniques and introduces some new techniques focused on multiprocessor systems.  ...  This paper examines security in systems based on Intel x86 architecture and covers aspects from timing attacks to the prevention of service bugs.  ...  The Windows NT operating system, for example, supports systems based on symmetrical multiprocessors, where all the processors are identical, work at the same speed, and have the same features.  ... 
doi:10.1016/s0167-4048(00)06030-2 fatcat:flbsgytohfhchin2qf7tzjslem

Evaluating Arithmetic Expressions Using Tree Contraction: A Fast and Scalable Parallel Implementation for Symmetric Multiprocessors (SMPs) [chapter]

David A. Bader, Sukanya Sreshta, Nina R. Weisse-Bernstein
2002 Lecture Notes in Computer Science  
This linear speedup with the number of processors is one of the first ever attained in practice for intricate combinatorial problems.  ...  The ability to provide uniform shared-memory access to a significant number of processors in a single SMP node brings us much closer to the ideal PRAM parallel computer.  ...  Our work in this paper focuses on a parallel implementation of the tree contraction technique specific to the application of expression evaluation on symmetric multiprocessors (SMPs).  ... 
doi:10.1007/3-540-36265-7_7 fatcat:hpkdwinqrjefrmiaktw5co523u

Shared memory multiprocessor architectures for software ip routers

Yan Luo, L.N. Bhuyan, Xi Chen
2003 IEEE Transactions on Parallel and Distributed Systems  
In this paper, we propose new shared memory multiprocessor architectures and evaluate their performance for future Internet Protocol (IP) routers based on Symmetric Multi-Processor (SMP) and Cache Coherent  ...  The execution driven simulation can produce accurate cycle-level execution time prediction and reveal the impact of various architectural parameters on the performance of routers.  ...  Shared memory architectures can be divided into two categories, namely, Symmetric Multi-Processors (SMP) and Cache-Coherent Non-Uniform Memory Access (CC-NUMA) multiprocessors.  ... 
doi:10.1109/tpds.2003.1255636 fatcat:qxirvu2m6nb2lgcfsaaufp57im

To CMP or not to CMP

Randy Smith, Dan Gibson, Shijin Kong
2007 Proceedings of the 3rd ACM/IEEE Symposium on Architecture for networking and communications systems - ANCS '07  
We discuss the tradeoffs of different architectures in the context of these algorithms, and we evaluate the schemes on both chip multiprocessor (CMP) and symmetric multiprocessor (SMP) hardware.  ...  The recent emergence of chip multiprocessors and other low-cost, highly parallel processing hardware provides a promising platform on which to realize increased classification performance.  ...  We discuss the tradeoffs inherent to different parallel architectures in the context of these algorithms, and we evaluate their behavior on both Chip Multiprocessor (CMP) and Symmetric Multiprocessor (  ... 
doi:10.1145/1323548.1323558 dblp:conf/ancs/SmithGK07 fatcat:aagbvch3vfdllpdiewkvalz7aa

Page 1085 of Mathematical Reviews Vol. , Issue 89B [page]

1989 Mathematical Reviews  
Miller, The traveling salesman problem: the development of a distributed computation (pp. 417-420); Michael Berry and Ahmed Sameh, Multiprocessor Jacobi algorithms for dense symmetric eigenvalue and singular  ...  Proceedings of the Fifth Annual Symposium on Theoretical Aspects of Computer Science held in Bordeaux, February 1 1-13, 1988. Edited by R. Cori and M. Wirsing. Lecture Notes in Computer Science, 294.  ... 

Special Feature: Commercial Multiprocessing Systems

Satyanarayanan
1980 Computer  
The Honeywell 60/66, the Univac 1100/80, and the true multiprocessor 370/168 are systems having identical (symmetric) processors.  ...  One feature present in the S/370, but-not in any of the other systems surveyed here, is a mechanism called "prefixing."  ... 
doi:10.1109/mc.1980.1653626 fatcat:muqfnzy4izczzazgjg4f22txmu

Mutually Independent Hamiltonian Cycle of Burnt Pancake Graphs

Yung-Ling LAI, Da-Chung YU, Lih-Hsing HSU
2011 IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences  
Introduction The interconnection network, one crucial step on designing a massively multiprocessor system, is an important application of graph theory.  ...  n , the i -th prefix reversal of u , denoted by ( ) n .  ... 
doi:10.1587/transfun.e94.a.1553 fatcat:osbgwvxcafhb7n2evztskfppxi

SWARM: A Parallel Programming Framework for Multicore Processors

David A. Bader, Varun Kanade, Kamesh Madduri
2007 2007 IEEE International Parallel and Distributed Processing Symposium  
Continued performance on multicore processors now requires the exploitation of concurrency at the algorithmic level.  ...  In this paper, we identify key issues in algorithm design for multicore processors and propose a computational model for these systems.  ...  In general, we achieve lower relative speedup on multicore systems in comparison to our previous results on symmetric multiprocessors.  ... 
doi:10.1109/ipdps.2007.370681 dblp:conf/ipps/BaderKM07 fatcat:oqtbqmbzuzbrfihus5b4e47qgu

ERIS: A NUMA-Aware In-Memory Storage Engine for Analytical Workload

Thomas Kissinger, Tim Kiefer, Benjamin Schlegel, Dirk Habich, Daniel Molka, Wolfgang Lehner
2014 Very Large Data Bases Conference  
The ever-growing demand for more computing power forces hardware vendors to put an increasing number of multiprocessors into a single server system, which usually exhibits a non-uniform memory access (  ...  We evaluate ERIS on widespread standard server systems as well as on a system consisting of 64 multiprocessors and 512 cores.  ...  ACKNOWLEDGMENTS This work is partly funded by the German Research Foundation (DFG) in the Collaborative Research Center 912 "Highly Adaptive Energy-E cient Computing" and under project number LE 1416/22  ... 
dblp:conf/vldb/KissingerKSHML14 fatcat:kc26svylzzb2dooxi4cmm2ihb4

An Efficient GPU Implementation of Ant Colony Optimization for the Traveling Salesman Problem

Akihiro Uchida, Yasuaki Ito, Koji Nakano
2012 2012 Third International Conference on Networking and Computing  
Thus, our GPU implementation attains a speed-up factor of 43.47. 2012 Third International Conference on Networking and Computing 978-0-7695-4893-7/12 $26.00  ...  The main contribution of this paper is to present sophisticated and efficient implementation of one of the ACO approaches on the GPU.  ...  We assign one block to two subarrays that are symmetric or one subarray that includes symmetric element. Blocks symmetrize the whole array subarray by subarray.  ... 
doi:10.1109/icnc.2012.22 dblp:conf/ic-nc/UchidaIN12 fatcat:4ie5fgocojdr5hbfoi5glni2se

Algorithms of Basic Communication Operation on the Biswapped Network [chapter]

Wenhong Wei, Wenjun Xiao
2008 Lecture Notes in Computer Science  
In this paper, we develop algorithms for some basic communication operations-broadcast, prefix sum and data sum etc.  ...  Some topological properties of BSN have been investigated, and some algorithms have been developed on the BSN such as sorting and matrix multiplication etc.  ...  This work is supported by the Doctorate Foundation of South China University of Technology and Open Research Foundation of Guangdong Province Key Laboratory of Computer Network.  ... 
doi:10.1007/978-3-540-69384-0_40 fatcat:qoca7drcgbhzvlks43tqdh3kfi
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